mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-07 19:30:30 +09:00
pwm-bl: add pwm backlight driver for rockchip
This commit is contained in:
许盛飞
@@ -57,3 +57,7 @@
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&lcdc1 {
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status = "okay";
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};
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&rk_pwm3 {
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status = "okay";
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};
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@@ -21,6 +21,10 @@
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i2c4 = &i2c4;
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lcdc0 = &lcdc0;
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lcdc1 = &lcdc1;
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pwm0 = &rk_pwm0;
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pwm1 = &rk_pwm1;
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pmw2 = &rk_pwm2;
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pwm3 = &rk_pwm3;
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};
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cpus {
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@@ -347,4 +351,51 @@
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status = "disabled";
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};
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rk_pwm0: pwm@20030000{
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compatible = "rockchip,pwm";
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reg = <0x20030000 0x10>; /*0x20030000*/
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#pwm-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm0>;
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status = "disabled";
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};
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rk_pwm1: pwm@20030010{
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compatible = "rockchip,pwm";
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reg = <0x20030010 0x10>; /*0x20030000*/
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#pwm-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm1>;
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status = "disabled";
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};
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rk_pwm2: pwm@20050020{
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compatible = "rockchip,pwm";
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reg = <0x20050020 0x10>; /*0x20030000*/
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#pwm-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm2>;
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status = "disabled";
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};
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rk_pwm3: pwm@20050030{
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compatible = "rockchip,pwm";
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reg = <0x20050030 0x10>; /*0x20030000*/
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#pwm-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm3>;
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status = "disabled";
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};
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backlight {
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compatible = "pwm-backlight";
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pwms = <&rk_pwm3 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>;
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};
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};
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@@ -288,6 +288,7 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
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# CONFIG_LCD_CLASS_DEVICE is not set
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CONFIG_BACKLIGHT_CLASS_DEVICE=y
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# CONFIG_BACKLIGHT_GENERIC is not set
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CONFIG_BACKLIGHT_PWM=y
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CONFIG_FB_ROCKCHIP=y
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CONFIG_LCDC_RK3188=y
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CONFIG_LCDC0_RK3188=y
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@@ -402,6 +403,8 @@ CONFIG_ANDROID_TIMED_GPIO=y
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CONFIG_ANDROID_LOW_MEMORY_KILLER=y
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CONFIG_SYNC=y
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CONFIG_ION=y
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CONFIG_PWM=y
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CONFIG_PWM_ROCKCHIPS=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT2_FS_XATTR=y
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CONFIG_EXT3_FS=y
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@@ -201,4 +201,13 @@ config PWM_VT8500
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To compile this driver as a module, choose M here: the module
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will be called pwm-vt8500.
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config PWM_ROCKCHIPS
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tristate "ROCKCHIPS PWM support"
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depends on OF
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help
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Generic PWM framework driver for ROCKCHIPS.
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To compile this driver as a module, choose M here: the module
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will be called pwm-rk.
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endif
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@@ -17,3 +17,4 @@ obj-$(CONFIG_PWM_TIPWMSS) += pwm-tipwmss.o
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obj-$(CONFIG_PWM_TWL) += pwm-twl.o
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obj-$(CONFIG_PWM_TWL_LED) += pwm-twl-led.o
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obj-$(CONFIG_PWM_VT8500) += pwm-vt8500.o
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obj-$(CONFIG_PWM_ROCKCHIPS) += pwm_rk.o
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466
drivers/pwm/pwm_rk.c
Normal file
466
drivers/pwm/pwm_rk.c
Normal file
@@ -0,0 +1,466 @@
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/math64.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#define NUM_PWM 1
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/* PWM registers */
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#if 0
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#define PWM_REG_CNTR 0x00 /* Counter Register */
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#define PWM_REG_PERIOD 0x04 /* Period Register */
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#define PWM_REG_DUTY 0x08 /* Duty Cycle Register */
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#define PWM_REG_CTRL 0x0c /* Control Register */
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/*bits definitions*/
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#define PWM_ENABLE (1 << 0)
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#define PWM_DISABLE (0 << 0)
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#define PWM_SHOT (0x00 << 1)
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#define PWM_CONTINUMOUS (0x01 << 1)
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#define PWM_CAPTURE (0x01 << 1)
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#define PWM_DUTY_POSTIVE (0x01 << 3)
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#define PWM_DUTY_NEGATIVE (0x00 << 3)
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#define PWM_INACTIVE_POSTIVE (0x01 << 4)
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#define PWM_INACTIVE_NEGATIVE (0x00 << 4)
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#define PWM_OUTPUT_LEFT (0x00 << 5)
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#define PWM_OUTPUT_ENTER (0x01 << 5)
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#define PWM_LP_ENABLE (1<<8)
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#define PWM_LP_DISABLE (0<<8)
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#define PWM_CLK_SCALE (1 << 9)
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#define PWM_CLK_NON_SCALE (0 << 9)
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#define PWMCR_MIN_PRESCALE 0x00
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#define PWMCR_MIN_PRESCALE 0x00
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#define PWMCR_MAX_PRESCALE 0x07
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#define PWMDCR_MIN_DUTY 0x0001
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#define PWMDCR_MAX_DUTY 0xFFFF
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#define PWMPCR_MIN_PERIOD 0x0001
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#define PWMPCR_MAX_PERIOD 0xFFFF
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enum pwm_div {
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PWM_DIV1 = (0x0 << 12),
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PWM_DIV2 = (0x1 << 12),
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PWM_DIV4 = (0x2 << 12),
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PWM_DIV8 = (0x3 << 12),
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PWM_DIV16 = (0x4 << 12),
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PWM_DIV32 = (0x5 << 12),
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PWM_DIV64 = (0x6 << 12),
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PWM_DIV128 = (0x7 << 12),
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};
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#endif
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static int pwm_dbg_level = 0;
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module_param_named(dbg_level, pwm_dbg_level, int, 0644);
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#define DBG( args...) \
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do { \
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if (pwm_dbg_level) { \
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pr_info(args); \
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} \
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} while (0)
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#define PWM_REG_CNTR 0x00
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#define PWM_REG_HRC 0x04
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#define PWM_REG_LRC 0x08
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#define PWM_REG_CTRL 0x0c
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#define PWM_REG_PERIOD PWM_REG_HRC /* Period Register */
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#define PWM_REG_DUTY PWM_REG_LRC /* Duty Cycle Register */
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//#define PWM_REG_CTRL 0x0c /* Control Register */
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#define PWM_DIV_MASK (0xf << 9)
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#define PWM_CAPTURE (1 << 8)
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#define PWM_RESET (1 << 7)
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#define PWM_INTCLR (1 << 6)
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#define PWM_INTEN (1 << 5)
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#define PWM_SINGLE (1 << 4)
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#define PWM_ENABLE (1 << 3)
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#define PWM_TIMER_EN (1 << 0)
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#define PWM_TimeEN PWM_TIMER_EN
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#define PWMCR_MIN_PRESCALE 0x00
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#define PWMCR_MIN_PRESCALE 0x00
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#define PWMCR_MAX_PRESCALE 0x07
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#define PWMDCR_MIN_DUTY 0x0001
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#define PWMDCR_MAX_DUTY 0xFFFF
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#define PWMPCR_MIN_PERIOD 0x0001
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#define PWMPCR_MAX_PERIOD 0xFFFF
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/**
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* struct rk_pwm_chip - struct representing pwm chip
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*
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* @base: base address of pwm chip
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* @clk: pointer to clk structure of pwm chip
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* @chip: linux pwm chip representation
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*/
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static spinlock_t pwm_lock[4] = {
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__SPIN_LOCK_UNLOCKED(pwm_lock0),
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__SPIN_LOCK_UNLOCKED(pwm_lock1),
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__SPIN_LOCK_UNLOCKED(pwm_lock2),
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__SPIN_LOCK_UNLOCKED(pwm_lock3),
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};
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struct rk_pwm_chip {
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void __iomem *base;
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struct clk *clk;
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struct pwm_chip chip;
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};
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#define PWM_CLK 1
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#if 0
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static void __iomem *rk30_grf_base = NULL;
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static void __iomem *rk30_cru_base = NULL;
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static void __iomem *rk30_pwm_base = NULL;
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//#define SZ_16K 0x4000
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//#define SZ_8K 0x2000
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#define RK30_GRF_PHYS 0x20008000
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#define RK30_GRF_SIZE SZ_8K
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#define RK30_CRU_PHYS 0x20000000
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#define RK30_CRU_SIZE SZ_16K
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#define RK30_PWM_PHYS 0x20050000
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#define RK30_PWM_SIZE SZ_16K
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static void dump_register_of_pwm(void)
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{
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int off;
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//rk30_grf_base = ioremap(RK30_GRF_PHYS, RK30_GRF_SIZE);
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// rk30_cru_base = ioremap(RK30_CRU_PHYS, RK30_CRU_SIZE);
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//rk30_pwm_base = ioremap(RK30_PWM_PHYS, RK30_PWM_SIZE);
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// DBG("GRF IOMUX GPIO3_D6 = 0x%08x\n",readl_relaxed(rk30_grf_base+ 0x9C) );
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//DBG("CRU = 0x%08x\n",readl_relaxed(rk30_cru_base+ 0xeC) );
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//writel_relaxed(0x10001000, rk30_grf_base+ 0x9C);
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//DBG("GRF IOMUX GPIO3_D6 = 0x%08x\n",readl_relaxed(rk30_grf_base+ 0x9C) );
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//DBG("CRU = 0x%08x\n",readl_relaxed(rk30_cru_base+ 0xeC) );
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#if 0
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barrier();
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writel_relaxed(off, rk30_pwm_base+3*0x10+ PWM_REG_CTRL);
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dsb();
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writel_relaxed(0x1900, rk30_pwm_base+3*0x10+ PWM_REG_HRC);//rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_HRC,0x1900);// dc);
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writel_relaxed(0x5dc0, rk30_pwm_base+3*0x10+ PWM_REG_LRC);//rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_LRC, 0x5dc0);//pv);
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writel_relaxed(0, rk30_pwm_base+3*0x10+ PWM_REG_CNTR);//rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_CNTR,0);
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dsb();
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writel_relaxed(0x09, rk30_pwm_base+3*0x10+ PWM_REG_CTRL);// rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_CTRL,on);
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dsb();
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#endif
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}
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static void dump_pwm_register(struct rk_pwm_chip *chip)
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{
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DBG("dump pwm regitster start\n");
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#if 1
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DBG("PWM0\n");
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DBG("PWM_REG_CTRL =0x%08x\n",rk_pwm_readl(chip, 0, PWM_REG_CTRL));
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DBG("PWM_REG_HRC = 0x%08x\n",rk_pwm_readl(chip,0, PWM_REG_HRC));
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DBG("PWM_REG_LRC = 0x%08x\n",rk_pwm_readl(chip,0, PWM_REG_LRC));
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DBG("PWM_REG_CNTR = 0x%08x\n",rk_pwm_readl(chip,0, PWM_REG_CNTR));
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DBG("PWM1\n");
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DBG("PWM_REG_CTRL =0x%08x\n",rk_pwm_readl(chip, 1, PWM_REG_CTRL));
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DBG("PWM_REG_HRC = 0x%08x\n",rk_pwm_readl(chip,1, PWM_REG_HRC));
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DBG("PWM_REG_LRC = 0x%08x\n",rk_pwm_readl(chip,1, PWM_REG_LRC));
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DBG("PWM_REG_CNTR = 0x%08x\n",rk_pwm_readl(chip,1, PWM_REG_CNTR));
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DBG("PWM2\n");
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DBG("PWM_REG_CTRL =0x%08x\n",rk_pwm_readl(chip, 2, PWM_REG_CTRL));
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DBG("PWM_REG_HRC = 0x%08x\n",rk_pwm_readl(chip,2, PWM_REG_HRC));
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DBG("PWM_REG_LRC = 0x%08x\n",rk_pwm_readl(chip,2, PWM_REG_LRC));
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DBG("PWM_REG_CNTR = 0x%08x\n",rk_pwm_readl(chip,2, PWM_REG_CNTR));
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DBG("PWM3\n");
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DBG("PWM_REG_CTRL =0x%08x\n",rk_pwm_readl(chip,3, PWM_REG_CTRL));
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DBG("PWM_REG_HRC = 0x%08x\n",rk_pwm_readl(chip,3, PWM_REG_HRC));
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DBG("PWM_REG_LRC = 0x%08x\n",rk_pwm_readl(chip,3, PWM_REG_LRC));
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DBG("PWM_REG_CNTR = 0x%08x\n",rk_pwm_readl(chip,3, PWM_REG_CNTR));
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#endif
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printk("dump pwm regitster end\n");
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}
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#endif
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static inline struct rk_pwm_chip *to_rk_pwm_chip(struct pwm_chip *chip)
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{
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return container_of(chip, struct rk_pwm_chip, chip);
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}
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static inline u32 rk_pwm_readl(struct rk_pwm_chip *chip, unsigned int num,
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unsigned long offset)
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{
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return readl_relaxed(chip->base + (num << 4) + offset);
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}
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static inline void rk_pwm_writel(struct rk_pwm_chip *chip,
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unsigned int num, unsigned long offset,
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unsigned long val)
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{
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writel_relaxed(val, chip->base + (num << 4) + offset);
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}
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#if 1
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static int __rk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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struct rk_pwm_chip *pc = to_rk_pwm_chip(chip);
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u64 val, div, clk_rate;
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unsigned long prescale = PWMCR_MIN_PRESCALE, pv, dc;
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int ret;
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u32 off, on;
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int conf=0;
|
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off = PWM_RESET;
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on = PWM_ENABLE | PWM_TIMER_EN;
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||||
|
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//dump_pwm_register(pc);
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|
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/*
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* Find pv, dc and prescale to suit duty_ns and period_ns. This is done
|
||||
* according to formulas described below:
|
||||
*
|
||||
* period_ns = 10^9 * (PRESCALE ) * PV / PWM_CLK_RATE
|
||||
* duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
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*
|
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* PV = (PWM_CLK_RATE * period_ns) / (10^9 * (PRESCALE + 1))
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* DC = (PWM_CLK_RATE * duty_ns) / (10^9 * (PRESCALE + 1))
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*/
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#if PWM_CLK
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clk_rate = clk_get_rate(pc->clk);
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#else
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||||
clk_rate = 24000000;
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#endif
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while (1) {
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div = 1000000000;
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||||
div *= 1 + prescale;
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val = clk_rate * period_ns;
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pv = div64_u64(val, div);
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val = clk_rate * duty_ns;
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dc = div64_u64(val, div);
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/* if duty_ns and period_ns are not achievable then return */
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if (pv < PWMPCR_MIN_PERIOD || dc < PWMDCR_MIN_DUTY)
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return -EINVAL;
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/*
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* if pv and dc have crossed their upper limit, then increase
|
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* prescale and recalculate pv and dc.
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||||
*/
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if (pv > PWMPCR_MAX_PERIOD || dc > PWMDCR_MAX_DUTY) {
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if (++prescale > PWMCR_MAX_PRESCALE)
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return -EINVAL;
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continue;
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||||
}
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break;
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}
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|
||||
/*
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* NOTE: the clock to PWM has to be enabled first before writing to the
|
||||
* registers.
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*/
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conf |= (prescale << 9);
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#if PWM_CLK
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ret = clk_enable(pc->clk);
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||||
if (ret)
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return ret;
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||||
#endif
|
||||
|
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barrier();
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||||
rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_CTRL,off);
|
||||
|
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dsb();
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rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_HRC,dc);//0x1900);// dc);
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rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_LRC, pv);//0x5dc0);//pv);
|
||||
rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_CNTR,0);
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dsb();
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rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_CTRL,on|conf);
|
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dsb();
|
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|
||||
#if PWM_CLK
|
||||
clk_disable(pc->clk);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
static int rk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
|
||||
int duty_ns, int period_ns)
|
||||
{
|
||||
unsigned long flags;
|
||||
spinlock_t *lock;
|
||||
|
||||
lock = &pwm_lock[pwm->hwpwm];
|
||||
spin_lock_irqsave(lock, flags);
|
||||
__rk_pwm_config(chip, pwm, duty_ns, period_ns);
|
||||
spin_unlock_irqrestore(lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
|
||||
{
|
||||
struct rk_pwm_chip *pc = to_rk_pwm_chip(chip);
|
||||
int rc = 0;
|
||||
u32 val;
|
||||
#if PWM_CLK
|
||||
rc = clk_enable(pc->clk);
|
||||
if (rc)
|
||||
return rc;
|
||||
#endif
|
||||
val = rk_pwm_readl(pc, pwm->hwpwm, PWM_REG_CTRL);
|
||||
val |= PWM_ENABLE;
|
||||
rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_CTRL, val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void rk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
|
||||
{
|
||||
struct rk_pwm_chip *pc = to_rk_pwm_chip(chip);
|
||||
u32 val;
|
||||
|
||||
val = rk_pwm_readl(pc, pwm->hwpwm, PWM_REG_CTRL);
|
||||
val &= ~PWM_ENABLE;
|
||||
rk_pwm_writel(pc, pwm->hwpwm, PWM_REG_CTRL, val);
|
||||
#if PWM_CLK
|
||||
clk_disable(pc->clk);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static const struct pwm_ops rk_pwm_ops = {
|
||||
.config = rk_pwm_config,
|
||||
.enable = rk_pwm_enable,
|
||||
.disable = rk_pwm_disable,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
|
||||
|
||||
static int rk_pwm_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct rk_pwm_chip *pc;
|
||||
struct resource *r;
|
||||
int ret;
|
||||
DBG("%s start \n",__FUNCTION__);
|
||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!r) {
|
||||
dev_err(&pdev->dev, "no memory resources defined\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
|
||||
if (!pc) {
|
||||
dev_err(&pdev->dev, "failed to allocate memory\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
pc->base = devm_ioremap_resource(&pdev->dev, r);
|
||||
if (IS_ERR(pc->base))
|
||||
return PTR_ERR(pc->base);
|
||||
|
||||
#if PWM_CLK
|
||||
//pc->clk = devm_clk_get(&pdev->dev, NULL);
|
||||
pc->clk = clk_get(NULL,"g_p_pwm23");
|
||||
|
||||
|
||||
if (IS_ERR(pc->clk))
|
||||
return PTR_ERR(pc->clk);
|
||||
#endif
|
||||
|
||||
platform_set_drvdata(pdev, pc);
|
||||
|
||||
pc->chip.dev = &pdev->dev;
|
||||
pc->chip.ops = &rk_pwm_ops;
|
||||
pc->chip.base = -1;
|
||||
pc->chip.npwm = NUM_PWM;
|
||||
|
||||
#if PWM_CLK
|
||||
ret = clk_prepare(pc->clk);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
|
||||
#if PWM_CLK
|
||||
if (of_device_is_compatible(np, "rockchip,pwm")) {
|
||||
ret = clk_enable(pc->clk);
|
||||
if (ret) {
|
||||
clk_unprepare(pc->clk);
|
||||
return ret;
|
||||
}
|
||||
/*
|
||||
* Following enables PWM chip, channels would still be
|
||||
* enabled individually through their control register
|
||||
*/
|
||||
#if PWM_CLK
|
||||
// clk_disable(pc->clk);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
DBG("npwm = %d, of_pwm_ncells =%d \n", pc->chip.npwm,pc->chip.of_pwm_n_cells);
|
||||
ret = pwmchip_add(&pc->chip);
|
||||
if (ret < 0) {
|
||||
clk_unprepare(pc->clk);
|
||||
dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
|
||||
}
|
||||
DBG("%s end \n",__FUNCTION__);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rk_pwm_remove(struct platform_device *pdev)
|
||||
{
|
||||
return 0;//pwmchip_remove(&pc->chip);
|
||||
}
|
||||
|
||||
|
||||
static const struct of_device_id rk_pwm_of_match[] = {
|
||||
{ .compatible = "rockchip,pwm" },
|
||||
{ }
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, rk_pwm_of_match);
|
||||
|
||||
static struct platform_driver rk_pwm_driver = {
|
||||
.driver = {
|
||||
.name = "rk-pwm",
|
||||
.of_match_table = rk_pwm_of_match,
|
||||
},
|
||||
.probe = rk_pwm_probe,
|
||||
.remove = rk_pwm_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(rk_pwm_driver);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("<xsf@rock-chips.com>");
|
||||
MODULE_ALIAS("platform:rk-pwm");
|
||||
|
||||
|
||||
@@ -20,7 +20,8 @@
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <linux/of_gpio.h>
|
||||
#include <linux/gpio.h>
|
||||
struct pwm_bl_data {
|
||||
struct pwm_device *pwm;
|
||||
struct device *dev;
|
||||
@@ -101,7 +102,7 @@ static int pwm_backlight_parse_dt(struct device *dev,
|
||||
struct property *prop;
|
||||
int length;
|
||||
u32 value;
|
||||
int ret;
|
||||
int gpio,ret;
|
||||
|
||||
if (!node)
|
||||
return -ENODEV;
|
||||
@@ -133,6 +134,25 @@ static int pwm_backlight_parse_dt(struct device *dev,
|
||||
&value);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
data->gpios = devm_kzalloc(dev,
|
||||
sizeof(struct gpio) * 1,
|
||||
GFP_KERNEL);
|
||||
gpio = of_get_named_gpio(node, "gpios", 0);
|
||||
data->gpios->gpio = gpio;
|
||||
|
||||
|
||||
if (gpio != -1) {
|
||||
ret = devm_gpio_request(dev, gpio, "gpio_pwm_bl_en");
|
||||
if(ret){
|
||||
data->gpios->gpio = -1;
|
||||
goto err_free_pwm;
|
||||
}
|
||||
ret = gpio_direction_output(data->gpios->gpio , 1);
|
||||
if(ret){
|
||||
goto err_free_pwm;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
data->dft_brightness = value;
|
||||
data->max_brightness--;
|
||||
@@ -145,6 +165,9 @@ static int pwm_backlight_parse_dt(struct device *dev,
|
||||
*/
|
||||
|
||||
return 0;
|
||||
err_free_pwm:
|
||||
printk("PWM_BL_EN request ERROR");
|
||||
return 1;
|
||||
}
|
||||
|
||||
static struct of_device_id pwm_backlight_of_match[] = {
|
||||
|
||||
@@ -13,6 +13,9 @@ struct platform_pwm_backlight_data {
|
||||
unsigned int lth_brightness;
|
||||
unsigned int pwm_period_ns;
|
||||
unsigned int *levels;
|
||||
|
||||
struct gpio *gpios;
|
||||
|
||||
int (*init)(struct device *dev);
|
||||
int (*notify)(struct device *dev, int brightness);
|
||||
void (*notify_after)(struct device *dev, int brightness);
|
||||
|
||||
Reference in New Issue
Block a user