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ARM: dts: rv1126-pinctrl: Use the correct ethernet pinctrl definition

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Corrected the definition of rmii/rgmii pins, add drive strength
to tx pins, and add clk_out_ethernet pin, this will be used later.

Change-Id: I2293a888c51e18fc336e45c791ea2a6fe5da62b9
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu
2020-03-20 11:08:55 +08:00
committed by Tao Huang
parent c7108e54c5
commit 7532f6dbd4
1 changed files with 76 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

100
arch/arm/boot/dts/rv1126-pinctrl.dtsi
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@@ -997,10 +997,6 @@
rockchip,pins =
/* rgmii_clk_m0 */
<3 RK_PC0 2 &pcfg_pull_none>,
/* rgmii_col_m0 */
<3 RK_PA6 2 &pcfg_pull_none>,
/* rgmii_crs_m0 */
<3 RK_PA5 2 &pcfg_pull_none>,
/* rgmii_mdc_m0 */
<3 RK_PC4 2 &pcfg_pull_none>,
/* rgmii_mdio_m0 */
@@ -1017,30 +1013,24 @@
<3 RK_PB0 2 &pcfg_pull_none>,
/* rgmii_rxdv_m0 */
<3 RK_PC1 2 &pcfg_pull_none>,
/* rgmii_rxer_m0 */
<3 RK_PC2 2 &pcfg_pull_none>,
/* rgmii_txclk_m0 */
<3 RK_PC6 2 &pcfg_pull_none>,
<3 RK_PC6 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txd0_m0 */
<3 RK_PB3 2 &pcfg_pull_none>,
<3 RK_PB3 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txd1_m0 */
<3 RK_PB4 2 &pcfg_pull_none>,
<3 RK_PB4 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txd2_m0 */
<3 RK_PB1 2 &pcfg_pull_none>,
<3 RK_PB1 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txd3_m0 */
<3 RK_PB2 2 &pcfg_pull_none>,
<3 RK_PB2 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txen_m0 */
<3 RK_PB5 2 &pcfg_pull_none>;
<3 RK_PB5 2 &pcfg_pull_none_drv_level_12>;
};
/omit-if-no-ref/
rgmiim1_pins: rgmiim1-pins {
rockchip,pins =
/* rgmii_clk_m1 */
<2 RK_PB7 2 &pcfg_pull_none>,
/* rgmii_col_m1 */
<2 RK_PA6 2 &pcfg_pull_none>,
/* rgmii_crs_m1 */
<2 RK_PA5 2 &pcfg_pull_none>,
/* rgmii_mdc_m1 */
<2 RK_PC2 2 &pcfg_pull_none>,
/* rgmii_mdio_m1 */
@@ -1057,20 +1047,82 @@
<2 RK_PD0 2 &pcfg_pull_none>,
/* rgmii_rxdv_m1 */
<2 RK_PB4 2 &pcfg_pull_none>,
/* rgmii_rxer_m1 */
<2 RK_PC0 2 &pcfg_pull_none>,
/* rgmii_txclk_m1 */
<2 RK_PD2 2 &pcfg_pull_none>,
<2 RK_PD2 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txd0_m1 */
<2 RK_PC3 2 &pcfg_pull_none>,
<2 RK_PC3 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txd1_m1 */
<2 RK_PC4 2 &pcfg_pull_none>,
<2 RK_PC4 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txd2_m1 */
<2 RK_PD1 2 &pcfg_pull_none>,
<2 RK_PD1 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txd3_m1 */
<2 RK_PA4 2 &pcfg_pull_none>,
<2 RK_PA4 2 &pcfg_pull_none_drv_level_12>,
/* rgmii_txen_m1 */
<2 RK_PC6 2 &pcfg_pull_none>;
<2 RK_PC6 2 &pcfg_pull_none_drv_level_12>;
};
};
rmii {
/omit-if-no-ref/
rmiim0_pins: rmiim0-pins {
rockchip,pins =
/* rmii_clk_m0 */
<3 RK_PC0 2 &pcfg_pull_none>,
/* rmii_mdc_m0 */
<3 RK_PC4 2 &pcfg_pull_none>,
/* rmii_mdio_m0 */
<3 RK_PC3 2 &pcfg_pull_none>,
/* rmii_rxd0_m0 */
<3 RK_PB6 2 &pcfg_pull_none>,
/* rmii_rxd1_m0 */
<3 RK_PB7 2 &pcfg_pull_none>,
/* rmii_rxdv_m0 */
<3 RK_PC1 2 &pcfg_pull_none>,
/* rmii_rxer_m0 */
<3 RK_PC2 2 &pcfg_pull_none>,
/* rmii_txd0_m0 */
<3 RK_PB3 2 &pcfg_pull_none_drv_level_12>,
/* rmii_txd1_m0 */
<3 RK_PB4 2 &pcfg_pull_none_drv_level_12>,
/* rmii_txen_m0 */
<3 RK_PB5 2 &pcfg_pull_none_drv_level_12>;
};
/omit-if-no-ref/
rmiim1_pins: rmiim1-pins {
rockchip,pins =
/* rmii_clk_m1 */
<2 RK_PB7 2 &pcfg_pull_none>,
/* rmii_mdc_m1 */
<2 RK_PC2 2 &pcfg_pull_none>,
/* rmii_mdio_m1 */
<2 RK_PC1 2 &pcfg_pull_none>,
/* rmii_rxd0_m1 */
<2 RK_PB5 2 &pcfg_pull_none>,
/* rmii_rxd1_m1 */
<2 RK_PB6 2 &pcfg_pull_none>,
/* rmii_rxdv_m1 */
<2 RK_PB4 2 &pcfg_pull_none>,
/* rmii_rxer_m1 */
<2 RK_PC0 2 &pcfg_pull_none>,
/* rmii_txd0_m1 */
<2 RK_PC3 2 &pcfg_pull_none_drv_level_12>,
/* rmii_txd1_m1 */
<2 RK_PC4 2 &pcfg_pull_none_drv_level_12>,
/* rmii_txen_m1 */
<2 RK_PC6 2 &pcfg_pull_none_drv_level_12>;
};
};
clk_out_ethernet {
/omit-if-no-ref/
clk_out_ethernetm0_pins: clk-out-ethernetm0-pins {
rockchip,pins =
/* clk_out_ethernet_m0 */
<3 RK_PC5 2 &pcfg_pull_none>;
};
/omit-if-no-ref/
clk_out_ethernetm1_pins: clk-out-ethernetm1-pins {
rockchip,pins =
/* clk_out_ethernet_m1 */
<2 RK_PC5 2 &pcfg_pull_none>;
};
};
sdmmc0 {