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ASoC: codec cx2072x will only use mclk 12.288M

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1. due to cx2072x only support playback samplerate 48K
2. set_clk_rate called from codec side will make the clock
   tree correct, otherwise mclk will be closed from
   i2s_runtime_suspend unexpected

Change-Id: Iaa748bb27635e21f7c2d2997823228cdf7308fe8
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
This commit is contained in:
zhangjun
2017-01-17 15:53:40 +08:00
committed by Huang, Tao
parent 9d46acb993
commit 756733c3ab
2 changed files with 10 additions and 1 deletions
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10
sound/soc/codecs/cx2072x.c
View File

@@ -1779,9 +1779,17 @@ static int cx2072x_probe(struct snd_soc_codec *codec)
if (PTR_ERR(cx2072x->mclk_clock) == -EPROBE_DEFER)
return -EPROBE_DEFER;
ret = clk_set_rate(cx2072x->mclk_clock, CX2072X_RATES_MCLK);
if (ret) {
dev_err(codec->dev, "clk_set_rate is fail!\n");
return ret;
}
ret = clk_prepare_enable(cx2072x->mclk_clock);
if (ret)
if (ret) {
dev_err(codec->dev, "clk_prepare_enable is fail!\n");
return ret;
}
dev_dbg(codec->dev, "codec version: 4.4.20\n");
regmap_read(cx2072x->regmap, CX2072X_VENDOR_ID, &ven_id);

1
sound/soc/codecs/cx2072x.h
View File

@@ -18,6 +18,7 @@
#define CX2072X_RATES SNDRV_PCM_RATE_8000_192000
#define CX2072X_RATES_DSP SNDRV_PCM_RATE_48000
#define CX2072X_RATES_MCLK 12288000
#define CX2072X_REG_MAX 0x8a3c
#define AUDDRV_VERSION(major0, major1, minor, build) \