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video: rockchip: rga3: Integration of format-related processing

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1. Wrapped some format-related functions, avoid using formatted
index values.
2. Fix incorrect format alignment requirements.

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I3f1493dc59f9b303f6e8f289f63b515ad56d3651
This commit is contained in:
Yu Qiaowei
2022-02-18 11:15:11 +08:00
committed by Tao Huang
parent ab238eac93
commit 75b148bcbe
4 changed files with 421 additions and 448 deletions
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20
drivers/video/rockchip/rga3/include/rga_common.h
View File

@@ -11,8 +11,24 @@
void rga_user_format_convert(uint32_t *df, uint32_t sf);
bool rga_is_yuv422p_format(u32 format);
bool rga_is_rgb_format(uint32_t format);
bool rga_is_yuv_format(uint32_t format);
bool rga_is_alpha_format(uint32_t format);
bool rga_is_yuv420_packed_format(uint32_t format);
bool rga_is_yuv422_packed_format(uint32_t format);
bool rga_is_yuv8bit_format(uint32_t format);
bool rga_is_yuv10bit_format(uint32_t format);
bool rga_is_yuv422p_format(uint32_t format);
int rga_get_format_bits(uint32_t format);
const char *rga_get_format_name(uint32_t format);
const char *rga_get_render_mode_str(uint8_t mode);
const char *rga_get_rotate_mode_str(uint8_t mode);
const char *rga_get_blend_mode_str(uint16_t alpha_rop_flag,
uint16_t alpha_mode_0,
uint16_t alpha_mode_1);
void rga_convert_addr(struct rga_img_info_t *img, bool before_vir_get_channel);
int rga_get_format_bits(u32 format);
#endif

253
drivers/video/rockchip/rga3/rga2_reg_info.c
View File

@@ -1133,32 +1133,27 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
line_width_real =
dst_fmt_y4_en ? ((msg->dst.act_w) >> 1) : msg->dst.act_w;
if (msg->dst.format < 0x18 ||
(msg->dst.format >= RGA2_FORMAT_ARGB_8888 &&
msg->dst.format <= RGA2_FORMAT_ABGR_4444)) {
/*
* YUV packet mode is a new format, and the write behavior during
* rotation is different from the old format.
*/
if (rga_is_yuv422_packed_format(msg->dst.format)) {
y_ld_addr = yrgb_addr + (msg->dst.act_h - 1) * (d_stride);
y_rt_addr = yrgb_addr + (msg->dst.act_w * 2 - 1);
y_rd_addr = y_ld_addr + (msg->dst.act_w * 2 - 1);
} else if (rga_is_yuv420_packed_format(msg->dst.format)) {
y_ld_addr = (u32)msg->dst.yrgb_addr +
((msg->dst.y_offset + (msg->dst.act_h - 1)) * d_stride) +
msg->dst.x_offset;
y_rt_addr = yrgb_addr + (msg->dst.act_w * 2 - 1);
y_rd_addr = y_ld_addr + (msg->dst.act_w - 1);
} else {
/* 270 degree & Mirror V */
y_ld_addr = yrgb_addr + (msg->dst.act_h - 1) * (d_stride);
/* 90 degree & Mirror H */
y_rt_addr = yrgb_addr + (line_width_real - 1) * dpw;
/* 180 degree */
y_rd_addr = y_ld_addr + (line_width_real - 1) * dpw;
} else {
if (msg->dst.format == RGA2_FORMAT_YUYV_422 ||
msg->dst.format == RGA2_FORMAT_YVYU_422 ||
msg->dst.format == RGA2_FORMAT_UYVY_422 ||
msg->dst.format == RGA2_FORMAT_VYUY_422) {
y_ld_addr =
yrgb_addr + (msg->dst.act_h - 1) * (d_stride);
y_rt_addr = yrgb_addr + (msg->dst.act_w * 2 - 1);
y_rd_addr = y_ld_addr + (msg->dst.act_w * 2 - 1);
} else {
y_ld_addr = (u32) msg->dst.yrgb_addr +
((msg->dst.y_offset +
(msg->dst.act_h - 1)) * d_stride) +
msg->dst.x_offset;
y_rt_addr = yrgb_addr + (msg->dst.act_w * 2 - 1);
y_rd_addr = y_ld_addr + (msg->dst.act_w - 1);
}
}
u_ld_addr = u_addr + ((msg->dst.act_h / y_div) - 1) * (d_uv_stride);
@@ -2031,59 +2026,25 @@ static int rga2_check_param(const struct rga2_req *req)
return 0;
}
static bool rga2_is_yuv10bit_format(uint32_t format)
{
bool ret = false;
switch (format) {
case RGA2_FORMAT_YCbCr_420_SP_10B:
case RGA2_FORMAT_YCrCb_420_SP_10B:
case RGA2_FORMAT_YCbCr_422_SP_10B:
case RGA2_FORMAT_YCrCb_422_SP_10B:
ret = true;
break;
}
return ret;
}
static bool rga2_is_yuv8bit_format(uint32_t format)
{
bool ret = false;
switch (format) {
case RGA2_FORMAT_YCbCr_422_SP:
case RGA2_FORMAT_YCbCr_422_P:
case RGA2_FORMAT_YCbCr_420_SP:
case RGA2_FORMAT_YCbCr_420_P:
case RGA2_FORMAT_YCrCb_422_SP:
case RGA2_FORMAT_YCrCb_422_P:
case RGA2_FORMAT_YCrCb_420_SP:
case RGA2_FORMAT_YCrCb_420_P:
ret = true;
break;
}
return ret;
}
static int rga2_align_check(struct rga2_req *req)
{
if (rga2_is_yuv10bit_format(req->src.format))
if (rga_is_yuv10bit_format(req->src.format))
if ((req->src.vir_w % 16) || (req->src.x_offset % 2) ||
(req->src.act_w % 2) || (req->src.y_offset % 2) ||
(req->src.act_h % 2) || (req->src.vir_h % 2))
pr_info("err src wstride, 10bit yuv\n");
if (rga2_is_yuv10bit_format(req->dst.format))
if (rga_is_yuv10bit_format(req->dst.format))
if ((req->dst.vir_w % 16) || (req->dst.x_offset % 2) ||
(req->dst.act_w % 2) || (req->dst.y_offset % 2) ||
(req->dst.act_h % 2) || (req->dst.vir_h % 2))
pr_info("err dst wstride, 10bit yuv\n");
if (rga2_is_yuv8bit_format(req->src.format))
if ((req->src.vir_w % 8) || (req->src.x_offset % 2) ||
if (rga_is_yuv8bit_format(req->src.format))
if ((req->src.vir_w % 4) || (req->src.x_offset % 2) ||
(req->src.act_w % 2) || (req->src.y_offset % 2) ||
(req->src.act_h % 2) || (req->src.vir_h % 2))
pr_info("err src wstride, 8bit yuv\n");
if (rga2_is_yuv8bit_format(req->dst.format))
if ((req->dst.vir_w % 8) || (req->dst.x_offset % 2) ||
if (rga_is_yuv8bit_format(req->dst.format))
if ((req->dst.vir_w % 4) || (req->dst.x_offset % 2) ||
(req->dst.act_w % 2) || (req->dst.y_offset % 2) ||
(req->dst.act_h % 2) || (req->dst.vir_h % 2))
pr_info("err dst wstride, 8bit yuv\n");
@@ -2091,171 +2052,11 @@ static int rga2_align_check(struct rga2_req *req)
return 0;
}
static const char *rga2_get_render_mode_str(u8 mode)
{
switch (mode) {
case 0x0:
return "bitblt";
case 0x1:
return "RGA_COLOR_PALETTE";
case 0x2:
return "RGA_COLOR_FILL";
case 0x3:
return "update_palette_table";
case 0x4:
return "update_patten_buff";
default:
return "UNF";
}
}
static const char *rga2_get_rotate_mode_str(u8 mode)
{
switch (mode) {
case 0x0:
return "0";
case 0x1:
return "90 degree";
case 0x2:
return "180 degree";
case 0x3:
return "270 degree";
case 0x10:
return "xmirror";
case 0x20:
return "ymirror";
case 0x30:
return "xymirror";
default:
return "UNF";
}
}
static const char *rga2_get_format_name(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_RGBA_8888:
return "RGBA8888";
case RGA2_FORMAT_RGBX_8888:
return "RGBX8888";
case RGA2_FORMAT_RGB_888:
return "RGB888";
case RGA2_FORMAT_BGRA_8888:
return "BGRA8888";
case RGA2_FORMAT_BGRX_8888:
return "BGRX8888";
case RGA2_FORMAT_BGR_888:
return "BGR888";
case RGA2_FORMAT_RGB_565:
return "RGB565";
case RGA2_FORMAT_RGBA_5551:
return "RGBA5551";
case RGA2_FORMAT_RGBA_4444:
return "RGBA4444";
case RGA2_FORMAT_BGR_565:
return "BGR565";
case RGA2_FORMAT_BGRA_5551:
return "BGRA5551";
case RGA2_FORMAT_BGRA_4444:
return "BGRA4444";
case RGA2_FORMAT_ARGB_8888:
return "ARGB8888";
case RGA2_FORMAT_XRGB_8888:
return "XBGR8888";
case RGA2_FORMAT_ARGB_5551:
return "ARGB5551";
case RGA2_FORMAT_ARGB_4444:
return "ARGB4444";
case RGA2_FORMAT_ABGR_8888:
return "ABGR8888";
case RGA2_FORMAT_XBGR_8888:
return "XBGR8888";
case RGA2_FORMAT_ABGR_5551:
return "ABGR5551";
case RGA2_FORMAT_ABGR_4444:
return "ABGR4444";
case RGA2_FORMAT_YCbCr_422_SP:
return "YCbCr422SP";
case RGA2_FORMAT_YCbCr_422_P:
return "YCbCr422P";
case RGA2_FORMAT_YCbCr_420_SP:
return "YCbCr420SP";
case RGA2_FORMAT_YCbCr_420_P:
return "YCbCr420P";
case RGA2_FORMAT_YCrCb_422_SP:
return "YCrCb422SP";
case RGA2_FORMAT_YCrCb_422_P:
return "YCrCb422P";
case RGA2_FORMAT_YCrCb_420_SP:
return "YCrCb420SP";
case RGA2_FORMAT_YCrCb_420_P:
return "YCrCb420P";
case RGA2_FORMAT_YVYU_422:
return "YVYU422";
case RGA2_FORMAT_YVYU_420:
return "YVYU420";
case RGA2_FORMAT_VYUY_422:
return "VYUY422";
case RGA2_FORMAT_VYUY_420:
return "VYUY420";
case RGA2_FORMAT_YUYV_422:
return "YUYV422";
case RGA2_FORMAT_YUYV_420:
return "YUYV420";
case RGA2_FORMAT_UYVY_422:
return "UYVY422";
case RGA2_FORMAT_UYVY_420:
return "UYVY420";
case RGA2_FORMAT_YCbCr_420_SP_10B:
return "YCrCb420SP10B";
case RGA2_FORMAT_YCrCb_420_SP_10B:
return "YCbCr420SP10B";
case RGA2_FORMAT_YCbCr_422_SP_10B:
return "YCbCr422SP10B";
case RGA2_FORMAT_YCrCb_422_SP_10B:
return "YCrCb422SP10B";
case RGA2_FORMAT_BPP_1:
return "BPP1";
case RGA2_FORMAT_BPP_2:
return "BPP2";
case RGA2_FORMAT_BPP_4:
return "BPP4";
case RGA2_FORMAT_BPP_8:
return "BPP8";
case RGA2_FORMAT_YCbCr_400:
return "YCbCr400";
case RGA2_FORMAT_Y4:
return "y4";
default:
return "UNF";
}
}
static const char *rga2_get_blend_mode_str(u16 alpha_rop_flag, u16 alpha_mode_0,
u16 alpha_mode_1)
{
if (alpha_rop_flag == 0) {
return "no blend";
} else if (alpha_rop_flag == 0x9) {
if (alpha_mode_0 == 0x381A && alpha_mode_1 == 0x381A)
return "105 src + (1-src.a)*dst";
else if (alpha_mode_0 == 0x483A && alpha_mode_1 == 0x483A)
return "405 src.a * src + (1-src.a) * dst";
else
return "check reg for more imformation";
} else {
return "check reg for more imformation";
}
}
static void print_debug_info(struct rga2_req *req)
{
pr_info("render_mode:%s,bitblit_mode=%d,rotate_mode:%s\n",
rga2_get_render_mode_str(req->render_mode), req->bitblt_mode,
rga2_get_rotate_mode_str(req->rotate_mode));
rga_get_render_mode_str(req->render_mode), req->bitblt_mode,
rga_get_rotate_mode_str(req->rotate_mode));
pr_info("src: y=%lx uv=%lx v=%lx aw=%d ah=%d vw=%d vh=%d\n",
(unsigned long)req->src.yrgb_addr,
@@ -2265,7 +2066,7 @@ static void print_debug_info(struct rga2_req *req)
req->src.vir_w, req->src.vir_h);
pr_info("src: xoff=%d yoff=%d format=%s\n",
req->src.x_offset, req->src.y_offset,
rga2_get_format_name(req->src.format));
rga_get_format_name(req->src.format));
if (req->src1.yrgb_addr != 0 || req->src1.uv_addr != 0
|| req->src1.v_addr != 0) {
@@ -2277,7 +2078,7 @@ static void print_debug_info(struct rga2_req *req)
req->src1.vir_w, req->src1.vir_h);
pr_info("src1: xoff=%d yoff=%d format=%s\n",
req->src1.x_offset, req->src1.y_offset,
rga2_get_format_name(req->src1.format));
rga_get_format_name(req->src1.format));
}
pr_info("dst: y=%lx uv=%lx v=%lx aw=%d ah=%d vw=%d vh=%d\n",
@@ -2288,7 +2089,7 @@ static void print_debug_info(struct rga2_req *req)
req->dst.vir_w, req->dst.vir_h);
pr_info("dst: xoff=%d yoff=%d format=%s\n",
req->dst.x_offset, req->dst.y_offset,
rga2_get_format_name(req->dst.format));
rga_get_format_name(req->dst.format));
pr_info("mmu: src=%.2x src1=%.2x dst=%.2x els=%.2x\n",
req->mmu_info.src0_mmu_flag, req->mmu_info.src1_mmu_flag,
@@ -2296,7 +2097,7 @@ static void print_debug_info(struct rga2_req *req)
pr_info("alpha: flag %x mode0=%x mode1=%x\n", req->alpha_rop_flag,
req->alpha_mode_0, req->alpha_mode_1);
pr_info("blend mode is %s\n",
rga2_get_blend_mode_str(req->alpha_rop_flag, req->alpha_mode_0,
rga_get_blend_mode_str(req->alpha_rop_flag, req->alpha_mode_0,
req->alpha_mode_1));
pr_info("yuv2rgb mode is %x\n", req->yuv2rgb_mode);
}

204
drivers/video/rockchip/rga3/rga3_reg_info.c
View File

@@ -287,11 +287,11 @@ static void RGA3_set_reg_win0_info(u8 *base, struct rga3_req *msg)
break;
};
if (msg->win0.format <= RGA2_FORMAT_BGRA_4444
&& msg->wr.format > RGA2_FORMAT_BGRA_4444)
if (rga_is_rgb_format(msg->win0.format) &&
rga_is_yuv_format(msg->wr.format))
win_r2y = 1;
if (msg->win0.format >= RGA2_FORMAT_BGRA_4444
&& msg->wr.format < RGA2_FORMAT_BGRA_4444)
if (rga_is_yuv_format(msg->win0.format) &&
rga_is_rgb_format(msg->wr.format))
win_y2r = 1;
reg =
@@ -702,11 +702,11 @@ static void RGA3_set_reg_win1_info(u8 *base, struct rga3_req *msg)
break;
};
if (msg->win1.format <= RGA2_FORMAT_BGR_565
&& msg->wr.format > RGA2_FORMAT_BGR_565)
if (rga_is_rgb_format(msg->win1.format) &&
rga_is_yuv_format(msg->wr.format))
win_r2y = 1;
if (msg->win1.format >= RGA2_FORMAT_BGR_565
&& msg->wr.format < RGA2_FORMAT_BGR_565)
if (rga_is_yuv_format(msg->win1.format) &&
rga_is_rgb_format(msg->wr.format))
win_y2r = 1;
reg =
@@ -1196,7 +1196,7 @@ static void RGA3_set_reg_overlap_info(u8 *base, struct rga3_req *msg)
(s_RGA3_OVLP_CTRL_SW_OVLP_MODE(1)));
/* 1: yuv field, 0: rgb field */
if (msg->wr.format >= RGA2_FORMAT_BGR_565)
if (rga_is_yuv_format(msg->wr.format))
reg = ((reg & (~m_RGA3_OVLP_CTRL_SW_OVLP_FIELD)) |
(s_RGA3_OVLP_CTRL_SW_OVLP_FIELD(1)));
@@ -1337,7 +1337,7 @@ void rga_cmd_to_rga3_cmd(struct rga_req *req_rga, struct rga3_req *req)
}
/* default use 2 reg, bot_blend_m1 && bot_alpha_cal_m1 */
if (req_rga->src.format == RGA2_FORMAT_RGBA_8888)
if (rga_is_alpha_format(req_rga->src.format))
req->alpha_mode_1 = 0x0a00;
/* simple win can not support dst offset */
@@ -1745,166 +1745,10 @@ static int rga3_check_param(const struct rga3_req *req)
return 0;
}
static const char *rga3_get_blend_mode_str(u16 alpha_rop_flag, u16 alpha_mode_0,
u16 alpha_mode_1)
{
if (alpha_rop_flag == 0) {
return "no blend";
} else if (alpha_rop_flag == 0x9) {
if (alpha_mode_0 == 0x381A && alpha_mode_1 == 0x381A)
return "105 src + (1-src.a)*dst";
else if (alpha_mode_0 == 0x483A && alpha_mode_1 == 0x483A)
return "405 src.a * src + (1-src.a) * dst";
else
return "check reg for more imformation";
} else {
return "check reg for more imformation";
}
}
static const char *rga3_get_render_mode_str(u8 mode)
{
switch (mode) {
case 0x0:
return "bitblt";
case 0x1:
return "RGA_COLOR_PALETTE";
case 0x2:
return "RGA_COLOR_FILL";
case 0x3:
return "update_palette_table";
case 0x4:
return "update_patten_buff";
default:
return "UNF";
}
}
static bool rga3_is_yuv10bit_format(uint32_t format)
{
bool ret = false;
switch (format) {
case RGA2_FORMAT_YCbCr_420_SP_10B:
case RGA2_FORMAT_YCrCb_420_SP_10B:
case RGA2_FORMAT_YCbCr_422_SP_10B:
case RGA2_FORMAT_YCrCb_422_SP_10B:
ret = true;
break;
}
return ret;
}
static bool rga3_is_yuv8bit_format(uint32_t format)
{
bool ret = false;
switch (format) {
case RGA2_FORMAT_YCbCr_422_SP:
case RGA2_FORMAT_YCbCr_422_P:
case RGA2_FORMAT_YCbCr_420_SP:
case RGA2_FORMAT_YCbCr_420_P:
case RGA2_FORMAT_YCrCb_422_SP:
case RGA2_FORMAT_YCrCb_422_P:
case RGA2_FORMAT_YCrCb_420_SP:
case RGA2_FORMAT_YCrCb_420_P:
ret = true;
break;
}
return ret;
}
static const char *rga3_get_format_name(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_RGBA_8888:
return "RGBA8888";
case RGA2_FORMAT_RGBX_8888:
return "RGBX8888";
case RGA2_FORMAT_RGB_888:
return "RGB888";
case RGA2_FORMAT_BGRA_8888:
return "BGRA8888";
case RGA2_FORMAT_BGRX_8888:
return "BGRX8888";
case RGA2_FORMAT_BGR_888:
return "BGR888";
case RGA2_FORMAT_RGB_565:
return "RGB565";
case RGA2_FORMAT_RGBA_5551:
return "RGBA5551";
case RGA2_FORMAT_RGBA_4444:
return "RGBA4444";
case RGA2_FORMAT_BGR_565:
return "BGR565";
case RGA2_FORMAT_BGRA_5551:
return "BGRA5551";
case RGA2_FORMAT_BGRA_4444:
return "BGRA4444";
case RGA2_FORMAT_YCbCr_422_SP:
return "YCbCr422SP";
case RGA2_FORMAT_YCbCr_422_P:
return "YCbCr422P";
case RGA2_FORMAT_YCbCr_420_SP:
return "YCbCr420SP";
case RGA2_FORMAT_YCbCr_420_P:
return "YCbCr420P";
case RGA2_FORMAT_YCrCb_422_SP:
return "YCrCb422SP";
case RGA2_FORMAT_YCrCb_422_P:
return "YCrCb422P";
case RGA2_FORMAT_YCrCb_420_SP:
return "YCrCb420SP";
case RGA2_FORMAT_YCrCb_420_P:
return "YCrCb420P";
case RGA2_FORMAT_YVYU_422:
return "YVYU422";
case RGA2_FORMAT_YVYU_420:
return "YVYU420";
case RGA2_FORMAT_VYUY_422:
return "VYUY422";
case RGA2_FORMAT_VYUY_420:
return "VYUY420";
case RGA2_FORMAT_YUYV_422:
return "YUYV422";
case RGA2_FORMAT_YUYV_420:
return "YUYV420";
case RGA2_FORMAT_UYVY_422:
return "UYVY422";
case RGA2_FORMAT_UYVY_420:
return "UYVY420";
case RGA2_FORMAT_YCbCr_420_SP_10B:
return "YCrCb420SP10B";
case RGA2_FORMAT_YCrCb_420_SP_10B:
return "YCbCr420SP10B";
case RGA2_FORMAT_YCbCr_422_SP_10B:
return "YCbCr422SP10B";
case RGA2_FORMAT_YCrCb_422_SP_10B:
return "YCrCb422SP10B";
case RGA2_FORMAT_BPP_1:
return "BPP1";
case RGA2_FORMAT_BPP_2:
return "BPP2";
case RGA2_FORMAT_BPP_4:
return "BPP4";
case RGA2_FORMAT_BPP_8:
return "BPP8";
case RGA2_FORMAT_YCbCr_400:
return "YCbCr400";
case RGA2_FORMAT_Y4:
return "y4";
default:
return "UNF";
}
}
static void print_debug_info(struct rga3_req *req)
{
pr_info("render_mode:%s, bitblit_mode=%d, rotate_mode:%x\n",
rga3_get_render_mode_str(req->render_mode), req->bitblt_mode,
rga_get_render_mode_str(req->render_mode), req->bitblt_mode,
req->rotate_mode);
pr_info("win0: y = %lx uv = %lx v = %lx src_w = %d src_h = %d\n",
req->win0.yrgb_addr, req->win0.uv_addr, req->win0.v_addr,
@@ -1912,7 +1756,7 @@ static void print_debug_info(struct rga3_req *req)
pr_info("win0: vw = %d vh = %d xoff = %d yoff = %d format = %s\n",
req->win0.vir_w, req->win0.vir_h,
req->win0.x_offset, req->win0.y_offset,
rga3_get_format_name(req->win0.format));
rga_get_format_name(req->win0.format));
pr_info("win0: dst_w = %d, dst_h = %d, rd_mode = %d\n",
req->win0.dst_act_w, req->win0.dst_act_h, req->win0.rd_mode);
pr_info("win0: rot_mode = %d, en = %d, compact = %d, endian = %d\n",
@@ -1928,7 +1772,7 @@ static void print_debug_info(struct rga3_req *req)
pr_info("win1: vw = %d vh = %d xoff = %d yoff = %d format = %s\n",
req->win1.vir_w, req->win1.vir_h,
req->win1.x_offset, req->win1.y_offset,
rga3_get_format_name(req->win1.format));
rga_get_format_name(req->win1.format));
pr_info("win1: dst_w = %d, dst_h = %d, rd_mode = %d\n",
req->win1.dst_act_w, req->win1.dst_act_h,
req->win1.rd_mode);
@@ -1940,9 +1784,9 @@ static void print_debug_info(struct rga3_req *req)
pr_info("wr: y = %lx uv = %lx v = %lx vw = %d vh = %d\n",
req->wr.yrgb_addr, req->wr.uv_addr, req->wr.v_addr,
req->wr.vir_w, req->wr.vir_h);
pr_info("wr: ovlp_xoff = %d ovlp_yoff = %d format = %s\n, rdmode = %d\n",
pr_info("wr: ovlp_xoff = %d ovlp_yoff = %d format = %s rdmode = %d\n",
req->wr.x_offset, req->wr.y_offset,
rga3_get_format_name(req->wr.format), req->wr.rd_mode);
rga_get_format_name(req->wr.format), req->wr.rd_mode);
pr_info("mmu: win0 = %.2x win1 = %.2x wr = %.2x\n",
req->mmu_info.src0_mmu_flag, req->mmu_info.src1_mmu_flag,
@@ -1950,30 +1794,30 @@ static void print_debug_info(struct rga3_req *req)
pr_info("alpha: flag %x mode0=%x mode1=%x\n", req->alpha_rop_flag,
req->alpha_mode_0, req->alpha_mode_1);
pr_info("blend mode is %s\n",
rga3_get_blend_mode_str(req->alpha_rop_flag, req->alpha_mode_0,
rga_get_blend_mode_str(req->alpha_rop_flag, req->alpha_mode_0,
req->alpha_mode_1));
pr_info("yuv2rgb mode is %x\n", req->yuv2rgb_mode);
}
static int rga3_align_check(struct rga3_req *req)
{
if (rga3_is_yuv10bit_format(req->win0.format))
if ((req->win0.vir_w % 16) || (req->win0.x_offset % 4) ||
if (rga_is_yuv10bit_format(req->win0.format))
if ((req->win0.vir_w % 64) || (req->win0.x_offset % 4) ||
(req->win0.src_act_w % 4) || (req->win0.y_offset % 4) ||
(req->win0.src_act_h % 4) || (req->win0.vir_h % 2))
pr_info("yuv10bit err win0 wstride is not align\n");
if (rga3_is_yuv10bit_format(req->win1.format))
if ((req->win1.vir_w % 16) || (req->win1.x_offset % 4) ||
if (rga_is_yuv10bit_format(req->win1.format))
if ((req->win1.vir_w % 64) || (req->win1.x_offset % 4) ||
(req->win1.src_act_w % 4) || (req->win1.y_offset % 4) ||
(req->win1.src_act_h % 4) || (req->win1.vir_h % 2))
pr_info("yuv10bit err win1 wstride is not align\n");
if (rga3_is_yuv8bit_format(req->win0.format))
if ((req->win0.vir_w % 8) || (req->win0.x_offset % 2) ||
if (rga_is_yuv8bit_format(req->win0.format))
if ((req->win0.vir_w % 16) || (req->win0.x_offset % 2) ||
(req->win0.src_act_w % 2) || (req->win0.y_offset % 2) ||
(req->win0.src_act_h % 2) || (req->win0.vir_h % 2))
pr_info("yuv8bit err win0 wstride is not align\n");
if (rga3_is_yuv8bit_format(req->win1.format))
if ((req->win1.vir_w % 8) || (req->win1.x_offset % 2) ||
if (rga_is_yuv8bit_format(req->win1.format))
if ((req->win1.vir_w % 16) || (req->win1.x_offset % 2) ||
(req->win1.src_act_w % 2) || (req->win1.y_offset % 2) ||
(req->win1.src_act_h % 2) || (req->win1.vir_h % 2))
pr_info("yuv8bit err win1 wstride is not align\n");

392
drivers/video/rockchip/rga3/rga_common.c
View File

@@ -160,54 +160,170 @@ void rga_user_format_convert(uint32_t *df, uint32_t sf)
}
}
bool rga_is_yuv422p_format(u32 format)
bool rga_is_rgb_format(uint32_t format)
{
bool ret = false;
switch (format) {
case RGA2_FORMAT_RGBA_8888:
case RGA2_FORMAT_RGBX_8888:
case RGA2_FORMAT_RGB_888:
case RGA2_FORMAT_BGRA_8888:
case RGA2_FORMAT_BGRX_8888:
case RGA2_FORMAT_BGR_888:
case RGA2_FORMAT_RGB_565:
case RGA2_FORMAT_RGBA_5551:
case RGA2_FORMAT_RGBA_4444:
case RGA2_FORMAT_BGR_565:
case RGA2_FORMAT_BGRA_5551:
case RGA2_FORMAT_BGRA_4444:
case RGA2_FORMAT_ARGB_8888:
case RGA2_FORMAT_XRGB_8888:
case RGA2_FORMAT_ARGB_5551:
case RGA2_FORMAT_ARGB_4444:
case RGA2_FORMAT_ABGR_8888:
case RGA2_FORMAT_XBGR_8888:
case RGA2_FORMAT_ABGR_5551:
case RGA2_FORMAT_ABGR_4444:
return true;
default:
return false;
}
}
bool rga_is_yuv_format(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_Y4:
case RGA2_FORMAT_YCbCr_400:
case RGA2_FORMAT_YCbCr_422_SP:
case RGA2_FORMAT_YCbCr_422_P:
case RGA2_FORMAT_YCbCr_420_SP:
case RGA2_FORMAT_YCbCr_420_P:
case RGA2_FORMAT_YCrCb_422_SP:
case RGA2_FORMAT_YCrCb_422_P:
case RGA2_FORMAT_YCrCb_420_SP:
case RGA2_FORMAT_YCrCb_420_P:
case RGA2_FORMAT_YVYU_422:
case RGA2_FORMAT_YVYU_420:
case RGA2_FORMAT_VYUY_422:
case RGA2_FORMAT_VYUY_420:
case RGA2_FORMAT_YUYV_422:
case RGA2_FORMAT_YUYV_420:
case RGA2_FORMAT_UYVY_422:
case RGA2_FORMAT_UYVY_420:
case RGA2_FORMAT_YCbCr_420_SP_10B:
case RGA2_FORMAT_YCrCb_420_SP_10B:
case RGA2_FORMAT_YCbCr_422_SP_10B:
case RGA2_FORMAT_YCrCb_422_SP_10B:
return true;
default:
return false;
}
}
bool rga_is_alpha_format(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_RGBA_8888:
case RGA2_FORMAT_BGRA_8888:
case RGA2_FORMAT_RGBA_5551:
case RGA2_FORMAT_RGBA_4444:
case RGA2_FORMAT_BGRA_5551:
case RGA2_FORMAT_BGRA_4444:
case RGA2_FORMAT_ARGB_8888:
case RGA2_FORMAT_ARGB_5551:
case RGA2_FORMAT_ARGB_4444:
case RGA2_FORMAT_ABGR_8888:
case RGA2_FORMAT_ABGR_5551:
case RGA2_FORMAT_ABGR_4444:
return true;
default:
return false;
}
}
bool rga_is_yuv420_packed_format(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_YVYU_420:
case RGA2_FORMAT_VYUY_420:
case RGA2_FORMAT_YUYV_420:
case RGA2_FORMAT_UYVY_420:
return true;
default:
return false;
}
}
bool rga_is_yuv422_packed_format(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_YVYU_422:
case RGA2_FORMAT_VYUY_422:
case RGA2_FORMAT_YUYV_422:
case RGA2_FORMAT_UYVY_422:
return true;
default:
return false;
}
}
bool rga_is_yuv8bit_format(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_Y4:
case RGA2_FORMAT_YCbCr_400:
case RGA2_FORMAT_YCbCr_422_SP:
case RGA2_FORMAT_YCbCr_422_P:
case RGA2_FORMAT_YCbCr_420_SP:
case RGA2_FORMAT_YCbCr_420_P:
case RGA2_FORMAT_YCrCb_422_SP:
case RGA2_FORMAT_YCrCb_422_P:
case RGA2_FORMAT_YCrCb_420_SP:
case RGA2_FORMAT_YCrCb_420_P:
case RGA2_FORMAT_YVYU_422:
case RGA2_FORMAT_YVYU_420:
case RGA2_FORMAT_VYUY_422:
case RGA2_FORMAT_VYUY_420:
case RGA2_FORMAT_YUYV_422:
case RGA2_FORMAT_YUYV_420:
case RGA2_FORMAT_UYVY_422:
case RGA2_FORMAT_UYVY_420:
return true;
default:
return false;
}
}
bool rga_is_yuv10bit_format(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_YCbCr_420_SP_10B:
case RGA2_FORMAT_YCrCb_420_SP_10B:
case RGA2_FORMAT_YCbCr_422_SP_10B:
case RGA2_FORMAT_YCrCb_422_SP_10B:
return true;
default:
return false;
}
}
bool rga_is_yuv422p_format(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_YCbCr_422_P:
case RGA2_FORMAT_YCrCb_422_P:
ret = true;
break;
}
return ret;
}
void rga_convert_addr(struct rga_img_info_t *img, bool before_vir_get_channel)
{
uint32_t fmt = 0;
rga_user_format_convert(&fmt, img->format);
/*
* If it is not using dma fd, the virtual/phyical address is assigned
* to the address of the corresponding channel.
*/
//img->yrgb_addr = img->uv_addr;
/*
* if before_vir_get_channel is true, then convert addr by default
* when has iova (before_vir_get_channel is false),
* need to consider whether fbc case
*/
if (img->rd_mode != RGA_FBC_MODE || before_vir_get_channel) {
img->uv_addr = img->yrgb_addr + (img->vir_w * img->vir_h);
//warning: rga3 may need /2 for all
if (rga_is_yuv422p_format(fmt))
img->v_addr =
img->uv_addr + (img->vir_w * img->vir_h) / 2;
else
img->v_addr =
img->uv_addr + (img->vir_w * img->vir_h) / 4;
} else {
img->uv_addr = img->yrgb_addr;
img->v_addr = 0;
return true;
default:
return false;
}
}
int rga_get_format_bits(u32 format)
int rga_get_format_bits(uint32_t format)
{
int bits = 0;
@@ -261,3 +377,199 @@ int rga_get_format_bits(u32 format)
return bits;
}
const char *rga_get_format_name(uint32_t format)
{
switch (format) {
case RGA2_FORMAT_RGBA_8888:
return "RGBA8888";
case RGA2_FORMAT_RGBX_8888:
return "RGBX8888";
case RGA2_FORMAT_RGB_888:
return "RGB888";
case RGA2_FORMAT_BGRA_8888:
return "BGRA8888";
case RGA2_FORMAT_BGRX_8888:
return "BGRX8888";
case RGA2_FORMAT_BGR_888:
return "BGR888";
case RGA2_FORMAT_RGB_565:
return "RGB565";
case RGA2_FORMAT_RGBA_5551:
return "RGBA5551";
case RGA2_FORMAT_RGBA_4444:
return "RGBA4444";
case RGA2_FORMAT_BGR_565:
return "BGR565";
case RGA2_FORMAT_BGRA_5551:
return "BGRA5551";
case RGA2_FORMAT_BGRA_4444:
return "BGRA4444";
case RGA2_FORMAT_YCbCr_422_SP:
return "YCbCr422SP";
case RGA2_FORMAT_YCbCr_422_P:
return "YCbCr422P";
case RGA2_FORMAT_YCbCr_420_SP:
return "YCbCr420SP";
case RGA2_FORMAT_YCbCr_420_P:
return "YCbCr420P";
case RGA2_FORMAT_YCrCb_422_SP:
return "YCrCb422SP";
case RGA2_FORMAT_YCrCb_422_P:
return "YCrCb422P";
case RGA2_FORMAT_YCrCb_420_SP:
return "YCrCb420SP";
case RGA2_FORMAT_YCrCb_420_P:
return "YCrCb420P";
case RGA2_FORMAT_YVYU_422:
return "YVYU422";
case RGA2_FORMAT_YVYU_420:
return "YVYU420";
case RGA2_FORMAT_VYUY_422:
return "VYUY422";
case RGA2_FORMAT_VYUY_420:
return "VYUY420";
case RGA2_FORMAT_YUYV_422:
return "YUYV422";
case RGA2_FORMAT_YUYV_420:
return "YUYV420";
case RGA2_FORMAT_UYVY_422:
return "UYVY422";
case RGA2_FORMAT_UYVY_420:
return "UYVY420";
case RGA2_FORMAT_YCbCr_420_SP_10B:
return "YCrCb420SP10B";
case RGA2_FORMAT_YCrCb_420_SP_10B:
return "YCbCr420SP10B";
case RGA2_FORMAT_YCbCr_422_SP_10B:
return "YCbCr422SP10B";
case RGA2_FORMAT_YCrCb_422_SP_10B:
return "YCrCb422SP10B";
case RGA2_FORMAT_BPP_1:
return "BPP1";
case RGA2_FORMAT_BPP_2:
return "BPP2";
case RGA2_FORMAT_BPP_4:
return "BPP4";
case RGA2_FORMAT_BPP_8:
return "BPP8";
case RGA2_FORMAT_YCbCr_400:
return "YCbCr400";
case RGA2_FORMAT_Y4:
return "y4";
case RGA2_FORMAT_ARGB_8888:
return "ARGB8888";
case RGA2_FORMAT_XRGB_8888:
return "XRGB8888";
case RGA2_FORMAT_ARGB_5551:
return "ARGB5551";
case RGA2_FORMAT_ARGB_4444:
return "ARGB4444";
case RGA2_FORMAT_ABGR_8888:
return "ABGR8888";
case RGA2_FORMAT_XBGR_8888:
return "XBGR8888";
case RGA2_FORMAT_ABGR_5551:
return "ABGR5551";
case RGA2_FORMAT_ABGR_4444:
return "ABGR4444";
default:
return "UNF";
}
}
const char *rga_get_render_mode_str(uint8_t mode)
{
switch (mode) {
case 0x0:
return "bitblt";
case 0x1:
return "RGA_COLOR_PALETTE";
case 0x2:
return "RGA_COLOR_FILL";
case 0x3:
return "update_palette_table";
case 0x4:
return "update_patten_buff";
default:
return "UNF";
}
}
const char *rga_get_rotate_mode_str(uint8_t mode)
{
switch (mode) {
case 0x0:
return "0";
case 0x1:
return "90 degree";
case 0x2:
return "180 degree";
case 0x3:
return "270 degree";
case 0x10:
return "xmirror";
case 0x20:
return "ymirror";
case 0x30:
return "xymirror";
default:
return "UNF";
}
}
const char *rga_get_blend_mode_str(uint16_t alpha_rop_flag,
uint16_t alpha_mode_0,
uint16_t alpha_mode_1)
{
if (alpha_rop_flag == 0) {
return "no blend";
} else if (alpha_rop_flag == 0x9) {
if (alpha_mode_0 == 0x381A && alpha_mode_1 == 0x381A)
return "105 src + (1-src.a)*dst";
else if (alpha_mode_0 == 0x483A && alpha_mode_1 == 0x483A)
return "405 src.a * src + (1-src.a) * dst";
else
return "check reg for more imformation";
} else {
return "check reg for more imformation";
}
}
void rga_convert_addr(struct rga_img_info_t *img, bool before_vir_get_channel)
{
uint32_t fmt = 0;
rga_user_format_convert(&fmt, img->format);
/*
* If it is not using dma fd, the virtual/phyical address is assigned
* to the address of the corresponding channel.
*/
//img->yrgb_addr = img->uv_addr;
/*
* if before_vir_get_channel is true, then convert addr by default
* when has iova (before_vir_get_channel is false),
* need to consider whether fbc case
*/
if (img->rd_mode != RGA_FBC_MODE || before_vir_get_channel) {
img->uv_addr = img->yrgb_addr + (img->vir_w * img->vir_h);
//warning: rga3 may need /2 for all
if (rga_is_yuv422p_format(fmt))
img->v_addr =
img->uv_addr + (img->vir_w * img->vir_h) / 2;
else
img->v_addr =
img->uv_addr + (img->vir_w * img->vir_h) / 4;
} else {
img->uv_addr = img->yrgb_addr;
img->v_addr = 0;
}
}