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video: rockchip: dp: add support for nanoc discret vr device.

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add feature of SUPPORT_RK_DISCRETE_VR for discrete vr device in dp,
and add sync code for nanoc vr device.

Change-Id: I5fe1f29ede8ac35f99b62e524bf541a7aaee4307
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
This commit is contained in:
wenping.zhang
2016-09-01 13:25:02 +08:00
committed by Huang, Tao
parent 5ae6a5184d
commit 7636cd2d50
2 changed files with 22 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/video/rockchip/dp/rockchip_dp.c
View File

@@ -205,7 +205,8 @@ int cdn_dp_fb_register(struct platform_device *pdev, void *dp)
SUPPORT_4K_4096 |
SUPPORT_YUV420 |
SUPPORT_YCBCR_INPUT |
SUPPORT_TMDS_600M;
SUPPORT_TMDS_600M |
SUPPORT_RK_DISCRETE_VR;
dp_dev->hdmi = rockchip_hdmi_register(rk_cdn_dp_prop,
rk_dp_ops);

20
drivers/video/rockchip/dp/rockchip_dp_core.c
View File

@@ -103,6 +103,7 @@ void cdn_dp_encoder_disable(void *dp)
static void cdn_dp_commit(struct cdn_dp_device *dp)
{
char guid[16];
int ret = cdn_dp_training_start(dp);
if (ret) {
@@ -116,6 +117,25 @@ static void cdn_dp_commit(struct cdn_dp_device *dp)
return;
}
dev_info(dp->dev, "rate:%d, lanes:%d\n",
dp->link.rate, dp->link.num_lanes);
/**
* Use dpcd@0x0030~0x003f(which is GUID registers) to sync with NanoC
* to make sure training is ok. Nanoc will write "nanoc" in GUID registers
* when booting, and then we will use these registers to decide whether
* need to sync with device which plugged in.
* The sync register is 0x0035, firstly we write 0xaa to sync register,
* nanoc will read this register and then start the part2 code of DP.
*/
ret = cdn_dp_dpcd_read(dp, 0x0030, guid, 8);
if (ret == 0 && guid[0] == 'n' && guid[1] == 'a' && guid[2] == 'n' &&
guid[3] == 'o' && guid[4] == 'c') {
u8 sync_number = 0xaa;
cdn_dp_dpcd_write(dp, 0x0035, sync_number);
}
if (cdn_dp_set_video_status(dp, CONTROL_VIDEO_IDLE))
return;