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arm64: dts: rockchip: create a new dts for discrete vr based on rev2 box.
Change-Id: Ib7a2ea19063ea59a9c6df4762f1925f0efbc28cb Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
This commit is contained in:
wenping.zhang
committed by
Huang, Tao
Huang, Tao
parent
89aa30d880
commit
764c6d1e43
@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-box-808-android.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-box-rev1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-box-rev1-disvr.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-box-rev2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-box-rev2-disvr.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-box-rev1-next.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-box-rev2-next.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb-rev1-android.dtb
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221
arch/arm64/boot/dts/rockchip/rk3399-box-rev2-disvr.dts
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221
arch/arm64/boot/dts/rockchip/rk3399-box-rev2-disvr.dts
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@@ -0,0 +1,221 @@
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/*
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* Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "rk3399-box.dtsi"
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/ {
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model = "Rockchip RK3399 Board rev2 (BOX)";
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compatible = "rockchip-box-rev2","rockchip,rk3399-box";
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mpu6500_hid {
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status = "okay";
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compatible = "inv-hid,mpu6500";
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};
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};
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&pinctrl {
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sdio0 {
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sdio0_bus1: sdio0-bus1 {
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rockchip,pins =
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<2 20 RK_FUNC_1 &pcfg_pull_up_20ma>;
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};
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sdio0_bus4: sdio0-bus4 {
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rockchip,pins =
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<2 20 RK_FUNC_1 &pcfg_pull_up_20ma>,
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<2 21 RK_FUNC_1 &pcfg_pull_up_20ma>,
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<2 22 RK_FUNC_1 &pcfg_pull_up_20ma>,
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<2 23 RK_FUNC_1 &pcfg_pull_up_20ma>;
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};
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sdio0_cmd: sdio0-cmd {
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rockchip,pins =
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<2 24 RK_FUNC_1 &pcfg_pull_up_20ma>;
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};
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sdio0_clk: sdio0-clk {
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rockchip,pins =
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<2 25 RK_FUNC_1 &pcfg_pull_none_20ma>;
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};
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};
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sdmmc {
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sdmmc_bus1: sdmmc-bus1 {
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rockchip,pins =
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<4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
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};
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sdmmc_bus4: sdmmc-bus4 {
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rockchip,pins =
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<4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
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<4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
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<4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
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<4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
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};
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sdmmc_clk: sdmmc-clk {
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rockchip,pins =
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<4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
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};
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sdmmc_cmd: sdmmc-cmd {
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rockchip,pins =
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<4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
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};
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};
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fusb30x {
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fusb0_int: fusb0-int {
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rockchip,pins =
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<1 2 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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pmic {
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vsel1_gpio: vsel1-gpio {
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rockchip,pins =
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<1 18 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&i2c4 {
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status = "okay";
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fusb0: fusb30x@22 {
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compatible = "fairchild,fusb302";
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reg = <0x22>;
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pinctrl-names = "default";
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pinctrl-0 = <&fusb0_int>;
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vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
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int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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/*
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* if your hardware board have two typec port, you should define
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* fusb1 and tcphy1, such as:
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*&tcphy1 {
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* status = "okay";
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* extcon = <&fusb1>;
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*};
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*&cdn_dp_fb {
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* status = "okay";
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* extcon = <&fusb0>, <&fusb1>;
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* dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
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* dp_defaultmode = <0>;
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*};
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*/
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&tcphy0 {
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status = "okay";
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extcon = <&fusb0>;
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};
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&cdn_dp_fb {
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status = "okay";
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extcon = <&fusb0>;
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dp_vop_sel = <DISPLAY_SOURCE_LCDC0>;
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dp_defaultmode = <0>;
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};
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&cdn_dp_sound {
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status = "disabled";
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};
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&hdmi_rk_fb {
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status = "okay";
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rockchip,hdmi_video_source = <DISPLAY_SOURCE_LCDC1>;
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};
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&hdmi_sound {
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status = "okay";
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};
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&vopb_rk_fb {
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status = "okay";
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};
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&vopl_rk_fb {
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status = "okay";
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};
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&disp_timings {
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/* for rayken dp */
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native-mode = <&timing1>;
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timing1 {
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screen-width = <68>;
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screen-hight = <120>;
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};
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};
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/*
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* if the screen of vr helmet has a high screen resolution or
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* high refresh rate,please increase the lowest gpu(gpu_opp_table)
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* and cpu(cluster1_opp) frequence.
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*/
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&gpu_opp_table {
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opp@200000000 {
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status = "disabled";
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};
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opp@297000000 {
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status = "disabled";
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};
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};
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&cluster1_opp {
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opp@408000000 {
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status = "disabled";
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};
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opp@600000000 {
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status = "disabled";
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};
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opp@816000000 {
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status = "disabled";
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};
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};
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&vdd_cpu_b {
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vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
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fcs,suspend-voltage-selector = <0>;
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};
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