shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 03:40:35 +09:00
Code Issues Packages Projects Releases Wiki Activity

ARM64: dts: rockchip: fix i2c clk for rk3399

Browse Source 
Change-Id: I2edcdb4955d9ae5659d2a8f6f5c5e5b089759d9f
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu
2016-03-17 02:43:10 +08:00
parent 6345180a58
commit 774211f3fe
1 changed files with 27 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

54
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@@ -381,10 +381,10 @@
};
i2c0: i2c@ff3c0000 {
compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff3c0000 0x0 0x1000>;
clocks = <&cru PCLK_I2C0_PMU>, <&cru SCLK_I2C0_PMU>;
clock-names = "i2c", "i2c_sclk";
clocks = <&cru SCLK_I2C0_PMU>, <&cru PCLK_I2C0_PMU>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_xfer>;
@@ -394,10 +394,10 @@
};
i2c1: i2c@ff110000 {
compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff110000 0x0 0x1000>;
clocks = <&cru PCLK_I2C1>, <&cru SCLK_I2C1>;
clock-names = "i2c", "i2c_sclk";
clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_xfer>;
@@ -407,10 +407,10 @@
};
i2c2: i2c@ff120000 {
compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff120000 0x0 0x1000>;
clocks = <&cru PCLK_I2C2>, <&cru SCLK_I2C2>;
clock-names = "i2c", "i2c_sclk";
clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_xfer>;
@@ -420,10 +420,10 @@
};
i2c3: i2c@ff130000 {
compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff130000 0x0 0x1000>;
clocks = <&cru PCLK_I2C3>, <&cru SCLK_I2C3>;
clock-names = "i2c", "i2c_sclk";
clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_xfer>;
@@ -433,10 +433,10 @@
};
i2c5: i2c@ff140000 {
compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff140000 0x0 0x1000>;
clocks = <&cru PCLK_I2C5>, <&cru SCLK_I2C5>;
clock-names = "i2c", "i2c_sclk";
clocks = <&cru SCLK_I2C5>, <&cru PCLK_I2C5>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c5_xfer>;
@@ -446,10 +446,10 @@
};
i2c6: i2c@ff150000 {
compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff150000 0x0 0x1000>;
clocks = <&cru PCLK_I2C6>, <&cru SCLK_I2C6>;
clock-names = "i2c", "i2c_sclk";
clocks = <&cru SCLK_I2C6>, <&cru PCLK_I2C6>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c6_xfer>;
@@ -459,10 +459,10 @@
};
i2c7: i2c@ff160000 {
compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff160000 0x0 0x1000>;
clocks = <&cru PCLK_I2C7>, <&cru SCLK_I2C7>;
clock-names = "i2c", "i2c_sclk";
clocks = <&cru SCLK_I2C7>, <&cru PCLK_I2C7>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c7_xfer>;
@@ -693,10 +693,10 @@
};
i2c4: i2c@ff3d0000 {
compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff3d0000 0x0 0x1000>;
clocks = <&cru PCLK_I2C4_PMU>, <&cru SCLK_I2C4_PMU>;
clock-names = "i2c", "i2c_sclk";
clocks = <&cru SCLK_I2C4_PMU>, <&cru PCLK_I2C4_PMU>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4_xfer>;
@@ -706,10 +706,10 @@
};
i2c8: i2c@ff3e0000 {
compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
compatible = "rockchip,rk3399-i2c";
reg = <0x0 0xff3e0000 0x0 0x1000>;
clocks = <&cru PCLK_I2C8_PMU>, <&cru SCLK_I2C8_PMU>;
clock-names = "i2c", "i2c_sclk";
clocks = <&cru SCLK_I2C8_PMU>, <&cru PCLK_I2C8_PMU>;
clock-names = "i2c", "pclk";
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c8_xfer>;