shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 20:07:46 +09:00
Code Issues Packages Projects Releases Wiki Activity

drm/rockchip: analogix_dp: fix Condition of CDR fail

Browse Source 
In DP spec 1.3, Condition of CR fail are outlined
in section 3.5.1.2.2.1, figure 3-20:

1. Maximum Voltage Swing reached
2. Same Voltage five times

The following conditions have been optimized:
1. Training of CDR still failed while maximum voltage swing has been applied and configured
2.Removed the redundant judgment for the maximum pre-emphasis level reached

Change-Id: I829437e0294663a6cb1f31feb91e1d6a468ed681
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
This commit is contained in:
Guochun Huang
2024-04-09 10:54:16 +08:00
committed by Tao Huang
parent 4d0cc7b05a
commit 77b8a97e6d
1 changed files with 8 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
View File

@@ -548,9 +548,15 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
pre_emphasis)
dp->link_train.cr_loop[lane]++;
/*
* In DP spec 1.3, Condition of CR fail are
* outlined in section 3.5.1.2.2.1, figure 3-20:
*
* 1. Maximum Voltage Swing reached
* 2. Same Voltage five times
*/
if (dp->link_train.cr_loop[lane] == MAX_CR_LOOP ||
voltage_swing == VOLTAGE_LEVEL_3 ||
pre_emphasis == PRE_EMPHASIS_LEVEL_3) {
DPCD_VOLTAGE_SWING_GET(training_lane) == VOLTAGE_LEVEL_3) {
dev_err(dp->dev, "CR Max reached (%d,%d,%d)\n",
dp->link_train.cr_loop[lane],
voltage_swing, pre_emphasis);