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video: rockchip: rga3: add hardware check for RGA2P

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Change-Id: I38ec6fe53f60af397803c693d5edcebe2c4296fd
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
This commit is contained in:
Yu Qiaowei
2023-11-22 18:13:20 +08:00
committed by Tao Huang
parent 48165b2e30
commit 78365dd0d6
4 changed files with 248 additions and 2 deletions
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4
drivers/video/rockchip/rga3/include/rga_hw_config.h
View File

@@ -20,6 +20,9 @@ enum rga_hw_support_format_index {
RGA_RASTER_INDEX,
RGA_AFBC16x16_INDEX,
RGA_TILE8x8_INDEX,
RGA_TILE4x4_INDEX,
RGA_RKFBC64x4_INDEX,
RGA_AFBC32x8_INDEX,
RGA_FORMAT_INDEX_BUTT,
};
@@ -70,6 +73,7 @@ extern const struct rga_hw_data rga3_data;
extern const struct rga_hw_data rga2e_data;
extern const struct rga_hw_data rga2e_1106_data;
extern const struct rga_hw_data rga2e_iommu_data;
extern const struct rga_hw_data rga2p_iommu_data;
/* Returns false if in range, true otherwise */
static inline bool rga_hw_out_of_range(const struct rga_rect_range *range, int width, int height)

5
drivers/video/rockchip/rga3/rga_drv.c
View File

@@ -1454,9 +1454,10 @@ static int rga_drv_probe(struct platform_device *pdev)
if (!strcmp(scheduler->version.str, "3.3.87975"))
scheduler->data = &rga2e_1106_data;
else if (!strcmp(scheduler->version.str, "3.6.92812") ||
!strcmp(scheduler->version.str, "3.7.93215") ||
!strcmp(scheduler->version.str, "3.e.19357"))
!strcmp(scheduler->version.str, "3.7.93215"))
scheduler->data = &rga2e_iommu_data;
else if (!strcmp(scheduler->version.str, "3.e.19357"))
scheduler->data = &rga2p_iommu_data;
else
scheduler->data = &rga2e_data;
}

229
drivers/video/rockchip/rga3/rga_hw_config.c
View File

@@ -172,6 +172,166 @@ const uint32_t rga2e_output_raster_format[] = {
RGA_FORMAT_ABGR_4444,
};
const uint32_t rga2p_input_raster_format[] = {
RGA_FORMAT_RGBA_8888,
RGA_FORMAT_RGBX_8888,
RGA_FORMAT_BGRA_8888,
RGA_FORMAT_BGRX_8888,
RGA_FORMAT_RGB_888,
RGA_FORMAT_BGR_888,
RGA_FORMAT_RGB_565,
RGA_FORMAT_BGR_565,
RGA_FORMAT_YCbCr_422_P,
RGA_FORMAT_YCbCr_420_P,
RGA_FORMAT_YCrCb_422_P,
RGA_FORMAT_YCrCb_420_P,
RGA_FORMAT_YCbCr_422_SP,
RGA_FORMAT_YCbCr_420_SP,
RGA_FORMAT_YCrCb_422_SP,
RGA_FORMAT_YCrCb_420_SP,
RGA_FORMAT_YVYU_422,
RGA_FORMAT_VYUY_422,
RGA_FORMAT_YUYV_422,
RGA_FORMAT_UYVY_422,
RGA_FORMAT_YCbCr_420_SP_10B,
RGA_FORMAT_YCrCb_420_SP_10B,
RGA_FORMAT_YCbCr_422_SP_10B,
RGA_FORMAT_YCrCb_422_SP_10B,
RGA_FORMAT_YCbCr_400,
RGA_FORMAT_RGBA_5551,
RGA_FORMAT_BGRA_5551,
RGA_FORMAT_RGBA_4444,
RGA_FORMAT_BGRA_4444,
RGA_FORMAT_XRGB_8888,
RGA_FORMAT_XBGR_8888,
RGA_FORMAT_BPP1,
RGA_FORMAT_BPP2,
RGA_FORMAT_BPP4,
RGA_FORMAT_BPP8,
RGA_FORMAT_ARGB_8888,
RGA_FORMAT_ARGB_5551,
RGA_FORMAT_ARGB_4444,
RGA_FORMAT_ABGR_8888,
RGA_FORMAT_ABGR_5551,
RGA_FORMAT_ABGR_4444,
RGA_FORMAT_RGBA_2BPP,
RGA_FORMAT_A8,
RGA_FORMAT_YCbCr_444_SP,
RGA_FORMAT_YCrCb_444_SP,
};
const uint32_t rga2p_input1_raster_format[] = {
RGA_FORMAT_RGBA_8888,
RGA_FORMAT_BGRA_8888,
RGA_FORMAT_RGBX_8888,
RGA_FORMAT_BGRX_8888,
RGA_FORMAT_XRGB_8888,
RGA_FORMAT_XBGR_8888,
RGA_FORMAT_ARGB_8888,
RGA_FORMAT_ABGR_8888,
RGA_FORMAT_RGBA_5551,
RGA_FORMAT_BGRA_5551,
RGA_FORMAT_ARGB_5551,
RGA_FORMAT_ABGR_5551,
RGA_FORMAT_RGBA_4444,
RGA_FORMAT_BGRA_4444,
RGA_FORMAT_ARGB_4444,
RGA_FORMAT_ABGR_4444,
RGA_FORMAT_RGB_888,
RGA_FORMAT_BGR_888,
RGA_FORMAT_RGB_565,
RGA_FORMAT_BGR_565,
RGA_FORMAT_A8,
};
const uint32_t rga2p_output_raster_format[] = {
RGA_FORMAT_RGBA_8888,
RGA_FORMAT_RGBX_8888,
RGA_FORMAT_BGRA_8888,
RGA_FORMAT_BGRX_8888,
RGA_FORMAT_RGB_888,
RGA_FORMAT_BGR_888,
RGA_FORMAT_RGB_565,
RGA_FORMAT_BGR_565,
RGA_FORMAT_YCbCr_422_P,
RGA_FORMAT_YCbCr_420_P,
RGA_FORMAT_YCrCb_422_P,
RGA_FORMAT_YCrCb_420_P,
RGA_FORMAT_YCbCr_422_SP,
RGA_FORMAT_YCbCr_420_SP,
RGA_FORMAT_YCrCb_422_SP,
RGA_FORMAT_YCrCb_420_SP,
RGA_FORMAT_YVYU_420,
RGA_FORMAT_VYUY_420,
RGA_FORMAT_YUYV_420,
RGA_FORMAT_UYVY_420,
RGA_FORMAT_YVYU_422,
RGA_FORMAT_VYUY_422,
RGA_FORMAT_YUYV_422,
RGA_FORMAT_UYVY_422,
RGA_FORMAT_YCbCr_420_SP_10B,
RGA_FORMAT_YCrCb_420_SP_10B,
RGA_FORMAT_YCbCr_422_SP_10B,
RGA_FORMAT_YCrCb_422_SP_10B,
RGA_FORMAT_Y4,
RGA_FORMAT_YCbCr_400,
RGA_FORMAT_RGBA_5551,
RGA_FORMAT_BGRA_5551,
RGA_FORMAT_RGBA_4444,
RGA_FORMAT_BGRA_4444,
RGA_FORMAT_XRGB_8888,
RGA_FORMAT_XBGR_8888,
RGA_FORMAT_ARGB_8888,
RGA_FORMAT_ARGB_5551,
RGA_FORMAT_ARGB_4444,
RGA_FORMAT_ABGR_8888,
RGA_FORMAT_ABGR_5551,
RGA_FORMAT_ABGR_4444,
RGA_FORMAT_YCbCr_444_SP,
RGA_FORMAT_YCrCb_444_SP,
};
const uint32_t rga2p_tile4x4_format[] = {
RGA_FORMAT_YCbCr_400,
RGA_FORMAT_YCbCr_420_SP,
RGA_FORMAT_YCrCb_420_SP,
RGA_FORMAT_YCbCr_422_SP,
RGA_FORMAT_YCrCb_422_SP,
RGA_FORMAT_YCbCr_444_SP,
RGA_FORMAT_YCrCb_444_SP,
RGA_FORMAT_YCbCr_420_SP_10B,
RGA_FORMAT_YCrCb_420_SP_10B,
RGA_FORMAT_YCbCr_422_SP_10B,
RGA_FORMAT_YCrCb_422_SP_10B,
};
const uint32_t rga2p_rkfbc64x4_format[] = {
RGA_FORMAT_YCbCr_400,
RGA_FORMAT_YCbCr_420_SP,
RGA_FORMAT_YCrCb_420_SP,
RGA_FORMAT_YCbCr_422_SP,
RGA_FORMAT_YCrCb_422_SP,
RGA_FORMAT_YCbCr_444_SP,
RGA_FORMAT_YCrCb_444_SP,
RGA_FORMAT_YCbCr_420_SP_10B,
RGA_FORMAT_YCrCb_420_SP_10B,
RGA_FORMAT_YCbCr_422_SP_10B,
RGA_FORMAT_YCrCb_422_SP_10B,
};
const uint32_t rga2p_afbc32x8_format[] = {
RGA_FORMAT_RGBA_8888,
RGA_FORMAT_BGRA_8888,
RGA_FORMAT_RGBX_8888,
RGA_FORMAT_BGRX_8888,
RGA_FORMAT_XRGB_8888,
RGA_FORMAT_XBGR_8888,
RGA_FORMAT_ARGB_8888,
RGA_FORMAT_ABGR_8888,
RGA_FORMAT_RGB_888,
RGA_FORMAT_BGR_888,
};
const struct rga_win_data rga3_win_data[] = {
{
.name = "rga3-win0",
@@ -254,6 +414,49 @@ const struct rga_win_data rga2e_win_data[] = {
},
};
const struct rga_win_data rga2p_win_data[] = {
{
.name = "rga2p-src0",
.formats[RGA_RASTER_INDEX] = rga2p_input_raster_format,
.formats_count[RGA_RASTER_INDEX] = ARRAY_SIZE(rga2p_input_raster_format),
.formats[RGA_TILE4x4_INDEX] = rga2p_tile4x4_format,
.formats_count[RGA_TILE4x4_INDEX] = ARRAY_SIZE(rga2p_tile4x4_format),
.formats[RGA_RKFBC64x4_INDEX] = rga2p_rkfbc64x4_format,
.formats_count[RGA_RKFBC64x4_INDEX] = ARRAY_SIZE(rga2p_rkfbc64x4_format),
.formats[RGA_AFBC32x8_INDEX] = rga2p_afbc32x8_format,
.formats_count[RGA_AFBC32x8_INDEX] = ARRAY_SIZE(rga2p_afbc32x8_format),
.supported_rotations = RGA_MODE_ROTATE_MASK,
.scale_up_mode = RGA_SCALE_UP_BIC,
.scale_down_mode = RGA_SCALE_DOWN_AVG,
.rd_mode = RGA_RASTER_MODE | RGA_TILE4x4_MODE | RGA_RKFBC_MODE | RGA_AFBC32x8_MODE,
},
{
.name = "rga2p-src1",
.formats[RGA_RASTER_INDEX] = rga2p_input1_raster_format,
.formats_count[RGA_RASTER_INDEX] = ARRAY_SIZE(rga2p_input1_raster_format),
.supported_rotations = RGA_MODE_ROTATE_MASK,
.scale_up_mode = RGA_SCALE_UP_BIC,
.scale_down_mode = RGA_SCALE_DOWN_AVG,
.rd_mode = RGA_RASTER_MODE | RGA_TILE4x4_MODE | RGA_RKFBC_MODE | RGA_AFBC32x8_MODE,
},
{
.name = "rga2p-dst",
.formats[RGA_RASTER_INDEX] = rga2p_output_raster_format,
.formats_count[RGA_RASTER_INDEX] = ARRAY_SIZE(rga2p_output_raster_format),
.formats[RGA_TILE4x4_INDEX] = rga2p_tile4x4_format,
.formats_count[RGA_TILE4x4_INDEX] = ARRAY_SIZE(rga2p_tile4x4_format),
.supported_rotations = 0,
.scale_up_mode = RGA_SCALE_UP_NONE,
.scale_down_mode = RGA_SCALE_DOWN_NONE,
.rd_mode = RGA_RASTER_MODE | RGA_TILE4x4_MODE,
},
};
const struct rga_hw_data rga3_data = {
.version = 0,
.input_range = {{68, 2}, {8176, 8176}},
@@ -350,3 +553,29 @@ const struct rga_hw_data rga2e_iommu_data = {
RGA_MODE_CSC_BT709,
.mmu = RGA_IOMMU,
};
const struct rga_hw_data rga2p_iommu_data = {
.version = 0,
.input_range = {{2, 2}, {8192, 8192}},
.output_range = {{2, 2}, {8192, 8192}},
.win = rga2p_win_data,
.win_size = ARRAY_SIZE(rga2p_win_data),
/* 1 << factor mean real factor */
.max_upscale_factor = 4,
.max_downscale_factor = 4,
.byte_stride_align = 4,
.max_byte_stride = WORD_TO_BYTE(8192),
.feature = RGA_COLOR_FILL | RGA_COLOR_PALETTE |
RGA_COLOR_KEY | RGA_ROP_CALCULATE |
RGA_NN_QUANTIZE | RGA_DITHER | RGA_MOSAIC |
RGA_YIN_YOUT | RGA_YUV_HDS | RGA_YUV_VDS |
RGA_OSD | RGA_PRE_INTR | RGA_FULL_CSC,
.csc_r2y_mode = RGA_MODE_CSC_BT601L | RGA_MODE_CSC_BT601F |
RGA_MODE_CSC_BT709,
.csc_y2r_mode = RGA_MODE_CSC_BT601L | RGA_MODE_CSC_BT601F |
RGA_MODE_CSC_BT709,
.mmu = RGA_IOMMU,
};

12
drivers/video/rockchip/rga3/rga_policy.c
View File

@@ -124,6 +124,18 @@ static bool rga_check_format(const struct rga_hw_data *data,
formats = data->win[win_num].formats[RGA_TILE8x8_INDEX];
format_count = data->win[win_num].formats_count[RGA_TILE8x8_INDEX];
break;
case RGA_TILE4x4_MODE:
formats = data->win[win_num].formats[RGA_TILE4x4_INDEX];
format_count = data->win[win_num].formats_count[RGA_TILE4x4_INDEX];
break;
case RGA_RKFBC_MODE:
formats = data->win[win_num].formats[RGA_RKFBC64x4_INDEX];
format_count = data->win[win_num].formats_count[RGA_RKFBC64x4_INDEX];
break;
case RGA_AFBC32x8_MODE:
formats = data->win[win_num].formats[RGA_AFBC32x8_INDEX];
format_count = data->win[win_num].formats_count[RGA_AFBC32x8_INDEX];
break;
default:
return false;
}