media: rockchip: vicap: rk3588s2 max support 5 mipi

logic node  -> real hw

mipi_dcphy0 -> csi0 01 lane(or 4 lane, no used csi_dphy5)
mipi_dcphy1 -> dcphy1
csi_dphy1   -> csi1 01 lane
csi_dphy2   -> csi1 23 lane
csi_dphy5   -> csi0 23 lane

Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I33251ee31e60737c113107d2a47154e69d291760
This commit is contained in:
Zefa Chen
2024-06-05 09:18:59 +08:00
committed by Tao Huang
parent 7c4f13c632
commit 78a3b3d34a

View File

@@ -2814,6 +2814,8 @@ int rkcif_plat_init(struct rkcif_device *cif_dev, struct device_node *node, int
cif_dev->csi_host_idx = 4;
else if (cif_dev->csi_host_idx == 3)
cif_dev->csi_host_idx = 5;
else if (cif_dev->csi_host_idx == 5)
cif_dev->csi_host_idx = 3;
v4l2_info(&cif_dev->v4l2_dev, "rk3588s2 attach to mipi%d\n",
cif_dev->csi_host_idx);
}