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ARM: dts: rockchip: rv1109-evb-ddr3-v12-facial-gate: ov2718 link to rx1

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Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Change-Id: Ifa1d513dfa15f9f463a58895e4e64b4bded879ed
This commit is contained in:
Lin Jianhua
2020-07-31 16:41:05 +08:00
committed by Tao Huang
parent 3b5d077e7f
commit 78a58ce5b6
1 changed files with 42 additions and 9 deletions
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51
arch/arm/boot/dts/rv1109-evb-ddr3-v12-facial-gate.dts
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@@ -28,6 +28,24 @@
ports {
port@0 {
mipi_in_ucam0: endpoint@1 {
/delete-property/ remote-endpoint;
data-lanes = <1 2>;
};
};
};
};
&csi_dphy1 {
ports {
port@0 {
csi_dphy1_input: endpoint@1 {
remote-endpoint = <&ucam_out1>;
data-lanes = <1 2>;
};
};
port@1 {
csi_dphy1_output: endpoint@0 {
remote-endpoint = <&isp_in>;
data-lanes = <1 2>;
};
};
@@ -36,6 +54,7 @@
&i2c1 {
/delete-node/ ar0230@10;
/delete-node/ ov4689@36;
/delete-node/ os04a10@36;
ov2718: ov2718@10 {
compatible = "ovti,ov2718";
@@ -44,36 +63,36 @@
clock-names = "xvclk";
power-domains = <&power RV1126_PD_VI>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&mipicsi_clk0>;
pinctrl-0 = <&mipicsi_clk1>;
avdd-supply = <&vcc_avdd>;
dovdd-supply = <&vcc_dovdd>;
dvdd-supply = <&vcc_dvdd>;
pwd-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
pwd-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "YT-RV1109-3-V1";
rockchip,camera-module-lens-name = "M43-4IR-2MP-F2";
ir-cut = <&cam_ircut0>;
port {
ucam_out0: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
ucam_out1: endpoint {
remote-endpoint = <&csi_dphy1_input>;
data-lanes = <1 2>;
};
};
};
};
&mipi_csi2 {
status = "disabled";
};
&pwm11 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm11m1_pins_pull_down>;
};
&rkcif {
status = "disabled";
};
&rk809 {
regulators {
vcc_dvdd: LDO_REG6 {
@@ -87,3 +106,17 @@
};
};
};
&rkcif {
status = "disabled";
};
&rkisp {
ports {
port@0 {
isp_in: endpoint@0 {
remote-endpoint = <&csi_dphy1_output>;
};
};
};
};