GPU: Rogue_M: support gpu dvfs & adjust code.

1. Add GPU dvfs support.
2. Adjust the code indentation.
3. Use late_initcall instead of module_init to load gpu driver.

Change-Id: I9bac24b567b43ae6a395d9bac1b1d7e2729c48b4
Signed-off-by: zxl <zhuangxl@rock-chips.com>
This commit is contained in:
zxl
2016-01-13 14:08:09 +08:00
parent 05cf816fff
commit 78ee7c5c07
6 changed files with 1497 additions and 1581 deletions

View File

@@ -80,3 +80,7 @@
&cpu_b0 {
cpu-supply = <&syr827>;
};
&gpu {
logic-supply = <&vdd_logic>;
};

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@@ -773,9 +773,16 @@
<&cru ACLK_GPU_MEM>,
<&cru ACLK_GPU_CFG>;
clock-names =
"clk_gpu",
"sclk_gpu_core",
"aclk_gpu_mem",
"aclk_gpu_cfg";
operating-points = <
/* KHz uV */
200000 1100000
288000 1100000
400000 1150000
576000 1200000
>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "rogue-g6110-irq";
};

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@@ -1,5 +1,6 @@
config POWERVR_ROGUE_M
tristate "PowerVR Rogue M"
select PM_OPP
default n
help
Driver for PowerVR Rogue hardware.

View File

@@ -631,5 +631,5 @@ static void __exit PVRCore_Cleanup(void)
* statically as well; in both cases they define the function the kernel will
* run to start/stop the driver.
*/
module_init(PVRCore_Init);
late_initcall(PVRCore_Init);
module_exit(PVRCore_Cleanup);

File diff suppressed because it is too large Load Diff

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@@ -9,8 +9,8 @@
/****************************************************************************
Add Rockchip modificatons here!
*****************************************************************************/
#define RK33_DVFS_SUPPORT 1 // 1:DVFS on 0:DVFS off
#define RK33_SYSFS_FILE_SUPPORT 1 // 1:add information nodes in /sys/devices/ffa30000.gpu/
#define RK33_DVFS_SUPPORT 1 // 1:DVFS on 0:DVFS off
#define RK33_SYSFS_FILE_SUPPORT 1 // 1:add information nodes in /sys/devices/ffa30000.gpu/
//RK33_USE_RGX_GET_GPU_UTIL and RK33_USE_CUSTOMER_GET_GPU_UTIL are mutually exclusive
#define RK33_USE_RGX_GET_GPU_UTIL 1
@@ -29,7 +29,6 @@
#define RK33_DVFS_FREQ 50
#define RK33_DEFAULT_CLOCK 400
#define RK33_DVFS_FREQ_LIMIT 1
#define RK_RESERVED 0
#define RGX_DVFS_CURRENT_FREQ 0
#define FPS_DEFAULT_GAP 300
@@ -51,112 +50,107 @@
#define RK_EXPORT_API(func) EXPORT_SYMBOL(func);
typedef struct _rgx_dvfs_info
{
IMG_UINT voltage;
IMG_UINT clock;
IMG_INT min_threshold;
IMG_INT max_threshold;
IMG_UINT64 time;
IMG_UINT coef;
typedef struct _rgx_dvfs_info {
IMG_UINT voltage;
IMG_UINT clock;
IMG_INT min_threshold;
IMG_INT max_threshold;
IMG_UINT64 time;
IMG_UINT coef;
} rgx_dvfs_info;
typedef struct _rgx_dvfs_status_type
{
IMG_INT step;
IMG_INT utilisation;
IMG_UINT32 temperature;
IMG_UINT32 temperature_time;
typedef struct _rgx_dvfs_status_type {
IMG_INT step;
IMG_INT utilisation;
IMG_UINT32 temperature;
IMG_UINT32 temperature_time;
#if 0
IMG_INT upper_lock;
IMG_INT under_lock;
IMG_INT upper_lock;
IMG_INT under_lock;
#endif
} rgx_dvfs_status;
enum
{
DBG_OFF = 0,
DBG_LOW,
DBG_HIGH,
enum {
DBG_OFF = 0,
DBG_LOW,
DBG_HIGH,
};
struct rk_utilis
{
IMG_INT utilis[RK33_MAX_UTILIS];
IMG_INT time_busys[RK33_MAX_UTILIS];
IMG_INT time_idles[RK33_MAX_UTILIS];
struct rk_utilis {
IMG_INT utilis[RK33_MAX_UTILIS];
IMG_INT time_busys[RK33_MAX_UTILIS];
IMG_INT time_idles[RK33_MAX_UTILIS];
};
struct rk_context
{
/** Indicator if system clock to mail-t604 is active */
IMG_INT cmu_pmu_status;
/** cmd & pmu lock */
spinlock_t cmu_pmu_lock;
/*Timer*/
spinlock_t timer_lock;
struct rk_context {
/** Indicator if system clock to mail-t604 is active */
IMG_INT cmu_pmu_status;
/** cmd & pmu lock */
spinlock_t cmu_pmu_lock;
/*Timer */
spinlock_t timer_lock;
#if OPEN_GPU_PD
IMG_BOOL bEnablePd;
struct clk *pd_gpu_0;
struct clk *pd_gpu_1;
IMG_BOOL bEnablePd;
struct clk *pd_gpu_0;
struct clk *pd_gpu_1;
#endif
//struct clk *aclk_gpu;
struct clk *aclk_gpu_mem;
struct clk *aclk_gpu_cfg;
struct clk *clk_gpu;
struct dvfs_node *gpu_clk_node;
//struct clk *aclk_gpu;
struct clk *aclk_gpu_mem;
struct clk *aclk_gpu_cfg;
struct clk *sclk_gpu_core;
struct regulator *gpu_reg;
PVRSRV_DEVICE_NODE *psDeviceNode;
RGXFWIF_GPU_UTIL_STATS sUtilStats;
IMG_BOOL gpu_active;
IMG_BOOL dvfs_enabled;
PVRSRV_DEVICE_NODE *psDeviceNode;
RGXFWIF_GPU_UTIL_STATS sUtilStats;
IMG_BOOL gpu_active;
IMG_BOOL dvfs_enabled;
#if RK33_DVFS_SUPPORT
#if RK33_USE_CUSTOMER_GET_GPU_UTIL
ktime_t time_period_start;
ktime_t time_period_start;
#endif
/*Temperature*/
IMG_UINT32 temperature;
IMG_UINT32 temperature_time;
/*Temperature */
IMG_UINT32 temperature;
IMG_UINT32 temperature_time;
#if USE_HRTIMER
struct hrtimer timer;
struct hrtimer timer;
#endif
IMG_BOOL timer_active;
IMG_BOOL timer_active;
#if USE_KTHREAD
/*dvfs kthread*/
struct task_struct *dvfs_task;
wait_queue_head_t dvfs_wait;
/*dvfs kthread */
struct task_struct *dvfs_task;
wait_queue_head_t dvfs_wait;
#endif
/*To calculate utilization for x sec */
IMG_INT freq_level;
IMG_INT freq;
IMG_INT time_tick;
struct rk_utilis stUtilis;
IMG_INT utilisation;
IMG_UINT32 time_busy;
IMG_UINT32 time_idle;
/*To calculate utilization for x sec */
IMG_INT freq_level;
IMG_INT freq;
IMG_INT time_tick;
struct rk_utilis stUtilis;
IMG_INT utilisation;
IMG_UINT32 time_busy;
IMG_UINT32 time_idle;
#if RK33_USE_CL_COUNT_UTILS
IMG_UINT32 abs_load[4];
IMG_UINT32 abs_load[4];
#endif
#if RK33_SYSFS_FILE_SUPPORT
#if RK33_DVFS_FREQ_LIMIT
IMG_INT up_level;
IMG_INT down_level;
#endif //end of RK33_DVFS_FREQ_LIMIT
IMG_INT debug_level;
IMG_UINT fps_gap;
IMG_INT fix_freq;
#endif //end of RK33_SYSFS_FILE_SUPPORT
IMG_INT up_level;
IMG_INT down_level;
#endif //end of RK33_DVFS_FREQ_LIMIT
IMG_INT debug_level;
IMG_UINT fps_gap;
IMG_INT fix_freq;
#endif //end of RK33_SYSFS_FILE_SUPPORT
#endif //end of RK33_DVFS_SUPPORT
#endif //end of RK33_DVFS_SUPPORT
};
IMG_VOID RgxRkInit(IMG_VOID);
@@ -174,6 +168,10 @@ IMG_BOOL rk33_clear_device_node(IMG_VOID);
PVRSRV_ERROR IonInit(void *pvPrivateData);
IMG_VOID IonDeinit(IMG_VOID);
PVRSRV_ERROR RkPrePowerState(PVRSRV_DEV_POWER_STATE eNewPowerState, PVRSRV_DEV_POWER_STATE eCurrentPowerState, IMG_BOOL bForced);
PVRSRV_ERROR RkPostPowerState(PVRSRV_DEV_POWER_STATE eNewPowerState, PVRSRV_DEV_POWER_STATE eCurrentPowerState, IMG_BOOL bForced);
PVRSRV_ERROR RkPrePowerState(PVRSRV_DEV_POWER_STATE eNewPowerState,
PVRSRV_DEV_POWER_STATE eCurrentPowerState,
IMG_BOOL bForced);
PVRSRV_ERROR RkPostPowerState(PVRSRV_DEV_POWER_STATE eNewPowerState,
PVRSRV_DEV_POWER_STATE eCurrentPowerState,
IMG_BOOL bForced);
#endif /* __SUNXI_INIT__ */