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Merge tag 'tegra-for-6.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.5-rc1 Several new modules and devices are documented and fixes incorporated for the Tegra234 GPIO controller pin mappings as well as the possible Tegra XUDC PHY connections. * tag 'tegra-for-6.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: tegra: Document Jetson Orin Nano Developer Kit dt-bindings: tegra: Document Jetson Orin Nano dt-bindings: gpio: Remove FSI domain ports on Tegra234 dt-bindings: usb: tegra-xudc: Remove extraneous PHYs dt-bindings: tegra: Add ICC IDs for dummy memory clients dt-bindings: tegra: Document compatible for IGX Link: https://lore.kernel.org/r/20230609193620.2275240-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@@ -167,6 +167,11 @@ properties:
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- const: nvidia,p3737-0000+p3701-0000
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- const: nvidia,p3701-0000
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- const: nvidia,tegra234
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- description: NVIDIA IGX Orin Development Kit
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items:
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- const: nvidia,p3740-0002+p3701-0008
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- const: nvidia,p3701-0008
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- const: nvidia,tegra234
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- description: Jetson Orin NX
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items:
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- const: nvidia,p3767-0000
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@@ -176,5 +181,14 @@ properties:
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- const: nvidia,p3768-0000+p3767-0000
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- const: nvidia,p3767-0000
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- const: nvidia,tegra234
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- description: Jetson Orin Nano
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items:
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- const: nvidia,p3767-0005
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- const: nvidia,tegra234
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- description: Jetson Orin Nano Developer Kit
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items:
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- const: nvidia,p3768-0000+p3767-0005
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- const: nvidia,p3767-0005
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- const: nvidia,tegra234
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additionalProperties: true
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@@ -91,6 +91,7 @@ properties:
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phys:
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minItems: 1
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maxItems: 2
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description:
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Must contain an entry for each entry in phy-names.
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See ../phy/phy-bindings.txt for details.
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@@ -99,13 +100,7 @@ properties:
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minItems: 1
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items:
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- const: usb2-0
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- const: usb2-1
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- const: usb2-2
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- const: usb2-3
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- const: usb3-0
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- const: usb3-1
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- const: usb3-2
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- const: usb3-3
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avddio-usb-supply:
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description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
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@@ -33,18 +33,14 @@
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#define TEGRA234_MAIN_GPIO_PORT_P 14
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#define TEGRA234_MAIN_GPIO_PORT_Q 15
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#define TEGRA234_MAIN_GPIO_PORT_R 16
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#define TEGRA234_MAIN_GPIO_PORT_S 17
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#define TEGRA234_MAIN_GPIO_PORT_T 18
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#define TEGRA234_MAIN_GPIO_PORT_U 19
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#define TEGRA234_MAIN_GPIO_PORT_V 20
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#define TEGRA234_MAIN_GPIO_PORT_X 21
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#define TEGRA234_MAIN_GPIO_PORT_Y 22
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#define TEGRA234_MAIN_GPIO_PORT_Z 23
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#define TEGRA234_MAIN_GPIO_PORT_AC 24
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#define TEGRA234_MAIN_GPIO_PORT_AD 25
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#define TEGRA234_MAIN_GPIO_PORT_AE 26
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#define TEGRA234_MAIN_GPIO_PORT_AF 27
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#define TEGRA234_MAIN_GPIO_PORT_AG 28
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#define TEGRA234_MAIN_GPIO_PORT_X 17
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#define TEGRA234_MAIN_GPIO_PORT_Y 18
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#define TEGRA234_MAIN_GPIO_PORT_Z 19
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#define TEGRA234_MAIN_GPIO_PORT_AC 20
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#define TEGRA234_MAIN_GPIO_PORT_AD 21
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#define TEGRA234_MAIN_GPIO_PORT_AE 22
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#define TEGRA234_MAIN_GPIO_PORT_AF 23
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#define TEGRA234_MAIN_GPIO_PORT_AG 24
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#define TEGRA234_MAIN_GPIO(port, offset) \
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((TEGRA234_MAIN_GPIO_PORT_##port * 8) + offset)
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@@ -536,4 +536,9 @@
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#define TEGRA234_MEMORY_CLIENT_NVJPG1SRD 0x123
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#define TEGRA234_MEMORY_CLIENT_NVJPG1SWR 0x124
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/* ICC ID's for dummy MC clients used to represent CPU Clusters */
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#define TEGRA_ICC_MC_CPU_CLUSTER0 1003
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#define TEGRA_ICC_MC_CPU_CLUSTER1 1004
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#define TEGRA_ICC_MC_CPU_CLUSTER2 1005
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#endif
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