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ARM: dts: rockchip: rk3126-bnd-m88-emmc: Update display nodes
Change-Id: Ib465fea01ba83df0b8c6f9d4b39c3de6cae671fe Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
@@ -74,27 +74,24 @@
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default-brightness-level = <128>;
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};
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lvds-panel {
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panel {
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compatible = "simple-panel";
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backlight = <&backlight>;
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power-supply = <&ldo6>;
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power-invert;
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backlight = <&backlight>;
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bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
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rockchip,data-width = <18>;
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rockchip,output = "rgb";
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width-mm = <153>;
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height-mm = <85>;
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status = "okay";
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enable-delay-ms = <120>;
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disable-delay-ms = <20>;
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unprepare-delay-ms = <20>;
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bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
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width-mm = <153>;
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height-mm = <85>;
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <54620160>; // 64fps //
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clock-frequency = <51200000>;
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hactive = <1024>;
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vactive = <600>;
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hback-porch = <100>;
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@@ -111,8 +108,8 @@
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};
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port {
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panel_in_lvds: endpoint {
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remote-endpoint = <&lvds_out_panel>;
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panel_in_rgb: endpoint {
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remote-endpoint = <&rgb_out_panel>;
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};
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};
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};
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@@ -482,12 +479,9 @@
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&pinctrl {
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lcdc {
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lcdc_lcdc: lcdc-lcdc {
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lcdc_rgb_pins: lcdc-rgb-pins {
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rockchip,pins =
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/* depend on the hardware */
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<2 RK_PB0 1 &pcfg_pull_none>, /* DCLK */
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/* <2 RK_PB1 1 &pcfg_pull_none>, /* HSYNC */
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/* <2 RK_PB2 1 &pcfg_pull_none>, /* VSYNC */
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<2 RK_PB3 1 &pcfg_pull_none>, /* DEN */
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<2 RK_PB4 1 &pcfg_pull_none>, /* DATA10 */
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<2 RK_PB5 1 &pcfg_pull_none>, /* DATA11 */
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@@ -497,12 +491,20 @@
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<2 RK_PC1 1 &pcfg_pull_none>, /* DATA15 */
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<2 RK_PC2 1 &pcfg_pull_none>, /* DATA16 */
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<2 RK_PC3 1 &pcfg_pull_none>; /* DATA17 */
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/* <2 RK_PC4 1 &pcfg_pull_none>, /* DATA18 */
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/* <2 RK_PC5 1 &pcfg_pull_none>, /* DATA19 */
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/* <2 RK_PC6 1 &pcfg_pull_none>, /* DATA20 */
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/* <2 RK_PC7 1 &pcfg_pull_none>, /* DATA21 */
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/* <2 RK_PD0 1 &pcfg_pull_none>, /* DATA22 */
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/* <2 RK_PD1 1 &pcfg_pull_none>; /* DATA23 */
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};
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lcdc_sleep_pins: lcdc-sleep-pins {
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rockchip,pins =
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<2 RK_PB0 0 &pcfg_pull_none>, /* DCLK */
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<2 RK_PB3 0 &pcfg_pull_none>, /* DEN */
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<2 RK_PB4 0 &pcfg_pull_none>, /* DATA10 */
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<2 RK_PB5 0 &pcfg_pull_none>, /* DATA11 */
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<2 RK_PB6 0 &pcfg_pull_none>, /* DATA12 */
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<2 RK_PB7 0 &pcfg_pull_none>, /* DATA13 */
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<2 RK_PC0 0 &pcfg_pull_none>, /* DATA14 */
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<2 RK_PC1 0 &pcfg_pull_none>, /* DATA15 */
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<2 RK_PC2 0 &pcfg_pull_none>, /* DATA16 */
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<2 RK_PC3 0 &pcfg_pull_none>; /* DATA17 */
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};
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};
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@@ -559,22 +561,24 @@
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status = "okay";
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};
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&lvds {
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&rgb {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&lcdc_rgb_pins>;
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pinctrl-1 = <&lcdc_sleep_pins>;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&lcdc_lcdc>;
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ports {
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port@1 {
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reg = <1>;
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lvds_out_panel: endpoint {
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remote-endpoint = <&panel_in_lvds>;
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rgb_out_panel: endpoint {
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remote-endpoint = <&panel_in_rgb>;
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};
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};
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};
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};
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&route_lvds {
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&route_rgb {
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status = "okay";
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};
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