arm64: dts: mediatek: asurada: Enable internal display

The asurada platform has an ANX7625 bridge connecting the DSI's output
to the internal eDP panel. Add and enable these devices in order to get
a usable internal display.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20221102190611.283546-4-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Nícolas F. R. A. Prado
2022-11-02 15:06:09 -04:00
committed by Matthias Brugger
parent ea65d256e1
commit 7b3da2180b

View File

@@ -198,6 +198,14 @@
};
};
&dsi0 {
status = "okay";
};
&dsi_out {
remote-endpoint = <&anx7625_in>;
};
&i2c0 {
status = "okay";
@@ -246,6 +254,53 @@
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
anx_bridge: anx7625@58 {
compatible = "analogix,anx7625";
reg = <0x58>;
pinctrl-names = "default";
pinctrl-0 = <&anx7625_pins>;
enable-gpios = <&pio 41 GPIO_ACTIVE_HIGH>;
reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
vdd10-supply = <&pp1000_mipibrdg>;
vdd18-supply = <&pp1800_mipibrdg>;
vdd33-supply = <&pp3300_mipibrdg>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
anx7625_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
port@1 {
reg = <1>;
anx7625_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
aux-bus {
panel: panel {
compatible = "edp-panel";
power-supply = <&pp3300_mipibrdg>;
backlight = <&backlight_lcd0>;
port {
panel_in: endpoint {
remote-endpoint = <&anx7625_out>;
};
};
};
};
};
};
&i2c7 {
@@ -256,6 +311,10 @@
pinctrl-0 = <&i2c7_pins>;
};
&mipi_tx0 {
status = "okay";
};
&mmc0 {
status = "okay";
@@ -587,6 +646,20 @@
"AUD_DAT_MISO0",
"AUD_DAT_MISO1";
anx7625_pins: anx7625-default-pins {
pins-out {
pinmux = <PINMUX_GPIO41__FUNC_GPIO41>,
<PINMUX_GPIO42__FUNC_GPIO42>;
output-low;
};
pins-in {
pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
input-enable;
bias-pull-up;
};
};
cr50_int: cr50-irq-default-pins {
pins-gsc-ap-int-odl {
pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;