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mfd: display-serdes: Add support for max96749

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Change-Id: I983bad88dcf06b1d7b00d091e033fe41b7b11277
Signed-off-by: Zitong Cai <zitong.cai@rock-chips.com>
This commit is contained in:
Zitong Cai
2025-06-26 19:14:13 +08:00
committed by Tao Huang
parent 4f3c5c6bc7
commit 7bdbb62d0f
12 changed files with 1251 additions and 0 deletions
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2
drivers/mfd/display-serdes/core.h
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@@ -404,6 +404,7 @@ struct serdes {
struct kthread_delayed_work reg_check_work;
bool use_reg_check_work;
bool dual_link;
bool split_mode_enable;
unsigned int reg_hw;
unsigned int reg_use;
@@ -459,6 +460,7 @@ void serdes_destroy_debugfs(struct serdes *serdes);
extern struct serdes_chip_data serdes_bu18tl82_data;
extern struct serdes_chip_data serdes_bu18rl82_data;
extern struct serdes_chip_data serdes_max96745_data;
extern struct serdes_chip_data serdes_max96749_data;
extern struct serdes_chip_data serdes_max96752_data;
extern struct serdes_chip_data serdes_max96755_data;
extern struct serdes_chip_data serdes_max96772_data;

30
drivers/mfd/display-serdes/gpio.h
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@@ -43,6 +43,7 @@ enum serdes_id {
ROHM_ID_BU18RL82,
MAXIM_ID_MAX96745,
MAXIM_ID_MAX96749,
MAXIM_ID_MAX96752,
MAXIM_ID_MAX96755,
MAXIM_ID_MAX96772,
@@ -107,6 +108,35 @@ enum max96745_gpio_list {
MAXIM_MAX96745_MFP25,
};
enum max96749_gpio_list {
MAXIM_MAX96749_MFP0 = 0,
MAXIM_MAX96749_MFP1,
MAXIM_MAX96749_MFP2,
MAXIM_MAX96749_MFP3,
MAXIM_MAX96749_MFP4,
MAXIM_MAX96749_MFP5,
MAXIM_MAX96749_MFP6,
MAXIM_MAX96749_MFP7,
MAXIM_MAX96749_MFP8,
MAXIM_MAX96749_MFP9,
MAXIM_MAX96749_MFP10,
MAXIM_MAX96749_MFP11,
MAXIM_MAX96749_MFP12,
MAXIM_MAX96749_MFP13,
MAXIM_MAX96749_MFP14,
MAXIM_MAX96749_MFP15,
MAXIM_MAX96749_MFP16,
MAXIM_MAX96749_MFP17,
MAXIM_MAX96749_MFP18,
MAXIM_MAX96749_MFP19,
MAXIM_MAX96749_MFP20,
MAXIM_MAX96749_MFP21,
MAXIM_MAX96749_MFP22,
MAXIM_MAX96749_MFP23,
MAXIM_MAX96749_MFP24,
MAXIM_MAX96749_MFP25,
};
enum max96752_gpio_list {
MAXIM_MAX96752_GPIO0 = 0,
MAXIM_MAX96752_GPIO1,

6
drivers/mfd/display-serdes/maxim/Kconfig
View File

@@ -17,6 +17,12 @@ config SERDES_DISPLAY_CHIP_MAXIM_MAX96745
help
To support maxim max96745 display serdes.
config SERDES_DISPLAY_CHIP_MAXIM_MAX96749
tristate "maxim max96749 serdes"
default y
help
To support maxim max96749 display serdes.
config SERDES_DISPLAY_CHIP_MAXIM_MAX96752
tristate "maxim max96752 serdes"
default y

1
drivers/mfd/display-serdes/maxim/Makefile
View File

@@ -3,6 +3,7 @@
# maxim display serdes drivers configuration
#
obj-$(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96745) += maxim-max96745.o
obj-$(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96749) += maxim-max96749.o
obj-$(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96752) += maxim-max96752.o
obj-$(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96755) += maxim-max96755.o
obj-$(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96772) += maxim-max96772.o

1028
drivers/mfd/display-serdes/maxim/maxim-max96749.c Normal file
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File diff suppressed because it is too large Load Diff

146
drivers/mfd/display-serdes/maxim/maxim-max96749.h Normal file
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@@ -0,0 +1,146 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* maxim-max96749.h -- register define for max96749 chip
*
* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
*
* Author: ZITONG CAI <zitong.cai@rock-chips.com>
*
*/
#ifndef __MFD_SERDES_MAXIM_MAX96745_H__
#define __MFD_SERDES_MAXIM_MAX96745_H__
#include <linux/bitfield.h>
#define GPIO_A_REG(gpio) (0x0200 + ((gpio) * 8))
#define GPIO_B_REG(gpio) (0x0201 + ((gpio) * 8))
#define GPIO_C_REG(gpio) (0x0202 + ((gpio) * 8))
#define GPIO_D_REG(gpio) (0x0203 + ((gpio) * 8))
/* 0005h */
#define PU_LF3 BIT(3)
#define PU_LF2 BIT(2)
#define PU_LF1 BIT(1)
#define PU_LF0 BIT(0)
/* 0010h */
#define RESET_ALL BIT(7)
#define SLEEP BIT(3)
/* 0011h */
#define CXTP_B BIT(2)
#define CXTP_A BIT(0)
/* 0013h */
#define LOCKED BIT(3)
#define ERROR BIT(2)
/* 0021h */
#define LINKA_LOCKED BIT(2)
#define LINKB_LOCKED BIT(3)
/* 0026h */
#define LF_0 GENMASK(2, 0)
#define LF_1 GENMASK(6, 4)
/* 0027h */
#define LF_2 GENMASK(2, 0)
#define LF_3 GENMASK(6, 4)
/* 0028h, 0032h */
#define LINK_EN BIT(7)
#define TX_RATE GENMASK(3, 2)
/* 0029h, 0033h */
#define RESET_LINK BIT(0)
#define RESET_ONESHOT BIT(1)
/* 0045h */
#define DUAL_LINK_MODE BIT(1)
/* 002Ah, 0034h */
#define LINK_LOCKED BIT(0)
/* 0076h, 0086h */
#define DIS_REM_CC BIT(7)
/* 0100h */
#define VID_LINK_SEL GENMASK(2, 1)
#define VID_TX_EN BIT(0)
/* 0101h */
#define BPP GENMASK(5, 0)
/* 0102h */
#define PCLKDET_A BIT(7)
#define DRIFT_ERR_A BIT(6)
#define OVERFLOW_A BIT(5)
#define FIFO_WARN_A BIT(4)
#define LIM_HEART BIT(2)
/* 0107h */
#define VID_TX_ACTIVE_B BIT(7)
#define VID_TX_ACTIVE_A BIT(6)
/* 0108h */
#define PCLKDET_B BIT(7)
#define DRIFT_ERR_B BIT(6)
#define OVERFLOW_B BIT(5)
#define FIFO_WARN_B BIT(4)
/* 0200h */
#define RES_CFG BIT(7)
#define TX_COM_EN BIT(5)
#define GPIO_OUT BIT(4)
#define GPIO_IN BIT(3)
#define GPIO_OUT_DIS BIT(0)
/* 0201h */
#define PULL_UPDN_SEL GENMASK(7, 6)
#define OUT_TYPE BIT(5)
#define GPIO_TX_ID GENMASK(4, 0)
/* 0202h */
#define OVR_RES_CFG BIT(7)
#define IO_EDGE_RATE GENMASK(6, 5)
#define GPIO_RX_ID GENMASK(4, 0)
/* 0203h */
#define GPIO_IO_RX_EN BIT(5)
#define GPIO_OUT_LGC BIT(4)
#define GPIO_RX_EN_B BIT(3)
#define GPIO_TX_EN_B BIT(2)
#define GPIO_RX_EN_A BIT(1)
#define GPIO_TX_EN_A BIT(0)
/* 0750h */
#define FRCZEROPAD GENMASK(7, 6)
#define FRCZPEN BIT(5)
#define FRCSDGAIN BIT(4)
#define FRCSDEN BIT(3)
#define FRCGAIN GENMASK(2, 1)
#define FRCEN BIT(0)
/* 0751h */
#define FRCDATAWIDTH BIT(3)
#define FRCASYNCEN BIT(2)
#define FRCHSPOL BIT(1)
#define FRCVSPOL BIT(0)
/* 0752h */
#define FRCDCMODE GENMASK(1, 0)
/* 641Ah */
#define DPRX_TRAIN_STATE GENMASK(7, 4)
/* 7000h */
#define LINK_ENABLE BIT(0)
/* 7070h */
#define MAX_LANE_COUNT GENMASK(7, 0)
/* 7074h */
#define MAX_LINK_RATE GENMASK(7, 0)
#endif

1
drivers/mfd/display-serdes/serdes-bridge-split.c
View File

@@ -327,6 +327,7 @@ static const struct of_device_id serdes_bridge_split_of_match[] = {
{ .compatible = "rohm,bu18tl82-bridge-split", },
{ .compatible = "rohm,bu18rl82-bridge-split", },
{ .compatible = "maxim,max96745-bridge-split", },
{ .compatible = "maxim,max96749-bridge-split", },
{ .compatible = "maxim,max96755-bridge-split", },
{ .compatible = "maxim,max96752-bridge-split", },
{ .compatible = "maxim,max96789-bridge-split", },

1
drivers/mfd/display-serdes/serdes-bridge.c
View File

@@ -326,6 +326,7 @@ static const struct of_device_id serdes_bridge_of_match[] = {
{ .compatible = "rohm,bu18tl82-bridge", },
{ .compatible = "rohm,bu18rl82-bridge", },
{ .compatible = "maxim,max96745-bridge", },
{ .compatible = "maxim,max96749-bridge", },
{ .compatible = "maxim,max96755-bridge", },
{ .compatible = "maxim,max96789-bridge", },
{ .compatible = "rockchip,rkx111-bridge", },

19
drivers/mfd/display-serdes/serdes-core.c
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@@ -49,6 +49,21 @@ static const struct mfd_cell serdes_max96745_devs[] = {
},
};
static const struct mfd_cell serdes_max96749_devs[] = {
{
.name = "serdes-pinctrl",
.of_compatible = "maxim,max96749-pinctrl",
},
{
.name = "serdes-bridge",
.of_compatible = "maxim,max96749-bridge",
},
{
.name = "serdes-bridge-split",
.of_compatible = "maxim,max96749-bridge-split",
},
};
static const struct mfd_cell serdes_max96755_devs[] = {
{
.name = "serdes-pinctrl",
@@ -364,6 +379,10 @@ int serdes_device_init(struct serdes *serdes)
serdes_devs = serdes_max96745_devs;
mfd_num = ARRAY_SIZE(serdes_max96745_devs);
break;
case MAXIM_ID_MAX96749:
serdes_devs = serdes_max96749_devs;
mfd_num = ARRAY_SIZE(serdes_max96749_devs);
break;
case MAXIM_ID_MAX96752:
serdes_devs = serdes_max96752_devs;
mfd_num = ARRAY_SIZE(serdes_max96752_devs);

1
drivers/mfd/display-serdes/serdes-gpio.c
View File

@@ -209,6 +209,7 @@ static const struct of_device_id serdes_gpio_of_match[] = {
{ .compatible = "rohm,bu18tl82-gpio", },
{ .compatible = "rohm,bu18rl82-gpio", },
{ .compatible = "maxim,max96745-gpio", },
{ .compatible = "maxim,max96749-gpio", },
{ .compatible = "maxim,max96752-gpio", },
{ .compatible = "maxim,max96755-gpio", },
{ .compatible = "maxim,max96772-gpio", },

5
drivers/mfd/display-serdes/serdes-i2c.c
View File

@@ -310,6 +310,8 @@ static int serdes_get_init_seq(struct serdes *serdes)
return err;
}
serdes->dual_link = of_property_read_bool(dev->of_node, "dual-link");
/* init ser register(not des register) more early if uboot logo disabled */
serdes->route_enable = of_property_read_bool(dev->of_node, "route-enable");
if ((!serdes->route_enable) && (serdes->chip_data->serdes_type == TYPE_SER)) {
@@ -540,6 +542,9 @@ static const struct of_device_id serdes_of_match[] = {
#if IS_ENABLED(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96745)
{ .compatible = "maxim,max96745", .data = &serdes_max96745_data },
#endif
#if IS_ENABLED(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96749)
{ .compatible = "maxim,max96749", .data = &serdes_max96749_data },
#endif
#if IS_ENABLED(CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96752)
{ .compatible = "maxim,max96752", .data = &serdes_max96752_data },
#endif

11
drivers/mfd/display-serdes/serdes-pinctrl.c
View File

@@ -30,6 +30,13 @@ static const struct mfd_cell serdes_gpio_max96745_devs[] = {
},
};
static const struct mfd_cell serdes_gpio_max96749_devs[] = {
{
.name = "serdes-gpio",
.of_compatible = "maxim,max96749-gpio",
},
};
static const struct mfd_cell serdes_gpio_max96755_devs[] = {
{
.name = "serdes-gpio",
@@ -173,6 +180,10 @@ static int serdes_pinctrl_gpio_init(struct serdes *serdes)
serdes_devs = serdes_gpio_max96745_devs;
mfd_num = ARRAY_SIZE(serdes_gpio_max96745_devs);
break;
case MAXIM_ID_MAX96749:
serdes_devs = serdes_gpio_max96749_devs;
mfd_num = ARRAY_SIZE(serdes_gpio_max96749_devs);
break;
case MAXIM_ID_MAX96752:
serdes_devs = serdes_gpio_max96752_devs;
mfd_num = ARRAY_SIZE(serdes_gpio_max96752_devs);