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hdmirx: add debug interface for HBR 8CH modde. [1/1]

Browse Source 
PD#SWPL-5813

Problem:
HBR audio cannot work on TL1

Solution:
add a debug interface force hdmi afifo in 8ch mode

Verify:
t962x2

Change-Id: Ied02f772634e2c326e18f6d6463c0ae000430e29
Signed-off-by: Lei Yang <lei.yang@amlogic.com>
This commit is contained in:
Lei Yang
2019-03-11 19:09:33 +08:00
committed by Jianxin Pan
parent 33b1aeedb8
commit 7c2800564d
5 changed files with 44 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h
View File

@@ -350,7 +350,7 @@ struct aud_info_s {
*int down_mix_inhibit;
*int level_shift_value;
*/
int aud_hbr_rcv;
int aud_packet_received;
/* channel status */

26
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c
View File

@@ -83,6 +83,8 @@ int hdcp22_on;
MODULE_PARM_DESC(hdcp22_on, "\n hdcp22_on\n");
module_param(hdcp22_on, int, 0664);
/* test for HBR CTS, audio module can set it to force 8ch */
int hbr_force_8ch = 1;
/*
* hdcp14_key_mode:hdcp1.4 key handle method select
* NORMAL_MODE:systemcontrol path
@@ -933,7 +935,8 @@ void rx_get_audinfo(struct aud_info_s *audio_info)
hdmirx_rd_bits_dwc(DWC_PDEC_AIF_PB0, CH_SPEAK_ALLOC);
audio_info->auds_layout =
hdmirx_rd_bits_dwc(DWC_PDEC_STS, PD_AUD_LAYOUT);
audio_info->aud_hbr_rcv =
hdmirx_rd_dwc(DWC_PDEC_AUD_STS) & AUDS_HBR_RCV;
audio_info->aud_packet_received =
hdmirx_rd_dwc(DWC_PDEC_AUD_STS) &
(AUDS_RCV | AUDS_HBR_RCV);
@@ -959,6 +962,7 @@ void rx_get_audio_status(struct rx_audio_stat_s *aud_sts)
(rx.avmute_skip == 0)) {
aud_sts->aud_rcv_packet = rx.aud_info.aud_packet_received;
aud_sts->aud_stb_flag = true;
aud_sts->aud_alloc = rx.aud_info.auds_ch_alloc;
aud_sts->aud_sr = rx.aud_info.real_sr;
aud_sts->aud_channel_cnt = rx.aud_info.channel_count;
aud_sts->aud_type = rx.aud_info.coding_type;
@@ -972,6 +976,17 @@ void rx_get_audio_status(struct rx_audio_stat_s *aud_sts)
}
EXPORT_SYMBOL(rx_get_audio_status);
/*
* rx_get_audio_status - interface for audio module
*/
int rx_set_audio_param(uint32_t param)
{
hbr_force_8ch = param & 1;
return 1;
}
EXPORT_SYMBOL(rx_set_audio_param);
/*
* rx_get_hdmi5v_sts - get current pwr5v status on all ports
*/
@@ -2068,7 +2083,8 @@ int hdmirx_audio_init(void)
/* DEFAULT: {27'd0, 3'd0, 2'd1} */
hdmirx_wr_dwc(DWC_PDEC_ACRM_CTRL, data32);
hdmirx_wr_bits_dwc(DWC_AUD_CTRL, DWC_AUD_HBR_ENABLE, 1);
/* unsupport HBR serial mode. invalid bit */
/* hdmirx_wr_bits_dwc(DWC_AUD_CTRL, DWC_AUD_HBR_ENABLE, 1); */
/* SAO cfg, disable I2S output, no use */
data32 = 0;
@@ -2723,7 +2739,11 @@ void hdmirx_config_audio(void)
* according to audio speaker allocation, if layout
* bit = 0, use ch1 & ch2 by default.
*/
if (rx.aud_info.auds_layout) {
if (rx.aud_info.aud_hbr_rcv && hbr_force_8ch) {
hdmirx_wr_dwc(DWC_AUD_CHEXTR_CTRL, 0xff);
if (log_level & AUDIO_LOG)
rx_pr("HBR rcv, force 8ch\n");
} else if (rx.aud_info.auds_layout) {
hdmirx_wr_bits_dwc(DWC_AUD_CHEXTR_CTRL,
AUD_CH_MAP_CFG,
rx.aud_info.auds_ch_alloc);

2
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.h
View File

@@ -1106,7 +1106,7 @@ extern int ignore_sscp_tmds;
extern int find_best_eq;
extern int eq_try_cnt;
extern void rx_get_best_eq_setting(void);
extern int hbr_force_8ch;
extern void wr_reg_hhi(unsigned int offset, unsigned int val);
extern void wr_reg_hhi_bits(unsigned int offset, unsigned int mask,
unsigned int val);

19
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c
View File

@@ -633,15 +633,6 @@ static bool check_real_sr_change(void)
return ret;
}
static unsigned char is_aud_ch_map_change(int pre, int cur)
{
unsigned char ret = 0;
if (pre != cur)
ret = 1;
return ret;
}
static const struct freq_ref_s freq_ref[] = {
/* interlace 420 3d hac vac index */
/* 420mode */
@@ -1720,6 +1711,8 @@ int rx_set_global_variable(const char *buf, int size)
return pr_var(eq_try_cnt, index);
if (set_pr_var(tmpbuf, hdcp_enc_mode, value, &index, ret))
return pr_var(hdcp_enc_mode, index);
if (set_pr_var(tmpbuf, hbr_force_8ch, value, &index, ret))
return pr_var(hbr_force_8ch, index);
return 0;
}
@@ -1825,6 +1818,7 @@ void rx_get_global_variable(const char *buf)
pr_var(find_best_eq, i++);
pr_var(eq_try_cnt, i++);
pr_var(hdcp_enc_mode, i++);
pr_var(hbr_force_8ch, i++);
}
void skip_frame(unsigned int cnt)
@@ -2093,6 +2087,7 @@ char *fsm_st[] = {
void rx_main_state_machine(void)
{
int pre_auds_ch_alloc;
int pre_auds_hbr;
switch (rx.state) {
case FSM_5V_LOST:
@@ -2344,12 +2339,14 @@ void rx_main_state_machine(void)
packet_update();
pre_auds_ch_alloc = rx.aud_info.auds_ch_alloc;
pre_auds_hbr = rx.aud_info.aud_hbr_rcv;
rx_get_audinfo(&rx.aud_info);
if (check_real_sr_change())
rx_audio_pll_sw_update();
if (is_aud_ch_map_change
(pre_auds_ch_alloc, rx.aud_info.auds_ch_alloc)) {
if ((pre_auds_ch_alloc != rx.aud_info.auds_ch_alloc) ||
((pre_auds_hbr != rx.aud_info.aud_hbr_rcv) &&
hbr_force_8ch)) {
if (log_level & AUDIO_LOG)
dump_state(RX_DUMP_AUDIO);
hdmirx_config_audio();

11
include/linux/amlogic/media/frame_provider/tvin/tvin.h
View File

@@ -505,6 +505,17 @@ struct rx_audio_stat_s {
int aud_type;
/* indicate if audio fifo start threshold is crossed */
bool afifo_thres_pass;
/*
* 0 [ch1 ch2]
* 1,2,3 [ch1 ch2 ch3 ch4]
* 4,8 [ch1 ch2 ch5 ch6]
* 5,6,7,9,10,11 [ch1 ch2 ch3 ch4 ch5 ch6]
* 12,16,24,28 [ch1 ch2 ch5 ch6 ch7 ch8]
* 20 [ch1 ch2 ch7 ch8]
* 21,22,23[ch1 ch2 ch3 ch4 ch7 ch8]
* all others [all of 8ch]
*/
int aud_alloc;
};
extern int adc_set_pll_cntl(bool on, unsigned int module_sel, void *pDtvPara);