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dtv_demod: TL1,dtmb,change frequency,show "no signal" at first [1/1]

Browse Source 
PD#SWPL-3025

Problem:
Different frequency channel switch, the channel first pops up "no signal" and then displays the channel

Solution:
do dtmb sw reset before re-tune

Verify:
verified by t962x2_x301

Change-Id: Ibc14de37f2f3f6b07af4d125e9fb58dd308e61c4
Signed-off-by: Zhiwei Yuan <zhiwei.yuan@amlogic.com>
This commit is contained in:
Zhiwei Yuan
2018-12-12 15:10:14 +08:00
committed by Dongjin Kim
parent 83486a6818
commit 7ca30cf598
6 changed files with 27 additions and 102 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/amlogic/media/dtv_demod/aml_demod.c
View File

@@ -655,7 +655,6 @@ static ssize_t aml_demod_dbg_store(struct file *file,
demod_set_sys_atsc_v4();
break;
case AML_DBG_DTMB_INIT:
demod_set_sys_dtmb_v4();
break;
default:
break;

35
drivers/amlogic/media/dtv_demod/amlfrontend.c
View File

@@ -922,7 +922,10 @@ int timer_tuner_not_enough(void)
}
unsigned int demod_get_adc_clk(void)
{
return demod_status.adc_freq;
}
static int gxtv_demod_dvbc_read_status_timer
(struct dvb_frontend *fe, enum fe_status *status)
@@ -2265,6 +2268,7 @@ void dtmb_save_status(unsigned int s)
pollm->last_s = FE_TIMEDOUT;
}
}
void dtmb_poll_start(void)
{
struct poll_machie_s *pollm = &dtvdd_devp->poll_machie;
@@ -2526,18 +2530,7 @@ static int gxtv_demod_dtmb_read_status_old
FE_HAS_VITERBI | FE_HAS_SYNC;
} else {
ilock = 0;
if (is_ic_ver(IC_VER_TL1)) {
if (timer_not_enough(D_TIMER_DETECT)) {
*status = 0;
PR_DBG("s=0\n");
} else {
*status = FE_TIMEDOUT;
timer_disable(D_TIMER_DETECT);
}
} else {
*status = FE_TIMEDOUT;
}
*status = FE_TIMEDOUT;
}
if (last_lock != ilock) {
PR_INFO("%s.\n",
@@ -2600,11 +2593,6 @@ static int gxtv_demod_dtmb_set_frontend(struct dvb_frontend *fe)
msleep(100);
/* demod_power_switch(PWR_ON); */
#if 0
if (is_ic_ver(IC_VER_TL1))
demod_set_sys_dtmb_v4();
else
#endif
dtmb_set_ch(&demod_status, /*&demod_i2c,*/ &param);
return 0;
@@ -2730,13 +2718,7 @@ static int gxtv_demod_dtmb_tune(struct dvb_frontend *fe, bool re_tune,
*delay = HZ / 4;
gxtv_demod_dtmb_set_frontend(fe);
if (is_ic_ver(IC_VER_TL1)) {
timer_begain(D_TIMER_DETECT);
firstdetet = 0;
} else {
firstdetet = dtmb_detect_first();
}
firstdetet = dtmb_detect_first();
if (firstdetet == 1) {
*status = FE_TIMEDOUT;
@@ -2874,8 +2856,7 @@ static bool enter_mode(int mode)
/*mem_buf = (long *)phys_to_virt(memstart);*/
if (mode == AM_FE_DTMB_N) {
Gxtv_Demod_Dtmb_Init(devn);
if (is_ic_ver(IC_VER_TL1))
timer_set_max(D_TIMER_DETECT, 500);
if (devn->cma_flag == 1) {
PR_DBG("CMA MODE, cma flag is %d,mem size is %d",
devn->cma_flag, devn->cma_mem_size);

53
drivers/amlogic/media/dtv_demod/demod_func.c
View File

@@ -1056,9 +1056,10 @@ int demod_set_sys(struct aml_demod_sta *demod_sta,
front_write_reg_v4(0x20,
((front_read_reg_v4(0x20) & ~0xff)
| (nco_rate & 0xff)));
front_write_reg_v4(0x20,
(front_read_reg_v4(0x20) | (1 << 8)));
front_write_reg_v4(0x39,
(front_read_reg_v4(0x39) | (1 << 30)));
} else {
demod_write_reg(DEMOD_TOP_REGC, 0x8);
PR_DBG("[open arbit]dtmb\n");
@@ -1100,56 +1101,6 @@ int memorystart = 0x29c00000;//0x35100000;//0x1ef00000;0x9300000 7ca00000
#endif
/*TL1*/
void demod_set_sys_dtmb_v4(void)
{
#if 0//move to clocks_set_sys_defaults
int nco_rate;
nco_rate = (24*256)/224+2;
//app_apb_write_reg(0xf00*4,0x11 );
demod_write_reg(DEMOD_TOP_REG0, 0x11);
//app_apb_write_reg(0xf08*4,0x201);
demod_write_reg(DEMOD_TOP_REG8, 0x201);
//app_apb_write_reg(0xf0c*4,0x11);
demod_write_reg(DEMOD_TOP_REGC, 0x11);
//app_apb_write_reg(0xe20*4,
//((app_apb_read_reg(0xe20*4) &~ 0xff)
//| (nco_rate & 0xff)));
front_write_reg_v4(0x20, ((front_read_reg_v4(0x20) & ~0xff)
| (nco_rate & 0xff)));
//app_apb_write_reg(0xe20*4, (app_apb_read_reg(0xe20*4) | (1 << 8)));
front_write_reg_v4(0x20, (front_read_reg_v4(0x20) | (1 << 8)));
#endif
//app_apb_write_reg(0x49,memorystart);
//move to enter_mode()
//dtmb_write_reg(DTMB_FRONT_MEM_ADDR, memorystart);
#if 0//move to dtmb_all_reset()
//app_apb_write_reg(0xe39, (app_apb_read_reg(0xe39) | (1 << 30)));
front_write_reg_v4(0x39, (front_read_reg_v4(0x39) | (1 << 30)));
//24M
//app_apb_write_reg(0x25, 0x6aaaaa);
//app_apb_write_reg(0x3e, 0x13196596);
//app_apb_write_reg(0x5b, 0x50a30a25);
dtmb_write_reg(DTMB_FRONT_DDC_BYPASS, 0x6aaaaa);
dtmb_write_reg(DTMB_FRONT_SRC_CONFIG1, 0x13196596);
dtmb_write_reg(0x5b << 2, 0x50a30a25);
#endif
//25m
//app_apb_write_reg(0x25, 0x62c1a5);
//app_apb_write_reg(0x3e, 0x131a747d);
//app_apb_write_reg(0x5b, 0x4d6a0a25);
//dtmb_write_reg(0x25, 0x62c1a5);
//dtmb_write_reg(0x3e, 0x131a747d);
//dtmb_write_reg(0x5b, 0x4d6a0a25);
}
void demod_set_sys_atsc_v4(void)
{
//int nco_rate;

37
drivers/amlogic/media/dtv_demod/dtmb_func.c
View File

@@ -140,6 +140,19 @@ void dtmb_all_reset(void)
dtmb_write_reg(DTMB_FRONT_46_CONFIG, 0x1a000f0f);
dtmb_write_reg(DTMB_FRONT_ST_FREQ, 0xf2400000);
dtmb_clk_set(Adc_Clk_24M);
} else if (is_ic_ver(IC_VER_TL1)) {
if (demod_get_adc_clk() == Adc_Clk_24M) {
dtmb_write_reg(DTMB_FRONT_DDC_BYPASS, 0x6aaaaa);
dtmb_write_reg(DTMB_FRONT_SRC_CONFIG1, 0x13196596);
dtmb_write_reg(0x5b << 2, 0x50a30a25);
} else if (demod_get_adc_clk() == Adc_Clk_25M) {
dtmb_write_reg(DTMB_FRONT_DDC_BYPASS, 0x62c1a5);
dtmb_write_reg(DTMB_FRONT_SRC_CONFIG1, 0x131a747d);
dtmb_write_reg(0x5b << 2, 0x4d6a0a25);
}
//for timeshift issue(chuangcheng test)
dtmb_write_reg(0x4e << 2, 0x256cf604);
} else {
dtmb_write_reg(DTMB_FRONT_AGC_CONFIG1, 0x10127);
dtmb_write_reg(DTMB_CHE_IBDFE_CONFIG6, 0x943228cc);
@@ -192,27 +205,8 @@ void dtmb_initial(struct aml_demod_sta *demod_sta)
/* dtmb_write_reg(0x049, memstart); //only for init */
/*dtmb_spectrum = 1; no use */
dtmb_spectrum = demod_sta->spectrum;
if (is_ic_ver(IC_VER_TL1)) {
front_write_reg_v4(0x39,
(front_read_reg_v4(0x39) | (1 << 30)));
if (demod_sta->adc_freq == Adc_Clk_24M) {
dtmb_write_reg(DTMB_FRONT_DDC_BYPASS, 0x6aaaaa);
dtmb_write_reg(DTMB_FRONT_SRC_CONFIG1, 0x13196596);
dtmb_write_reg(0x5b << 2, 0x50a30a25);
} else if (demod_sta->adc_freq == Adc_Clk_25M) {
dtmb_write_reg(DTMB_FRONT_DDC_BYPASS, 0x62c1a5);
dtmb_write_reg(DTMB_FRONT_SRC_CONFIG1, 0x131a747d);
dtmb_write_reg(0x5b << 2, 0x4d6a0a25);
}
//for timeshift issue(chuangcheng test)
dtmb_write_reg(0x4e << 2, 0x256cf604);
} else {
dtmb_register_reset();
dtmb_all_reset();
}
dtmb_register_reset();
dtmb_all_reset();
}
int check_dtmb_fec_lock(void)
@@ -748,6 +742,7 @@ unsigned int dtmb_detect_first(void)
has_signal = 0x1;
}
}
if (has_signal == 0x1) {
/*fsm status is 6,digital signal*/
/*fsm (1->4) 30ms,(4->5) 20ms,*/

2
drivers/amlogic/media/dtv_demod/include/demod_func.h
View File

@@ -579,7 +579,6 @@ void demod_get_reg(struct aml_demod_reg *demod_reg);
int demod_set_sys(struct aml_demod_sta *demod_sta,
/*struct aml_demod_i2c *demod_i2c,*/
struct aml_demod_sys *demod_sys);
extern void demod_set_sys_dtmb_v4(void);
extern void demod_set_sys_atsc_v4(void);
extern void set_j83b_filter_reg_v4(void);
@@ -828,6 +827,7 @@ extern unsigned int reset_reg_read(unsigned int addr);
extern void clocks_set_sys_defaults(unsigned char dvb_mode);
extern void demod_set_demod_default(void);
extern unsigned int demod_get_adc_clk(void);
extern void debug_adc_pll(void);
extern void debug_check_reg_val(unsigned int reg_mode, unsigned int reg);

1
include/uapi/linux/dvb/aml_demod.h
View File

@@ -236,7 +236,6 @@ int cap_adc_data(struct aml_cap_data *cap);
extern unsigned int get_symbol_rate(void);
extern unsigned int get_ch_freq(void);
extern unsigned int get_modu(void);
extern void demod_set_sys_dtmb_v4(void);
extern void tuner_set_atsc_para(void);
extern void tuner_set_dtmb_para(void);
extern void tuner_set_qam_para(void);