Merge commit '3d8de4fc14566ef78389a26247b70af6b452f117'

* commit '3d8de4fc14566ef78389a26247b70af6b452f117': net: wireless: rockchip_wlan: bcmdhd: Disable -Wunused-but-set-variable arm64: dts: rockchip: rk3588-vehicle-evb: fix usb3.0 power en problem video: rockchip: rga3: modify the printing of hardware version video: rockchip: rga3: remove PM's dependency on CONFIG_ROCKCHIP_FPGA video: rockchip: rga3: use macros to control the working mode of RGA2 video: rockchip: rga3: fix stride of YUV 420 packed video: rockchip: rga3: fix ovlap non-16 alignment lost alpha channel Change-Id: I5536d626f392a0f72fcb7dace6b50c232e7ba2ba Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2026-06-08 20:07:46 +09:00 · 2022-09-08 20:21:27 +08:00
parent 5d810ec4a4 3d8de4fc14
commit 7d03c601e8
8 changed files with 146 additions and 116 deletions
--- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb.dtsi
@@ -140,6 +140,20 @@
 		vin-supply = <&vcc_1v8_s0>;
 	};

+	vcc5v0_otg: vcc5v0-otg {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_otg";
+		regulator-boot-on;
+		regulator-always-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
+		vin-supply = <&vcc5v0_usb>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_otg_en>;
+	};
+
 	vcc5v0_host: vcc5v0-host {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_host";
@@ -148,7 +162,7 @@
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		enable-active-high;
-		gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
+		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
 		vin-supply = <&vcc5v0_usb>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&vcc5v0_host_en>;
@@ -456,9 +470,13 @@
 	};

 	usb {
-		vcc5v0_host_en: vcc5v0-host-en {
+		vcc5v0_otg_en: vcc5v0-otg-en {
 			rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
+
+		vcc5v0_host_en: vcc5v0-host-en {
+			rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
 	};


@@ -550,11 +568,11 @@
 };

 &u2phy1_otg {
-	phy-supply = <&vcc5v0_host>;
+	phy-supply = <&vcc5v0_otg>;
 };

 &u2phy2_host {
-	phy-supply = <&vcc5v0_host>;
+	phy-supply = <&vcc5v0_otg>;
 };

 &u2phy3_host {
--- a/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/Makefile
+++ b/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/Makefile
@@ -361,6 +361,7 @@ BCMDHD_ROOT = $(src)
 EXTRA_CFLAGS = $(DHDCFLAGS)
 EXTRA_CFLAGS += -DDHD_COMPILED=\"$(BCMDHD_ROOT)\"
 EXTRA_CFLAGS += -I$(BCMDHD_ROOT)/include/ -I$(BCMDHD_ROOT)/
+EXTRA_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
 ifeq ($(CONFIG_AP6XXX),m)
 EXTRA_LDFLAGS += --strip-debug
 endif
--- a/drivers/video/rockchip/rga3/include/rga2_reg_info.h
+++ b/drivers/video/rockchip/rga3/include/rga2_reg_info.h
@@ -4,6 +4,8 @@

 #include "rga_drv.h"

+#define RGA2_USE_MASTER_MODE		1
+
 /* General Registers */
 #define RGA2_SYS_CTRL			0x000
 #define RGA2_CMD_CTRL			0x004
@@ -411,6 +413,7 @@ void rga2_soft_reset(struct rga_scheduler_t *scheduler);
 int rga2_set_reg(struct rga_job *job, struct rga_scheduler_t *scheduler);
 int rga2_init_reg(struct rga_job *job);
 int rga2_get_version(struct rga_scheduler_t *scheduler);
+void rga2_dump_read_back_reg(struct rga_scheduler_t *scheduler);

 #endif

--- a/drivers/video/rockchip/rga3/include/rga_drv.h
+++ b/drivers/video/rockchip/rga3/include/rga_drv.h
@@ -87,7 +87,7 @@

 #define DRIVER_MAJOR_VERISON		1
 #define DRIVER_MINOR_VERSION		2
-#define DRIVER_REVISION_VERSION		18
+#define DRIVER_REVISION_VERSION		19
 #define DRIVER_PATCH_VERSION

 #define DRIVER_VERSION (STR(DRIVER_MAJOR_VERISON) "." STR(DRIVER_MINOR_VERSION) \
@@ -435,13 +435,8 @@ static inline void rga_write(int value, int offset, struct rga_scheduler_t *sche
 	writel(value, scheduler->rga_base + offset);
 }

-#ifndef CONFIG_ROCKCHIP_FPGA
 int rga_power_enable(struct rga_scheduler_t *scheduler);
 int rga_power_disable(struct rga_scheduler_t *scheduler);
-#else
-static inline int rga_power_enable(struct rga_scheduler_t *scheduler) { return 0; }
-static inline int rga_power_disable(struct rga_scheduler_t *scheduler) { return 0; }
-#endif

 int rga_kernel_commit(struct rga_req *cmd);

--- a/drivers/video/rockchip/rga3/rga2_reg_info.c
+++ b/drivers/video/rockchip/rga3/rga2_reg_info.c
@@ -168,6 +168,10 @@ static void RGA2_set_mode_ctrl(u8 *base, struct rga2_req *msg)
 	if (msg->render_mode == 4)
 		render_mode = 3;

+	/* In slave mode, the current frame completion interrupt must be enabled. */
+	if (!RGA2_USE_MASTER_MODE)
+		msg->CMD_fin_int_enable = 1;
+
 	reg =
 		((reg & (~m_RGA2_MODE_CTRL_SW_RENDER_MODE)) |
 		 (s_RGA2_MODE_CTRL_SW_RENDER_MODE(render_mode)));
@@ -2324,6 +2328,13 @@ static void rga2_dump_read_back_cmd_reg(struct rga_scheduler_t *scheduler)
 			cmd_reg[2 + i * 4], cmd_reg[3 + i * 4]);
 }

+void rga2_dump_read_back_reg(struct rga_scheduler_t *scheduler)
+{
+	rga2_dump_read_back_sys_reg(scheduler);
+	rga2_dump_read_back_csc_reg(scheduler);
+	rga2_dump_read_back_cmd_reg(scheduler);
+}
+
 static void rga2_set_pre_intr_reg(struct rga_job *job, struct rga_scheduler_t *scheduler)
 {
 	uint32_t reg;
@@ -2391,48 +2402,12 @@ int rga2_set_reg(struct rga_job *job, struct rga_scheduler_t *scheduler)
 	ktime_t now = ktime_get();
 	int i;

-	rga_write(0x0, RGA2_SYS_CTRL, scheduler);
-
-#ifndef CONFIG_ROCKCHIP_FPGA
-	/* flush cache to ddr */
-	rga_dma_sync_flush_range(&job->cmd_reg[0], &job->cmd_reg[32], scheduler);
-	rga_write(virt_to_phys(job->cmd_reg), RGA2_CMD_BASE, scheduler);
-#else
-
-	/* slave mode */
-	{
-		int32_t m, *cmd;
-
-		cmd = job->cmd_reg;
-		pr_info("set reg\n");
-		for (m = 0; m <= 32; m++)
-			rga_write(cmd[m], 0x100 + m * 4, scheduler);
-	}
-
-#endif
-
 	if (job->pre_intr_info.enable)
 		rga2_set_pre_intr_reg(job, scheduler);

 	if (job->full_csc.flag)
 		rga2_set_reg_full_csc(job, scheduler);

-#ifndef CONFIG_ROCKCHIP_FPGA
-	/* master mode */
-	rga_write(rga_read(RGA2_SYS_CTRL, scheduler) |
-		  (0x1 << 1) | (0x1 << 2) | (0x1 << 5) | (0x1 << 6) | (0x1 << 11) | (0x1 << 12),
-		  RGA2_SYS_CTRL, scheduler);
-#else
-	/* slave mode */
-	rga_write(rga_read(RGA2_SYS_CTRL, scheduler) |
-		  (0x0 << 1) | (0x1 << 2) | (0x1 << 5) | (0x1 << 6)  | (0x1 << 11) | (0x1 << 12),
-		  RGA2_SYS_CTRL, scheduler);
-#endif
-
-	/* All CMD finish int */
-	rga_write(rga_read(RGA2_INT, scheduler) | (0x1 << 10) | (0x1 << 9) |
-		 (0x1 << 8), RGA2_INT, scheduler);
-
 	if (DEBUGGER_EN(REG)) {
 		int32_t *p;

@@ -2447,6 +2422,38 @@ int rga2_set_reg(struct rga_job *job, struct rga_scheduler_t *scheduler)
 				p[2 + i * 4], p[3 + i * 4]);
 	}

+	/* All CMD finish int */
+	rga_write(rga_read(RGA2_INT, scheduler) |
+		  (0x1 << 10) | (0x1 << 9) | (0x1 << 8), RGA2_INT, scheduler);
+
+	/* sys_reg init */
+	rga_write((0x1 << 2) | (0x1 << 5) | (0x1 << 6) | (0x1 << 11) | (0x1 << 12),
+		  RGA2_SYS_CTRL, scheduler);
+
+	if (RGA2_USE_MASTER_MODE) {
+		/* master mode */
+		rga_write(rga_read(RGA2_SYS_CTRL, scheduler) | (0x1 << 1),
+			  RGA2_SYS_CTRL, scheduler);
+
+		/* cmd buffer flush cache to ddr */
+		rga_dma_sync_flush_range(&job->cmd_reg[0], &job->cmd_reg[32], scheduler);
+
+		/* set cmd_addr */
+		rga_write(virt_to_phys(job->cmd_reg), RGA2_CMD_BASE, scheduler);
+
+		rga_write(1, RGA2_CMD_CTRL, scheduler);
+	} else {
+		/* slave mode */
+		rga_write(rga_read(RGA2_SYS_CTRL, scheduler) | (0x0 << 1),
+			  RGA2_SYS_CTRL, scheduler);
+
+		/* set cmd_reg */
+		for (i = 0; i <= 32; i++)
+			rga_write(job->cmd_reg[i], 0x100 + i * 4, scheduler);
+
+		rga_write(rga_read(RGA2_SYS_CTRL, scheduler) | 0x1, RGA2_SYS_CTRL, scheduler);
+	}
+
 	if (DEBUGGER_EN(TIME)) {
 		pr_info("sys_ctrl = %x, int = %x, set cmd use time = %lld\n",
 			rga_read(RGA2_SYS_CTRL, scheduler),
@@ -2457,13 +2464,8 @@ int rga2_set_reg(struct rga_job *job, struct rga_scheduler_t *scheduler)
 	job->hw_running_time = now;
 	job->hw_recoder_time = now;

-	rga_write(1, RGA2_CMD_CTRL, scheduler);
-
-	if (DEBUGGER_EN(REG)) {
-		rga2_dump_read_back_sys_reg(scheduler);
-		rga2_dump_read_back_csc_reg(scheduler);
-		rga2_dump_read_back_cmd_reg(scheduler);
-	}
+	if (DEBUGGER_EN(REG))
+		rga2_dump_read_back_reg(scheduler);

 	return 0;
 }
--- a/drivers/video/rockchip/rga3/rga3_reg_info.c
+++ b/drivers/video/rockchip/rga3/rga3_reg_info.c
@@ -1305,9 +1305,13 @@ void rga_cmd_to_rga3_cmd(struct rga_req *req_rga, struct rga3_req *req)
 		 *     dst => wr
 		 */

-		/* enabled by default bot_blend_m1 && bot_alpha_cal_m1 for src channel(win0) */
+		/*
+		 * enabled by default bot_blend_m1 && bot_alpha_cal_m1 for src channel(win0)
+		 * In ABB mode, the number will be fetched according to 16*16, so it needs to
+		 * be enabled top_blend_m1 && top_alpha_cal_m1 for dst channel(wr).
+		 */
 		if (rga_is_alpha_format(req_rga->src.format))
-			req->alpha_mode_1 = 0x0a00;
+			req->alpha_mode_1 = 0x0a0a;

 		set_win_info(&req->win0, &req_rga->src);

@@ -1331,9 +1335,13 @@ void rga_cmd_to_rga3_cmd(struct rga_req *req_rga, struct rga3_req *req)
 		 *     dst => wr
 		 */

-		/* enabled by default top_blend_m1 && top_alpha_cal_m1 for src channel(win1) */
+		/*
+		 * enabled by default top_blend_m1 && top_alpha_cal_m1 for src channel(win1)
+		 * In ABB mode, the number will be fetched according to 16*16, so it needs to
+		 * be enabled bot_blend_m1 && bot_alpha_cal_m1 for src1/dst channel(win0).
+		 */
 		if (rga_is_alpha_format(req_rga->src.format))
-			req->alpha_mode_1 = 0x0a;
+			req->alpha_mode_1 = 0x0a0a;

 		if (req_rga->pat.yrgb_addr != 0) {
 			if (req_rga->src.yrgb_addr == req_rga->dst.yrgb_addr) {
--- a/drivers/video/rockchip/rga3/rga_common.c
+++ b/drivers/video/rockchip/rga3/rga_common.c
@@ -329,16 +329,17 @@ int rga_get_format_bits(uint32_t format)
 	case RGA_FORMAT_YVYU_422:
 	case RGA_FORMAT_UYVY_422:
 	case RGA_FORMAT_VYUY_422:
+	/* YUV 420 packed according to the arrangement of YUV422 packed. */
+	case RGA_FORMAT_YUYV_420:
+	case RGA_FORMAT_YVYU_420:
+	case RGA_FORMAT_UYVY_420:
+	case RGA_FORMAT_VYUY_420:
 		bits = 16;
 		break;
 	case RGA_FORMAT_YCbCr_420_SP:
 	case RGA_FORMAT_YCbCr_420_P:
 	case RGA_FORMAT_YCrCb_420_SP:
 	case RGA_FORMAT_YCrCb_420_P:
-	case RGA_FORMAT_YUYV_420:
-	case RGA_FORMAT_YVYU_420:
-	case RGA_FORMAT_UYVY_420:
-	case RGA_FORMAT_VYUY_420:
 		bits = 12;
 		break;
 	case RGA_FORMAT_YCbCr_420_SP_10B:
@@ -608,13 +609,12 @@ int rga_image_size_cal(int w, int h, int format,
 	case RGA_FORMAT_VYUY_422:
 	case RGA_FORMAT_YUYV_422:
 	case RGA_FORMAT_UYVY_422:
-		yrgb = w * h * 2;
-		break;
+	/* YUV 420 packed according to the arrangement of YUV422 packed. */
 	case RGA_FORMAT_YVYU_420:
 	case RGA_FORMAT_VYUY_420:
 	case RGA_FORMAT_YUYV_420:
 	case RGA_FORMAT_UYVY_420:
-		yrgb = (w * h) + ((w * h) >> 1);
+		yrgb = w * h * 2;
 		break;
 	/* YUV FORMAT */
 	case RGA_FORMAT_YCbCr_422_SP:
--- a/drivers/video/rockchip/rga3/rga_drv.c
+++ b/drivers/video/rockchip/rga3/rga_drv.c
@@ -384,7 +384,7 @@ static void rga_cancel_timer(void)
 	hrtimer_cancel(&timer);
 }

-#ifndef CONFIG_ROCKCHIP_FPGA
+#ifndef RGA_DISABLE_PM
 int rga_power_enable(struct rga_scheduler_t *scheduler)
 {
 	int ret = -EINVAL;
@@ -479,9 +479,19 @@ static void rga_power_disable_all(void)
 }

 #else
+int rga_power_enable(struct rga_scheduler_t *scheduler)
+{
+	return 0;
+}
+
+int rga_power_disable(struct rga_scheduler_t *scheduler)
+{
+	return 0;
+}
+
 static inline void rga_power_enable_all(void) {}
 static inline void rga_power_disable_all(void) {}
-#endif //CONFIG_ROCKCHIP_FPGA
+#endif /* #ifndef RGA_DISABLE_PM */

 static int rga_session_manager_init(struct rga_session_manager **session_manager_ptr)
 {
@@ -1370,19 +1380,19 @@ static void init_scheduler(struct rga_scheduler_t *scheduler,

 static int rga_drv_probe(struct platform_device *pdev)
 {
-	struct rga_drvdata_t *data = rga_drvdata;
-	struct resource *res;
-	int ret = 0;
-	const struct of_device_id *match = NULL;
-	struct device *dev = &pdev->dev;
-	const struct rga_match_data_t *match_data;
-	int irq;
-	struct rga_scheduler_t *scheduler = NULL;
-#ifndef CONFIG_ROCKCHIP_FPGA
+#ifndef RGA_DISABLE_PM
 	int i;
 #endif
+	int ret = 0;
+	int irq;
+	struct resource *res;
+	const struct rga_match_data_t *match_data;
+	const struct of_device_id *match;
+	struct rga_scheduler_t *scheduler;
+	struct device *dev = &pdev->dev;
+	struct rga_drvdata_t *data = rga_drvdata;

-	if (!pdev->dev.of_node)
+	if (!dev->of_node)
 		return -EINVAL;

 	if (!strcmp(dev_driver_string(dev), "rga3_core0"))
@@ -1391,25 +1401,23 @@ static int rga_drv_probe(struct platform_device *pdev)
 		match = of_match_device(rga3_core1_dt_ids, dev);
 	else if (!strcmp(dev_driver_string(dev), "rga2"))
 		match = of_match_device(rga2_dt_ids, dev);
+	else
+		match = NULL;

 	if (!match) {
 		dev_err(dev, "%s missing DT entry!\n", dev_driver_string(dev));
 		return -EINVAL;
 	}

-	scheduler =
-		devm_kzalloc(&pdev->dev, sizeof(struct rga_scheduler_t),
-			GFP_KERNEL);
+	scheduler = devm_kzalloc(dev, sizeof(struct rga_scheduler_t), GFP_KERNEL);
 	if (scheduler == NULL) {
-		pr_err("failed to allocate scheduler. dev name = %s\n",
-			dev_driver_string(dev));
+		pr_err("failed to allocate scheduler. dev name = %s\n", dev_driver_string(dev));
 		return -ENOMEM;
 	}

-	init_scheduler(scheduler,
-		dev_driver_string(dev));
+	init_scheduler(scheduler, dev_driver_string(dev));

-	scheduler->dev = &pdev->dev;
+	scheduler->dev = dev;

 	/* map the registers */
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1418,8 +1426,7 @@ static int rga_drv_probe(struct platform_device *pdev)
 		return -ENXIO;
 	}

-	scheduler->rga_base =
-		devm_ioremap(&pdev->dev, res->start, resource_size(res));
+	scheduler->rga_base = devm_ioremap(dev, res->start, resource_size(res));
 	if (!scheduler->rga_base) {
 		pr_err("ioremap failed\n");
 		ret = -ENOENT;
@@ -1432,8 +1439,7 @@ static int rga_drv_probe(struct platform_device *pdev)
 	/* there are irq names in dts */
 	irq = platform_get_irq(pdev, 0);
 	if (irq < 0) {
-		dev_err(dev, "no irq %s in dts\n",
-			match_data->irqs[0].name);
+		dev_err(dev, "no irq %s in dts\n", match_data->irqs[0].name);
 		return irq;
 	}

@@ -1442,17 +1448,18 @@ static int rga_drv_probe(struct platform_device *pdev)
 	pr_info("%s, irq = %d, match scheduler\n", match_data->irqs[0].name, irq);

 	ret = devm_request_threaded_irq(dev, irq,
-			match_data->irqs[0].irq_hdl,
-			match_data->irqs[0].irq_thread, IRQF_SHARED,
-			dev_driver_string(dev),
-			scheduler);
+					match_data->irqs[0].irq_hdl,
+					match_data->irqs[0].irq_thread,
+					IRQF_SHARED,
+					dev_driver_string(dev), scheduler);
 	if (ret < 0) {
-		pr_err("request irq name: %s failed: %d\n",
-				match_data->irqs[0].name, ret);
+		pr_err("request irq name: %s failed: %d\n", match_data->irqs[0].name, ret);
 		return ret;
 	}

-#ifndef CONFIG_ROCKCHIP_FPGA
+
+#ifndef RGA_DISABLE_PM
+	/* clk init */
 	for (i = 0; i < match_data->num_clks; i++) {
 		struct clk *clk = devm_clk_get(dev, match_data->clks[i]);

@@ -1462,21 +1469,15 @@ static int rga_drv_probe(struct platform_device *pdev)
 		scheduler->clks[i] = clk;
 	}
 	scheduler->num_clks = match_data->num_clks;
-#endif
-
-	platform_set_drvdata(pdev, scheduler);
-
-	device_init_wakeup(dev, true);

 	/* PM init */
-#ifndef CONFIG_ROCKCHIP_FPGA
-	pm_runtime_enable(&pdev->dev);
+	device_init_wakeup(dev, true);
+	pm_runtime_enable(scheduler->dev);

 	ret = pm_runtime_get_sync(scheduler->dev);
 	if (ret < 0) {
-		pr_err("failed to get pm runtime, ret = %d\n",
-			 ret);
-		goto failed;
+		pr_err("failed to get pm runtime, ret = %d\n", ret);
+		goto pm_disable;
 	}

 	for (i = 0; i < scheduler->num_clks; i++) {
@@ -1484,14 +1485,14 @@ static int rga_drv_probe(struct platform_device *pdev)
 			ret = clk_prepare_enable(scheduler->clks[i]);
 			if (ret < 0) {
 				pr_err("failed to enable clk\n");
-				goto failed;
+				goto pm_disable;
 			}
 		}
 	}
-#endif //CONFIG_ROCKCHIP_FPGA
+#endif /* #ifndef RGA_DISABLE_PM */

 	scheduler->ops->get_version(scheduler);
-	pr_info("%s driver loaded successfully ver:%s\n",
+	pr_info("%s hardware loaded successfully, hw_version:%s.\n",
 		dev_driver_string(dev), scheduler->version.str);

 	/* TODO: get by hw version, Currently only supports judgment 1106. */
@@ -1509,13 +1510,13 @@ static int rga_drv_probe(struct platform_device *pdev)

 	data->num_of_scheduler++;

-#ifndef CONFIG_ROCKCHIP_FPGA
+#ifndef RGA_DISABLE_PM
 	for (i = scheduler->num_clks - 1; i >= 0; i--)
 		if (!IS_ERR(scheduler->clks[i]))
 			clk_disable_unprepare(scheduler->clks[i]);

-	pm_runtime_put_sync(&pdev->dev);
-#endif //CONFIG_ROCKCHIP_FPGA
+	pm_runtime_put_sync(dev);
+#endif /* #ifndef RGA_DISABLE_PM */

 	if (scheduler->data->mmu == RGA_IOMMU) {
 		scheduler->iommu_info = rga_iommu_probe(dev);
@@ -1525,25 +1526,27 @@ static int rga_drv_probe(struct platform_device *pdev)
 		}
 	}

+	platform_set_drvdata(pdev, scheduler);
+
 	pr_info("%s probe successfully\n", dev_driver_string(dev));

 	return 0;

-#ifndef CONFIG_ROCKCHIP_FPGA
-failed:
+#ifndef RGA_DISABLE_PM
+pm_disable:
 	device_init_wakeup(dev, false);
 	pm_runtime_disable(dev);
-#endif //CONFIG_ROCKCHIP_FPGA
+#endif /* #ifndef RGA_DISABLE_PM */

 	return ret;
 }

 static int rga_drv_remove(struct platform_device *pdev)
 {
+#ifndef RGA_DISABLE_PM
 	device_init_wakeup(&pdev->dev, false);
-#ifndef CONFIG_ROCKCHIP_FPGA
 	pm_runtime_disable(&pdev->dev);
-#endif //CONFIG_ROCKCHIP_FPGA
+#endif /* #ifndef RGA_DISABLE_PM */

 	return 0;
 }