crypto: tegra-aes: Disable clock at end of probe

Change-Id: Ie5b98b705a7ec70782df5dc0aec69438b699661c
Signed-off-by: Colin Cross <ccross@android.com>
This commit is contained in:
Colin Cross
2010-12-16 12:51:22 -08:00
parent 8fc88f1863
commit 7d99fb5c85

View File

@@ -878,6 +878,7 @@ static int tegra_aes_probe(struct platform_device *pdev)
struct tegra_aes_dev *dd;
struct resource *res;
int err = -ENOMEM, i = 0, j;
bool clk_enabled = false;
if (aes_dev)
return -EEXIST;
@@ -932,6 +933,7 @@ static int tegra_aes_probe(struct platform_device *pdev)
err = -ENODEV;
goto out;
}
clk_enabled = true;
/*
* the foll contiguous memory is allocated as follows -
@@ -991,6 +993,8 @@ static int tegra_aes_probe(struct platform_device *pdev)
goto out;
}
clk_disable(dd->iclk);
dev_info(dev, "registered");
return 0;
@@ -1008,6 +1012,8 @@ out:
dd->buf_out, dd->dma_buf_out);
if (dd->io_base)
iounmap(dd->io_base);
if (clk_enabled)
clk_disable(dd->iclk);
if (dd->iclk)
clk_put(dd->iclk);