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misc: rk628: dsi: fix timing configuration not working

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Type: Fix
Redmine ID: #525257
Associated modifications: Icc494d1c4c345ca01c9636ad8a2b47e0d9351972
Test: N/A

Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com>
Change-Id: I018ee73c0a62a6a07b0943f5886a8d0c3f409a85
This commit is contained in:
Zhibin Huang
2025-01-07 09:37:45 +08:00
committed by Tao Huang
parent e6e1a2e414
commit 7e090f70d0
1 changed files with 4 additions and 3 deletions
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7
drivers/misc/rk628/rk628_dsi.c
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@@ -984,6 +984,10 @@ static void mipi_dphy_set_timing(const struct rk628_dsi *dsi)
};
unsigned int index;
// These ranges use the controller's internal automatically calculated timing.
if (dsi->lane_mbps < 800 || (dsi->lane_mbps >= 900 && dsi->lane_mbps < 1100))
return;
if (dsi->lane_mbps < timing_table[0].min_lane_mbps)
return;
@@ -995,9 +999,6 @@ static void mipi_dphy_set_timing(const struct rk628_dsi *dsi)
if (index == ARRAY_SIZE(timing_table))
--index;
if (dsi->lane_mbps < timing_table[index].max_lane_mbps)
return;
testif_set_timing(dsi, 0x60, 0x3f, timing_table[index].clk_lp);
testif_set_timing(dsi, 0x61, 0x7f, timing_table[index].clk_hs_prepare);
testif_set_timing(dsi, 0x62, 0x3f, timing_table[index].clk_hs_zero);