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drm/rockchip: analogix_dp: Use formalized struct definition for grf field

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Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Iddfa5af6e8bfabb58b312661e3fb267008f27045
This commit is contained in:
Wyon Bi
2021-09-28 16:18:39 +08:00
committed by Tao Huang
parent 0d9e33dc55
commit 7e6860ead0
1 changed files with 40 additions and 29 deletions
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69
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
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@@ -32,30 +32,33 @@
#include "rockchip_drm_drv.h"
#include "rockchip_drm_vop.h"
#define RK3288_GRF_SOC_CON6 0x25c
#define RK3288_EDP_LCDC_SEL BIT(5)
#define RK3399_GRF_SOC_CON20 0x6250
#define RK3399_EDP_LCDC_SEL BIT(5)
#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
#define PSR_WAIT_LINE_FLAG_TIMEOUT_MS 100
#define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm)
#define GRF_REG_FIELD(_reg, _lsb, _msb) { \
.reg = _reg, \
.lsb = _lsb, \
.msb = _msb, \
.valid = true, \
}
struct rockchip_grf_reg_field {
unsigned int reg;
unsigned int lsb;
unsigned int msb;
bool valid;
};
/**
* struct rockchip_dp_chip_data - splite the grf setting of kind of chips
* @lcdsel_grf_reg: grf register offset of lcdc select
* @lcdsel_big: reg value of selecting vop big for eDP
* @lcdsel_lit: reg value of selecting vop little for eDP
* @lcdc_sel: grf register field of lcdc_sel
* @chip_type: specific chip type
* @ssc: check if SSC is supported by source
* @audio: check if audio is supported by source
*/
struct rockchip_dp_chip_data {
u32 lcdsel_grf_reg;
u32 lcdsel_big;
u32 lcdsel_lit;
const struct rockchip_grf_reg_field lcdc_sel;
u32 chip_type;
bool ssc;
bool audio;
@@ -80,6 +83,27 @@ struct rockchip_dp_device {
struct rockchip_drm_sub_dev sub_dev;
};
static int rockchip_grf_write(struct regmap *grf, unsigned int reg,
unsigned int mask, unsigned int val)
{
return regmap_write(grf, reg, (mask << 16) | (val & mask));
}
static int rockchip_grf_field_write(struct regmap *grf,
const struct rockchip_grf_reg_field *field,
unsigned int val)
{
unsigned int mask;
if (!field->valid)
return 0;
mask = GENMASK(field->msb, field->lsb);
val <<= field->lsb;
return rockchip_grf_write(grf, field->reg, mask, val);
}
static int rockchip_dp_audio_hw_params(struct device *dev, void *data,
struct hdmi_codec_daifmt *daifmt,
struct hdmi_codec_params *params)
@@ -258,7 +282,6 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder,
struct drm_crtc *crtc;
struct drm_crtc_state *old_crtc_state;
int ret;
u32 val;
crtc = rockchip_dp_drm_get_new_crtc(encoder, state);
if (!crtc)
@@ -269,21 +292,13 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder,
if (old_crtc_state && old_crtc_state->self_refresh_active)
return;
if (!dp->data->lcdsel_grf_reg)
return;
ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
if (ret < 0)
return;
if (ret)
val = dp->data->lcdsel_lit;
else
val = dp->data->lcdsel_big;
DRM_DEV_DEBUG(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
ret = rockchip_grf_field_write(dp->grf, &dp->data->lcdc_sel, ret);
if (ret != 0)
DRM_DEV_ERROR(dp->dev, "Could not write to GRF: %d\n", ret);
}
@@ -553,18 +568,14 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
};
static const struct rockchip_dp_chip_data rk3399_edp = {
.lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
.lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
.lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
.chip_type = RK3399_EDP,
.lcdc_sel = GRF_REG_FIELD(0x6250, 5, 5),
.ssc = true,
};
static const struct rockchip_dp_chip_data rk3288_dp = {
.lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
.lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
.lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL),
.chip_type = RK3288_DP,
.lcdc_sel = GRF_REG_FIELD(0x025c, 5, 5),
.ssc = true,
};