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audio: VAD use HIFI PLL [1/1]

Browse Source 
PD#SWPL-12746

Problem:
VAD does not use HIFI PLL, it will effect vad wakup

Solution:
VAD use HIFI PLL

Verify:
T962X2_X301

Change-Id: Iad13661c4ec3495130f485447f3c8b034bee9ce2
Signed-off-by: jian.zhou <jian.zhou@amlogic.com>
This commit is contained in:
jian.zhou
2019-09-11 03:59:12 -04:00
committed by Luke Go
parent 15c9b6da19
commit 7e981c8141
5 changed files with 29 additions and 28 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
View File

@@ -1144,8 +1144,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
@@ -1242,7 +1242,7 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
&clkc CLKID_FCLK_DIV5
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_VAD>;
clock-names = "gate", "pll", "clk";
@@ -1278,8 +1278,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1
&clkc CLKID_MPLL0
@@ -1333,8 +1333,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1
&clkc CLKID_MPLL0

14
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
View File

@@ -1709,8 +1709,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
@@ -1813,7 +1813,7 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
&clkc CLKID_FCLK_DIV5
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_VAD>;
clock-names = "gate", "pll", "clk";
@@ -1849,8 +1849,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1
&clkc CLKID_MPLL0
@@ -1904,8 +1904,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1
&clkc CLKID_MPLL0

14
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
View File

@@ -1517,8 +1517,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
@@ -1621,7 +1621,7 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
&clkc CLKID_FCLK_DIV5
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_VAD>;
clock-names = "gate", "pll", "clk";
@@ -1657,8 +1657,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1
&clkc CLKID_MPLL0
@@ -1712,8 +1712,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1
&clkc CLKID_MPLL0

14
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
View File

@@ -1511,8 +1511,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
@@ -1616,7 +1616,7 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
&clkc CLKID_FCLK_DIV5
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_VAD>;
clock-names = "gate", "pll", "clk";
@@ -1652,8 +1652,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1
&clkc CLKID_MPLL0
@@ -1707,8 +1707,8 @@
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkc CLKID_HIFI_PLL
&clkc CLKID_HIFI_PLL
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1
&clkc CLKID_MPLL0

1
sound/soc/amlogic/auge/vad.c
View File

@@ -433,6 +433,7 @@ static int vad_set_clks(struct vad *p_vad, bool enable)
/* enable clock gate */
ret = clk_prepare_enable(p_vad->gate);
clk_set_rate(p_vad->pll, 25000000);
/* enable clock */
ret = clk_prepare_enable(p_vad->pll);
if (ret) {