media: platform: rockchip: cif: fix rk3568 missing reg

rk3568 CIF_REG_GRF_CIFIO_CON1 reg has been omitted, fix it.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: Ib489312ae129fd522c7d23f55d14a7852086df25
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
This commit is contained in:
Wang Panzhenzhuan
2021-03-29 16:39:33 +08:00
committed by Zefa Chen
parent d78e75dd6f
commit 7f1ef00ce6

View File

@@ -594,6 +594,7 @@ static const struct cif_reg rk3568_cif_regs[] = {
[CIF_REG_MMU_INT_STATUS] = CIF_REG(CIF_MMU_INT_STATUS),
[CIF_REG_MMU_AUTO_GATING] = CIF_REG(CIF_MMU_AUTO_GATING),
[CIF_REG_GRF_CIFIO_CON] = CIF_REG(CIF_GRF_VI_CON0),
[CIF_REG_GRF_CIFIO_CON1] = CIF_REG(CIF_GRF_VI_CON1),
};
static const struct rkcif_hw_match_data px30_cif_match_data = {