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delete the old rtl8188cu driver

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高伟龙
2011-09-24 21:15:10 +08:00
parent 2d21400716
commit 7f43fa47bc
151 changed files with 0 additions and 151283 deletions
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8
drivers/net/wireless/rtl8192c/Kconfig
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@@ -1,8 +0,0 @@
config RTL8192CU
tristate "Realtek 8192C USB WiFi"
depends on WLAN_80211 && USB
select WIRELESS_EXT
select IEEE80211
---help---
Help message of RTL8192CU

199
drivers/net/wireless/rtl8192c/Makefile
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@@ -1,199 +0,0 @@
#
# Makefile for RTL8188/8192 USB WiFi
#
EXTRA_CFLAGS += -O1
#EXTRA_CFLAGS += -O3
EXTRA_CFLAGS += -Wall
#EXTRA_CFLAGS += -Wextra
#EXTRA_CFLAGS += -Werror
#EXTRA_CFLAGS += -pedantic
#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes
EXTRA_CFLAGS += -Wno-unused-variable
EXTRA_CFLAGS += -Wno-unused-value
EXTRA_CFLAGS += -Wno-unused-label
EXTRA_CFLAGS += -Wno-unused-parameter
EXTRA_CFLAGS += -Wno-unused-function
EXTRA_CFLAGS += -Wno-unused
EXTRA_CFLAGS += -Wno-uninitialized
EXTRA_CFLAGS += -I$(src)/include
CONFIG_AUTOCFG_CP = n
CONFIG_RTL8192C = y
CONFIG_RTL8192D = n
CONFIG_USB_HCI = y
CONFIG_PCI_HCI = n
CONFIG_SDIO_HCI = n
CONFIG_MP_INCLUDED = n
CONFIG_POWER_SAVING = n
CONFIG_USB_AUTOSUSPEND = n
CONFIG_HW_PWRP_DETECTION = n
CONFIG_WIFI_TEST = n
CONFIG_BT_COEXISTENCE = n
CONFIG_RTL8192CU_REDEFINE_1X1 = n
CONFIG_PLATFORM_ARM_RK2918 = y
CONFIG_DRVEXT_MODULE = n
export TopDIR ?= $(shell pwd)
ifeq ($(CONFIG_RTL8192C), y)
RTL871X = rtl8192c
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8192cu
FW_FILES := hal/$(RTL871X)/usb/Hal8192CUHWImg.o
endif
CHIP_FILES := hal/$(RTL871X)/$(RTL871X)_sreset.o
CHIP_FILES += $(FW_FILES)
endif
os_dep/linux/ioctl_linux.o: os_dep/linux/ioctl_linux.uu
@echo "UUDE os_dep/linux/ioctl_linux.uu"
@uudecode os_dep/linux/ioctl_linux.uu -o os_dep/linux/ioctl_linux.o
ifeq ($(CONFIG_USB_HCI), y)
HCI_NAME = usb
_OS_INTFS_FILES := os_dep/osdep_service.o \
os_dep/linux/os_intfs.o \
os_dep/linux/$(HCI_NAME)_intf.o \
os_dep/linux/ioctl_linux.o \
os_dep/linux/xmit_linux.o \
os_dep/linux/ioctl_linux.o \
os_dep/linux/mlme_linux.o \
os_dep/linux/recv_linux.o
_HAL_INTFS_FILES := hal/hal_init.o \
hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(RTL871X)_phycfg.o \
hal/$(RTL871X)/$(RTL871X)_rf6052.o \
hal/$(RTL871X)/$(RTL871X)_dm.o \
hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)/$(RTL871X)_cmd.o \
hal/$(RTL871X)/usb/usb_ops_linux.o \
hal/$(RTL871X)/usb/usb_halinit.o \
hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_led.o \
hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_xmit.o \
hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_recv.o
_HAL_INTFS_FILES += $(CHIP_FILES)
endif
ifeq ($(CONFIG_AUTOCFG_CP), y)
$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
endif
ifeq ($(CONFIG_USB_HCI), y)
ifeq ($(CONFIG_USB_AUTOSUSPEND), y)
EXTRA_CFLAGS += -DCONFIG_USB_AUTOSUSPEND
endif
endif
ifeq ($(CONFIG_POWER_SAVING), y)
EXTRA_CFLAGS += -DCONFIG_POWER_SAVING
endif
ifeq ($(CONFIG_HW_PWRP_DETECTION), y)
EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION
endif
ifeq ($(CONFIG_WIFI_TEST), y)
EXTRA_CFLAGS += -DCONFIG_WIFI_TEST
endif
ifeq ($(CONFIG_BT_COEXISTENCE), y)
EXTRA_CFLAGS += -DCONFIG_BT_COEXISTENCE
endif
ifeq ($(CONFIG_RTL8192CU_REDEFINE_1X1), y)
EXTRA_CFLAGS += -DRTL8192C_RECONFIG_TO_1T1R
endif
ifeq ($(CONFIG_PLATFORM_ARM_RK2918), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS
ARCH := arm
CROSS_COMPILE := /opt/toolchain/arm-eabi-4.4.0/bin/arm-eabi-
KSRC := 2.6.25.1
#MODULE_NAME := wlan0
endif
#
# Add minimize memory usage.
#
EXTRA_CFLAGS += -DCONFIG_MINIMAL_MEMORY_USAGE
ifneq ($(KERNELRELEASE),)
rtk_core := core/rtw_cmd.o \
core/rtw_security.o \
core/rtw_debug.o \
core/rtw_io.o \
core/rtw_ioctl_query.o \
core/rtw_ioctl_set.o \
core/rtw_ieee80211.o \
core/rtw_mlme.o \
core/rtw_mlme_ext.o \
core/rtw_wlan_util.o \
core/rtw_pwrctrl.o \
core/rtw_rf.o \
core/rtw_recv.o \
core/rtw_sta_mgt.o \
core/rtw_xmit.o \
core/rtw_p2p.o
rtl$(MODULE_NAME)-y += $(rtk_core)
rtl$(MODULE_NAME)-y += core/efuse/rtw_efuse.o
rtl$(MODULE_NAME)-y += $(_HAL_INTFS_FILES)
rtl$(MODULE_NAME)-y += $(_OS_INTFS_FILES)
rtl$(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o \
core/rtw_mp_ioctl.o \
core/rtw_ioctl_rtl.o
rk_cfg := \
os_dep/linux/wifi_power.o \
os_dep/linux/wifi_power_usb.o \
os_dep/linux/wifi_power_ops.o
rkcfg-y += $(rk_cfg)
obj-$(CONFIG_RTL8192CU) := rtl$(MODULE_NAME).o rkcfg.o
else
export CONFIG_RTL8192CU = m
all: modules
modules:
$(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KSRC) M=$(shell pwd) modules
strip:
$(CROSS_COMPILE)strip $(MODULE_NAME).ko --strip-unneeded
config_r:
@echo "make config"
/bin/bash script/Configure script/config.in
.PHONY: modules clean
endif

1042
drivers/net/wireless/rtl8192c/core/efuse/rtw_efuse.c
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2352
drivers/net/wireless/rtl8192c/core/rtw_cmd.c
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604
drivers/net/wireless/rtl8192c/core/rtw_debug.c
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@@ -1,604 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_DEBUG_C_
#include <rtw_debug.h>
#ifdef CONFIG_DEBUG_RTL871X
u32 GlobalDebugLevel = _drv_info_;
u64 GlobalDebugComponents = \
_module_rtl871x_xmit_c_ |
_module_xmit_osdep_c_ |
_module_rtl871x_recv_c_ |
_module_recv_osdep_c_ |
_module_rtl871x_mlme_c_ |
_module_mlme_osdep_c_ |
_module_rtl871x_sta_mgt_c_ |
_module_rtl871x_cmd_c_ |
_module_cmd_osdep_c_ |
_module_rtl871x_io_c_ |
_module_io_osdep_c_ |
_module_os_intfs_c_|
_module_rtl871x_security_c_|
_module_rtl871x_eeprom_c_|
_module_hal_init_c_|
_module_hci_hal_init_c_|
_module_rtl871x_ioctl_c_|
_module_rtl871x_ioctl_set_c_|
_module_rtl871x_ioctl_query_c_|
_module_rtl871x_pwrctrl_c_|
_module_hci_intfs_c_|
_module_hci_ops_c_|
_module_hci_ops_os_c_|
_module_rtl871x_ioctl_os_c|
_module_rtl8712_cmd_c_|
_module_rtl8192c_xmit_c_|
_module_rtl8712_recv_c_ |
_module_mp_ |
_module_efuse_;
#endif
#ifdef CONFIG_PROC_DEBUG
#include <rtw_version.h>
int proc_get_drv_version(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
int len = 0;
len += snprintf(page + len, count - len, "%s\n", DRIVERVERSION);
*eof = 1;
return len;
}
int proc_get_write_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
*eof = 1;
return 0;
}
int proc_set_write_reg(struct file *file, const char *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 addr, val, len;
if (count < 3)
{
DBG_8192C("argument size is less than 3\n");
return -EFAULT;
}
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%x %x %x", &addr, &val, &len);
if (num != 3) {
DBG_8192C("invalid write_reg parameter!\n");
return count;
}
switch(len)
{
case 1:
rtw_write8(padapter, addr, (u8)val);
break;
case 2:
rtw_write16(padapter, addr, (u16)val);
break;
case 4:
rtw_write32(padapter, addr, val);
break;
default:
DBG_8192C("error write length=%d", len);
break;
}
}
return count;
}
static u32 proc_get_read_addr=0xeeeeeeee;
static u32 proc_get_read_len=0x4;
int proc_get_read_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
int len = 0;
if(proc_get_read_addr==0xeeeeeeee)
{
*eof = 1;
return len;
}
switch(proc_get_read_len)
{
case 1:
len += snprintf(page + len, count - len, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr));
break;
case 2:
len += snprintf(page + len, count - len, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr));
break;
case 4:
len += snprintf(page + len, count - len, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr));
break;
default:
len += snprintf(page + len, count - len, "error read length=%d\n", proc_get_read_len);
break;
}
*eof = 1;
return len;
}
int proc_set_read_reg(struct file *file, const char *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
char tmp[16];
u32 addr, len;
if (count < 2)
{
DBG_8192C("argument size is less than 2\n");
return -EFAULT;
}
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%x %x", &addr, &len);
if (num != 2) {
DBG_8192C("invalid read_reg parameter!\n");
return count;
}
proc_get_read_addr = addr;
proc_get_read_len = len;
}
return count;
}
int proc_get_fwstate(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
int len = 0;
len += snprintf(page + len, count - len, "fwstate=0x%x\n", get_fwstate(pmlmepriv));
*eof = 1;
return len;
}
int proc_get_sec_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct security_priv *psecuritypriv = &padapter->securitypriv;
int len = 0;
len += snprintf(page + len, count - len, "auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n",
psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm,
psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus);
*eof = 1;
return len;
}
int proc_get_mlmext_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
int len = 0;
len += snprintf(page + len, count - len, "pmlmeinfo->state=0x%x\n", pmlmeinfo->state);
*eof = 1;
return len;
}
int proc_get_qos_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
int len = 0;
len += snprintf(page + len, count - len, "qos_option=%d\n", pmlmepriv->qospriv.qos_option);
*eof = 1;
return len;
}
int proc_get_ht_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
int len = 0;
len += snprintf(page + len, count - len, "ht_option=%d\n", pmlmepriv->htpriv.ht_option);
*eof = 1;
return len;
}
int proc_get_rf_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
int len = 0;
len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n",
pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset);
*eof = 1;
return len;
}
int proc_get_ap_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct sta_info *psta;
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct wlan_network *cur_network = &(pmlmepriv->cur_network);
struct sta_priv *pstapriv = &padapter->stapriv;
int len = 0;
psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
if(psta)
{
int i;
struct recv_reorder_ctrl *preorder_ctrl;
len += snprintf(page + len, count - len, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr));
len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);
len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);
len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);
len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable);
len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
for(i=0;i<16;i++)
{
preorder_ctrl = &psta->recvreorder_ctrl[i];
if(preorder_ctrl->enable)
{
len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq);
}
}
}
else
{
len += snprintf(page + len, count - len, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress));
}
*eof = 1;
return len;
}
int proc_get_adapter_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
int len = 0;
len += snprintf(page + len, count - len, "bSurpriseRemoved=%d, bDriverStopped=%d\n",
padapter->bSurpriseRemoved, padapter->bDriverStopped);
*eof = 1;
return len;
}
int proc_get_trx_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct recv_priv *precvpriv = &padapter->recvpriv;
int len = 0;
len += snprintf(page + len, count - len, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d\n",
pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt);
#ifdef CONFIG_USB_HCI
len += snprintf(page + len, count - len, "rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt);
#endif
*eof = 1;
return len;
}
int proc_get_rx_signal(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
int len = 0;
len += snprintf(page + len, count - len,
"rssi:%d\n"
"rxpwdb:%d\n"
"signal_strength:%u\n"
"signal_qual:%u\n"
"noise:%u\n",
padapter->recvpriv.rssi,
padapter->recvpriv.rxpwdb,
padapter->recvpriv.signal_strength,
padapter->recvpriv.signal_qual,
padapter->recvpriv.noise
);
*eof = 1;
return len;
}
int proc_set_rx_signal(struct file *file, const char *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 is_signal_dbg, signal_strength;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength);
is_signal_dbg = is_signal_dbg==0?0:1;
if(is_signal_dbg && num!=2)
return count;
signal_strength = signal_strength>100?100:signal_strength;
signal_strength = signal_strength<0?0:signal_strength;
padapter->recvpriv.is_signal_dbg = is_signal_dbg;
padapter->recvpriv.signal_strength_dbg=signal_strength;
if(is_signal_dbg)
DBG_871X("set %s %u\n", "DBG_SIGNAL_STRENGTH", signal_strength);
else
DBG_871X("set %s\n", "HW_SIGNAL_STRENGTH");
}
return count;
}
#ifdef CONFIG_AP_MODE
int proc_get_all_sta_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
_irqL irqL;
struct sta_info *psta;
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct sta_priv *pstapriv = &padapter->stapriv;
int i, j;
_list *plist, *phead;
struct recv_reorder_ctrl *preorder_ctrl;
int len = 0;
len += snprintf(page + len, count - len, "sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap);
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
for(i=0; i< NUM_STA; i++)
{
phead = &(pstapriv->sta_hash[i]);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
plist = get_next(plist);
//if(extra_arg == psta->aid)
{
len += snprintf(page + len, count - len, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr));
len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);
len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);
len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);
len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable);
len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
len += snprintf(page + len, count - len, "sleepq_len=%d\n", psta->sleepq_len);
for(j=0;j<16;j++)
{
preorder_ctrl = &psta->recvreorder_ctrl[j];
if(preorder_ctrl->enable)
{
len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq);
}
}
}
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
*eof = 1;
return len;
}
#endif
#ifdef MEMORY_LEAK_DEBUG
#include <asm/atomic.h>
extern atomic_t _malloc_cnt;;
extern atomic_t _malloc_size;;
int proc_get_malloc_cnt(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
int len = 0;
len += snprintf(page + len, count - len, "_malloc_cnt=%d\n", atomic_read(&_malloc_cnt));
len += snprintf(page + len, count - len, "_malloc_size=%d\n", atomic_read(&_malloc_size));
*eof = 1;
return len;
}
#endif /* MEMORY_LEAK_DEBUG */
#ifdef CONFIG_FIND_BEST_CHANNEL
int proc_get_best_channel(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
int len = 0;
u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0;
for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) {
if ( pmlmeext->channel_set[i].ChannelNum == 1)
index_24G = i;
if ( pmlmeext->channel_set[i].ChannelNum == 36)
index_5G = i;
}
for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) {
// 2.4G
if ( pmlmeext->channel_set[i].ChannelNum == 6 ) {
if ( pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count ) {
index_24G = i;
best_channel_24G = pmlmeext->channel_set[i].ChannelNum;
}
}
// 5G
if ( pmlmeext->channel_set[i].ChannelNum >= 36
&& pmlmeext->channel_set[i].ChannelNum < 140 ) {
// Find primary channel
if ( (( pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0)
&& (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) {
index_5G = i;
best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
}
}
if ( pmlmeext->channel_set[i].ChannelNum >= 149
&& pmlmeext->channel_set[i].ChannelNum < 165) {
// find primary channel
if ( (( pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0)
&& (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) {
index_5G = i;
best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
}
}
#if 0 // debug
len += snprintf(page + len, count - len, "The rx cnt of channel %3d = %d\n",
pmlmeext->channel_set[i].ChannelNum, pmlmeext->channel_set[i].rx_count);
#endif
}
len += snprintf(page + len, count - len, "best_channel_5G = %d\n", best_channel_5G);
len += snprintf(page + len, count - len, "best_channel_24G = %d\n", best_channel_24G);
*eof = 1;
return len;
}
#endif /* CONFIG_FIND_BEST_CHANNEL */
#endif

424
drivers/net/wireless/rtl8192c/core/rtw_eeprom.c
View File

@@ -1,424 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_EEPROM_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
void up_clk(_adapter* padapter, u16 *x)
{
_func_enter_;
*x = *x | _EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
_func_exit_;
}
void down_clk(_adapter * padapter, u16 *x )
{
_func_enter_;
*x = *x & ~_EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
_func_exit_;
}
void shift_out_bits(_adapter * padapter, u16 data, u16 count)
{
u16 x,mask;
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
mask = 0x01 << (count - 1);
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDO | _EEDI);
do
{
x &= ~_EEDI;
if(data & mask)
x |= _EEDI;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
rtw_write8(padapter, EE_9346CR, (u8)x);
rtw_udelay_os(CLOCK_RATE);
up_clk(padapter, &x);
down_clk(padapter, &x);
mask = mask >> 1;
} while(mask);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~_EEDI;
rtw_write8(padapter, EE_9346CR, (u8)x);
out:
_func_exit_;
}
u16 shift_in_bits (_adapter * padapter)
{
u16 x,d=0,i;
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~( _EEDO | _EEDI);
d = 0;
for(i=0; i<16; i++)
{
d = d << 1;
up_clk(padapter, &x);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI);
if(x & _EEDO)
d |= 1;
down_clk(padapter, &x);
}
out:
_func_exit_;
return d;
}
void standby(_adapter * padapter )
{
u8 x;
_func_enter_;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EECS | _EESK);
rtw_write8(padapter, EE_9346CR,x);
rtw_udelay_os(CLOCK_RATE);
x |= _EECS;
rtw_write8(padapter, EE_9346CR, x);
rtw_udelay_os(CLOCK_RATE);
_func_exit_;
}
u16 wait_eeprom_cmd_done(_adapter* padapter)
{
u8 x;
u16 i,res=_FALSE;
_func_enter_;
standby(padapter );
for (i=0; i<200; i++)
{
x = rtw_read8(padapter, EE_9346CR);
if (x & _EEDO){
res=_TRUE;
goto exit;
}
rtw_udelay_os(CLOCK_RATE);
}
exit:
_func_exit_;
return res;
}
void eeprom_clean(_adapter * padapter)
{
u16 x;
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~(_EECS | _EEDI);
rtw_write8(padapter, EE_9346CR, (u8)x);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
up_clk(padapter, &x);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
down_clk(padapter, &x);
out:
_func_exit_;
}
void eeprom_write16(_adapter * padapter, u16 reg, u16 data)
{
u8 x;
#ifdef CONFIG_RTL8712
u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new;
tmp8_ori=rtw_read8(padapter, 0x102502f1);
tmp8_new=tmp8_ori & 0xf7;
if(tmp8_ori != tmp8_new){
rtw_write8(padapter, 0x102502f1, tmp8_new);
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n"));
}
tmp8_clk_ori=rtw_read8(padapter,0x10250003);
tmp8_clk_new=tmp8_clk_ori|0x20;
if(tmp8_clk_new!=tmp8_clk_ori){
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n"));
rtw_write8(padapter, 0x10250003, tmp8_clk_new);
}
#endif
_func_enter_;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, x);
shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5);
if(padapter->EepromAddressSize==8) //CF+ and SDIO
shift_out_bits(padapter, 0, 6);
else //USB
shift_out_bits(padapter, 0, 4);
standby( padapter);
// Commented out by rcnjko, 2004.0
// // Erase this particular word. Write the erase opcode and register
// // number in that order. The opcode is 3bits in length; reg is 6 bits long.
// shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3);
// shift_out_bits(Adapter, reg, Adapter->EepromAddressSize);
//
// if (wait_eeprom_cmd_done(Adapter ) == FALSE)
// {
// return;
// }
standby(padapter );
// write the new word to the EEPROM
// send the write opcode the EEPORM
shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3);
// select which word in the EEPROM that we are writing to.
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
// write the data to the selected EEPROM word.
shift_out_bits(padapter, data, 16);
if (wait_eeprom_cmd_done(padapter ) == _FALSE)
{
goto exit;
}
standby(padapter );
shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5);
shift_out_bits(padapter, reg, 4);
eeprom_clean(padapter );
exit:
#ifdef CONFIG_RTL8712
if(tmp8_clk_new!=tmp8_clk_ori)
rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
if(tmp8_new!=tmp8_ori)
rtw_write8(padapter, 0x102502f1, tmp8_ori);
#endif
_func_exit_;
return;
}
u16 eeprom_read16(_adapter * padapter, u16 reg) //ReadEEprom
{
u16 x;
u16 data=0;
#ifdef CONFIG_RTL8712
u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new;
tmp8_ori= rtw_read8(padapter, 0x102502f1);
tmp8_new = tmp8_ori & 0xf7;
if(tmp8_ori != tmp8_new){
rtw_write8(padapter, 0x102502f1, tmp8_new);
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n"));
}
tmp8_clk_ori=rtw_read8(padapter,0x10250003);
tmp8_clk_new=tmp8_clk_ori|0x20;
if(tmp8_clk_new!=tmp8_clk_ori){
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n"));
rtw_write8(padapter, 0x10250003, tmp8_clk_new);
}
#endif
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
// select EEPROM, reset bits, set _EECS
x = rtw_read8(padapter, EE_9346CR);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
// write the read opcode and register number in that order
// The opcode is 3bits in length, reg is 6 bits long
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
// Now read the data (16 bits) in from the selected EEPROM word
data = shift_in_bits(padapter);
eeprom_clean(padapter);
out:
#ifdef CONFIG_RTL8712
if(tmp8_clk_new!=tmp8_clk_ori)
rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
if(tmp8_new!=tmp8_ori)
rtw_write8(padapter, 0x102502f1, tmp8_ori);
#endif
_func_exit_;
return data;
}
//From even offset
void eeprom_read_sz(_adapter * padapter, u16 reg, u8* data, u32 sz)
{
u16 x, data16;
u32 i;
_func_enter_;
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
// select EEPROM, reset bits, set _EECS
x = rtw_read8(padapter, EE_9346CR);
if(padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
// write the read opcode and register number in that order
// The opcode is 3bits in length, reg is 6 bits long
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
for(i=0; i<sz; i+=2)
{
data16 = shift_in_bits(padapter);
data[i] = data16 & 0xff;
data[i+1] = data16 >>8;
}
eeprom_clean(padapter);
out:
_func_exit_;
}
//addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg)
u8 eeprom_read(_adapter * padapter, u32 addr_off, u8 sz, u8* rbuf)
{
u8 quotient, remainder, addr_2align_odd;
u16 reg, stmp , i=0, idx = 0;
_func_enter_;
reg = (u16)(addr_off >> 1);
addr_2align_odd = (u8)(addr_off & 0x1);
if(addr_2align_odd) //read that start at high part: e.g 1,3,5,7,9,...
{
stmp = eeprom_read16(padapter, reg);
rbuf[idx++] = (u8) ((stmp>>8)&0xff); //return hogh-part of the short
reg++; sz--;
}
quotient = sz >> 1;
remainder = sz & 0x1;
for( i=0 ; i < quotient; i++)
{
stmp = eeprom_read16(padapter, reg+i);
rbuf[idx++] = (u8) (stmp&0xff);
rbuf[idx++] = (u8) ((stmp>>8)&0xff);
}
reg = reg+i;
if(remainder){ //end of read at lower part of short : 0,2,4,6,...
stmp = eeprom_read16(padapter, reg);
rbuf[idx] = (u8)(stmp & 0xff);
}
_func_exit_;
return _TRUE;
}
VOID read_eeprom_content(_adapter * padapter)
{
_func_enter_;
_func_exit_;
}

1202
drivers/net/wireless/rtl8192c/core/rtw_ieee80211.c
View File

File diff suppressed because it is too large Load Diff

422
drivers/net/wireless/rtl8192c/core/rtw_io.c
View File

@@ -1,422 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*
The purpose of rtw_io.c
a. provides the API
b. provides the protocol engine
c. provides the software interface between caller and the hardware interface
Compiler Flag Option:
1. CONFIG_SDIO_HCI:
a. USE_SYNC_IRP: Only sync operations are provided.
b. USE_ASYNC_IRP:Both sync/async operations are provided.
2. CONFIG_USB_HCI:
a. USE_ASYNC_IRP: Both sync/async operations are provided.
3. CONFIG_CFIO_HCI:
b. USE_SYNC_IRP: Only sync operations are provided.
Only sync read/rtw_write_mem operations are provided.
jackson@realtek.com.tw
*/
#define _RTW_IO_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_io.h>
#include <osdep_intf.h>
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
#ifdef CONFIG_SDIO_HCI
#include <sdio_ops.h>
#endif
#ifdef CONFIG_USB_HCI
#include <usb_ops.h>
#endif
#ifdef CONFIG_PCI_HCI
#include <pci_ops.h>
#endif
u8 rtw_read8(_adapter *adapter, u32 addr)
{
u8 r_val;
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
_func_enter_;
_read8 = pintfhdl->io_ops._read8;
r_val = _read8(pintfhdl, addr);
_func_exit_;
return r_val;
}
u16 rtw_read16(_adapter *adapter, u32 addr)
{
u16 r_val;
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
_func_enter_;
_read16 = pintfhdl->io_ops._read16;
r_val = _read16(pintfhdl, addr);
_func_exit_;
return r_val;
}
u32 rtw_read32(_adapter *adapter, u32 addr)
{
u32 r_val;
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
_func_enter_;
_read32 = pintfhdl->io_ops._read32;
r_val = _read32(pintfhdl, addr);
_func_exit_;
return r_val;
}
void _rtw_write8(_adapter *adapter, u32 addr, u8 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
void (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
_func_enter_;
_write8 = pintfhdl->io_ops._write8;
_write8(pintfhdl, addr, val);
}
void _rtw_write16(_adapter *adapter, u32 addr, u16 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
void (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
_func_enter_;
_write16 = pintfhdl->io_ops._write16;
_write16(pintfhdl, addr, val);
_func_exit_;
}
void _rtw_write32(_adapter *adapter, u32 addr, u32 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
void (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
_func_enter_;
_write32 = pintfhdl->io_ops._write32;
_write32(pintfhdl, addr, val);
_func_exit_;
}
void rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *pdata)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = (struct intf_hdl*)(&(pio_priv->intf));
void (*_writeN)(struct intf_hdl *pintfhdl, u32 addr,u32 length, u8 *pdata);
_func_enter_;
_writeN = pintfhdl->io_ops._writeN;
_writeN(pintfhdl, addr,length,pdata);
_func_exit_;
}
void rtw_write8_async(_adapter *adapter, u32 addr, u8 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
void (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
_func_enter_;
_write8_async = pintfhdl->io_ops._write8_async;
_write8_async(pintfhdl, addr, val);
_func_exit_;
}
void rtw_write16_async(_adapter *adapter, u32 addr, u16 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
void (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
_func_enter_;
_write16_async = pintfhdl->io_ops._write16_async;
_write16_async(pintfhdl, addr, val);
_func_exit_;
}
void rtw_write32_async(_adapter *adapter, u32 addr, u32 val)
{
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
void (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
_func_enter_;
_write32_async = pintfhdl->io_ops._write32_async;
_write32_async(pintfhdl, addr, val);
_func_exit_;
}
void rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE))
{
RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));
return;
}
_read_mem = pintfhdl->io_ops._read_mem;
_read_mem(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
_write_mem = pintfhdl->io_ops._write_mem;
_write_mem(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE))
{
RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved));
return;
}
_read_port = pintfhdl->io_ops._read_port;
_read_port(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void read_port_cancel(_adapter *adapter)
{
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
if(_read_port_cancel)
_read_port_cancel(pintfhdl);
}
void rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
_write_port = pintfhdl->io_ops._write_port;
_write_port(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void write_port_cancel(_adapter *adapter)
{
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
if(_write_port_cancel)
_write_port_cancel(pintfhdl);
}
void rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem){
#ifdef CONFIG_SDIO_HCI
void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
_attrib_read= pintfhdl->io_ops._attrib_read;
_attrib_read(pintfhdl, addr, cnt, pmem);
_func_exit_;
#endif
}
void rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem){
#ifdef CONFIG_SDIO_HCI
void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
//struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
_attrib_write= pintfhdl->io_ops._attrib_write;
_attrib_write(pintfhdl, addr, cnt, pmem);
_func_exit_;
#endif
}
int init_io_priv(_adapter *padapter)
{
void (*set_intf_ops)(struct _io_ops *pops);
struct io_priv *piopriv = &padapter->iopriv;
struct intf_hdl *pintf = &piopriv->intf;
piopriv->padapter = padapter;
pintf->padapter = padapter;
pintf->pintf_dev = &padapter->dvobjpriv;
#ifdef CONFIG_SDIO_HCI
set_intf_ops = &sdio_set_intf_ops;
#endif //END OF CONFIG_SDIO_HCI
#ifdef CONFIG_USB_HCI
if(padapter->chip_type == RTL8188C_8192C)
{
#ifdef CONFIG_RTL8192C
set_intf_ops = &rtl8192cu_set_intf_ops;
#endif
}
else if(padapter->chip_type == RTL8192D)
{
#ifdef CONFIG_RTL8192D
set_intf_ops = &rtl8192du_set_intf_ops;
#endif
}
else
{
set_intf_ops = NULL;
}
#endif //END OF CONFIG_USB_HCI
#ifdef CONFIG_PCI_HCI
if(padapter->chip_type == RTL8188C_8192C)
{
#ifdef CONFIG_RTL8192C
set_intf_ops = &rtl8192ce_set_intf_ops;
#endif
}
else if(padapter->chip_type == RTL8192D)
{
#ifdef CONFIG_RTL8192D
set_intf_ops = &rtl8192de_set_intf_ops;
#endif
}
else
{
set_intf_ops = NULL;
}
#endif //END OF CONFIG_PCI_HCI
if(set_intf_ops==NULL)
return _FAIL;
set_intf_ops(&pintf->io_ops);
return _SUCCESS;
}

197
drivers/net/wireless/rtl8192c/core/rtw_ioctl_query.c
View File

@@ -1,197 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_IOCTL_QUERY_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_ioctl_query.h>
#include <wifi.h>
#ifdef PLATFORM_WINDOWS
//
// Added for WPA2-PSK, by Annie, 2005-09-20.
//
u8
query_802_11_capability(
_adapter* Adapter,
u8* pucBuf,
u32 * pulOutLen
)
{
static NDIS_802_11_AUTHENTICATION_ENCRYPTION szAuthEnc[] =
{
{Ndis802_11AuthModeOpen, Ndis802_11EncryptionDisabled},
{Ndis802_11AuthModeOpen, Ndis802_11Encryption1Enabled},
{Ndis802_11AuthModeShared, Ndis802_11EncryptionDisabled},
{Ndis802_11AuthModeShared, Ndis802_11Encryption1Enabled},
{Ndis802_11AuthModeWPA, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPA, Ndis802_11Encryption3Enabled},
{Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption3Enabled},
{Ndis802_11AuthModeWPANone, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPANone, Ndis802_11Encryption3Enabled},
{Ndis802_11AuthModeWPA2, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPA2, Ndis802_11Encryption3Enabled},
{Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption2Enabled},
{Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption3Enabled}
};
static ULONG ulNumOfPairSupported = sizeof(szAuthEnc)/sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION);
NDIS_802_11_CAPABILITY * pCap = (NDIS_802_11_CAPABILITY *)pucBuf;
u8* pucAuthEncryptionSupported = (u8*) pCap->AuthenticationEncryptionSupported;
pCap->Length = sizeof(NDIS_802_11_CAPABILITY);
if(ulNumOfPairSupported > 1 )
pCap->Length += (ulNumOfPairSupported-1) * sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION);
pCap->Version = 2;
pCap->NoOfPMKIDs = NUM_PMKID_CACHE;
pCap->NoOfAuthEncryptPairsSupported = ulNumOfPairSupported;
if( sizeof (szAuthEnc) <= 240 ) // 240 = 256 - 4*4 // SecurityInfo.szCapability: only 256 bytes in size.
{
_rtw_memcpy( pucAuthEncryptionSupported, (u8*)szAuthEnc, sizeof (szAuthEnc) );
*pulOutLen = pCap->Length;
return _TRUE;
}
else
{
*pulOutLen = 0;
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("_query_802_11_capability(): szAuthEnc size is too large.\n"));
return _FALSE;
}
}
u8 query_802_11_association_information( _adapter *padapter,PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo)
{
struct wlan_network *tgt_network;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct security_priv *psecuritypriv=&(padapter->securitypriv);
WLAN_BSSID_EX *psecnetwork=(WLAN_BSSID_EX*)&(psecuritypriv->sec_bss);
u8 * pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
unsigned char i,*auth_ie,*supp_ie;
//NdisZeroMemory(pAssocInfo, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION));
_rtw_memset(pAssocInfo, 0, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION));
//pAssocInfo->Length = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
//------------------------------------------------------
// Association Request related information
//------------------------------------------------------
// Req_1. AvailableRequestFixedIEs
if(psecnetwork!=NULL){
pAssocInfo->AvailableRequestFixedIEs |= NDIS_802_11_AI_REQFI_CAPABILITIES|NDIS_802_11_AI_REQFI_CURRENTAPADDRESS;
pAssocInfo->RequestFixedIEs.Capabilities = (unsigned short)* & psecnetwork->IEs[10];
_rtw_memcpy(pAssocInfo->RequestFixedIEs.CurrentAPAddress,
& psecnetwork->MacAddress, 6);
pAssocInfo->OffsetRequestIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
if(check_fwstate( pmlmepriv, _FW_UNDER_LINKING|_FW_LINKED)==_TRUE)
{
if(psecuritypriv->ndisauthtype>=Ndis802_11AuthModeWPA2)
pDest[0] =48; //RSN Information Element
else
pDest[0] =221; //WPA(SSN) Information Element
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n Adapter->ndisauthtype==Ndis802_11AuthModeWPA)?0xdd:0x30 [%d]",pDest[0]));
supp_ie=&psecuritypriv->supplicant_ie[0];
for(i=0;i<supp_ie[0];i++)
{
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("IEs [%d] = 0x%x \n\n", i,supp_ie[i]));
}
i=13; //0~11 is fixed information element
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("i= %d tgt_network->network.IELength=%d\n\n", i,(int)psecnetwork->IELength));
while((i<supp_ie[0]) && (i<256)){
if((unsigned char)supp_ie[i]==pDest[0]){
_rtw_memcpy((u8 *)(pDest),
&supp_ie[i],
supp_ie[1+i]+2);
break;
}
i=i+supp_ie[i+1]+2;
if(supp_ie[1+i]==0)
i=i+1;
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("iteration i=%d IEs [%d] = 0x%x \n\n", i,i,supp_ie[i+1]));
}
pAssocInfo->RequestIELength += (2 + supp_ie[1+i]);// (2 + psecnetwork->IEs[1+i]+4);
}
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n psecnetwork != NULL,fwstate==_FW_UNDER_LINKING \n"));
}
//------------------------------------------------------
// Association Response related information
//------------------------------------------------------
if(check_fwstate( pmlmepriv, _FW_LINKED)==_TRUE)
{
tgt_network =&(pmlmepriv->cur_network);
if(tgt_network!=NULL){
pAssocInfo->AvailableResponseFixedIEs =
NDIS_802_11_AI_RESFI_CAPABILITIES
|NDIS_802_11_AI_RESFI_ASSOCIATIONID
;
pAssocInfo->ResponseFixedIEs.Capabilities =(unsigned short)* & tgt_network->network.IEs[10];
pAssocInfo->ResponseFixedIEs.StatusCode = 0;
pAssocInfo->ResponseFixedIEs.AssociationId =(unsigned short) tgt_network->aid;
pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)+pAssocInfo->RequestIELength;
auth_ie=&psecuritypriv->authenticator_ie[0];
for(i=0;i<auth_ie[0];i++)
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("IEs [%d] = 0x%x \n\n", i,auth_ie[i]));
i=auth_ie[0]-12;
if(i>0){
_rtw_memcpy((u8 *)&pDest[0],&auth_ie[1],i);
pAssocInfo->ResponseIELength =i;
}
pAssocInfo->OffsetResponseIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength;
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n tgt_network != NULL,fwstate==_FW_LINKED \n"));
}
}
RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n exit query_802_11_association_information \n"));
_func_exit_;
return _TRUE;
}
#endif

1032
drivers/net/wireless/rtl8192c/core/rtw_ioctl_rtl.c
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1283
drivers/net/wireless/rtl8192c/core/rtw_ioctl_set.c
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3678
drivers/net/wireless/rtl8192c/core/rtw_mlme.c
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10541
drivers/net/wireless/rtl8192c/core/rtw_mlme_ext.c
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2254
drivers/net/wireless/rtl8192c/core/rtw_mp.c
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2841
drivers/net/wireless/rtl8192c/core/rtw_mp_ioctl.c
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1726
drivers/net/wireless/rtl8192c/core/rtw_p2p.c
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1128
drivers/net/wireless/rtl8192c/core/rtw_pwrctrl.c
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4445
drivers/net/wireless/rtl8192c/core/rtw_recv.c
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96
drivers/net/wireless/rtl8192c/core/rtw_rf.c
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@@ -1,96 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_RF_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <xmit_osdep.h>
struct ch_freq {
u32 channel;
u32 frequency;
};
struct ch_freq ch_freq_map[] = {
{1, 2412},{2, 2417},{3, 2422},{4, 2427},{5, 2432},
{6, 2437},{7, 2442},{8, 2447},{9, 2452},{10, 2457},
{11, 2462},{12, 2467},{13, 2472},{14, 2484},
/* UNII */
{36, 5180},{40, 5200},{44, 5220},{48, 5240},{52, 5260},
{56, 5280},{60, 5300},{64, 5320},{149, 5745},{153, 5765},
{157, 5785},{161, 5805},{165, 5825},{167, 5835},{169, 5845},
{171, 5855},{173, 5865},
/* HiperLAN2 */
{100, 5500},{104, 5520},{108, 5540},{112, 5560},{116, 5580},
{120, 5600},{124, 5620},{128, 5640},{132, 5660},{136, 5680},
{140, 5700},
/* Japan MMAC */
{34, 5170},{38, 5190},{42, 5210},{46, 5230},
/* Japan */
{184, 4920},{188, 4940},{192, 4960},{196, 4980},
{208, 5040},/* Japan, means J08 */
{212, 5060},/* Japan, means J12 */
{216, 5080},/* Japan, means J16 */
};
int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq));
u32 rtw_ch2freq(u32 channel)
{
u8 i;
u32 freq = 0;
for (i = 0; i < ch_freq_map_num; i++)
{
if (channel == ch_freq_map[i].channel)
{
freq = ch_freq_map[i].frequency;
break;
}
}
if (i == ch_freq_map_num)
freq = 2412;
return freq;
}
u32 rtw_freq2ch(u32 freq)
{
u8 i;
u32 ch = 0;
for (i = 0; i < ch_freq_map_num; i++)
{
if (freq == ch_freq_map[i].frequency)
{
ch = ch_freq_map[i].channel;
break;
}
}
if (i == ch_freq_map_num)
ch = 1;
return ch;
}

2811
drivers/net/wireless/rtl8192c/core/rtw_security.c
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654
drivers/net/wireless/rtl8192c/core/rtw_sta_mgt.c
View File

@@ -1,654 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_STA_MGT_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <xmit_osdep.h>
#include <mlme_osdep.h>
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
#include <sta_info.h>
void _rtw_init_stainfo(struct sta_info *psta)
{
_func_enter_;
_rtw_memset((u8 *)psta, 0, sizeof (struct sta_info));
_rtw_spinlock_init(&psta->lock);
_rtw_init_listhead(&psta->list);
_rtw_init_listhead(&psta->hash_list);
//_rtw_init_listhead(&psta->asoc_list);
//_rtw_init_listhead(&psta->sleep_list);
//_rtw_init_listhead(&psta->wakeup_list);
_rtw_init_queue(&psta->sleep_q);
psta->sleepq_len = 0;
_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
#ifdef CONFIG_AP_MODE
_rtw_init_listhead(&psta->asoc_list);
_rtw_init_listhead(&psta->auth_list);
psta->expire_to = 0;
psta->flags = 0;
psta->capability = 0;
#ifdef CONFIG_NATIVEAP_MLME
psta->nonerp_set = 0;
psta->no_short_slot_time_set = 0;
psta->no_short_preamble_set = 0;
psta->no_ht_gf_set = 0;
psta->no_ht_set = 0;
psta->ht_20mhz_set = 0;
#endif
#endif
_func_exit_;
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
{
struct sta_info *psta;
s32 i;
_func_enter_;
pstapriv->pallocated_stainfo_buf = rtw_zvmalloc (sizeof(struct sta_info) * NUM_STA+ 4);
if(!pstapriv->pallocated_stainfo_buf)
return _FAIL;
pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
((SIZE_PTR)(pstapriv->pallocated_stainfo_buf ) & 3);
_rtw_init_queue(&pstapriv->free_sta_queue);
_rtw_spinlock_init(&pstapriv->sta_hash_lock);
//_rtw_init_queue(&pstapriv->asoc_q);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
_rtw_init_queue(&pstapriv->wakeup_q);
psta = (struct sta_info *)(pstapriv->pstainfo_buf);
for(i = 0; i < NUM_STA; i++)
{
_rtw_init_stainfo(psta);
_rtw_init_listhead(&(pstapriv->sta_hash[i]));
rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
psta++;
}
#ifdef CONFIG_AP_MODE
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
_rtw_init_listhead(&pstapriv->asoc_list);
_rtw_init_listhead(&pstapriv->auth_list);
pstapriv->auth_to = 3; // 3*2 = 6 sec
pstapriv->assoc_to = 3;
pstapriv->expire_to = 900;// 900*2 = 1800 sec = 30 min, expire after no any traffic.
pstapriv->max_num_sta = NUM_STA;
#endif
_func_exit_;
return _SUCCESS;
}
void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv)
{
_func_enter_;
_rtw_spinlock_free(&psta_xmitpriv->lock);
_rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock));
_func_exit_;
}
static void _rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv)
{
_func_enter_;
_rtw_spinlock_free(&psta_recvpriv->lock);
_rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock));
_func_exit_;
}
void rtw_mfree_stainfo(struct sta_info *psta)
{
_func_enter_;
if(&psta->lock != NULL)
_rtw_spinlock_free(&psta->lock);
_rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv);
_rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv);
_func_exit_;
}
// this function is used to free the memory of lock || sema for all stainfos
void rtw_mfree_all_stainfo(struct sta_priv *pstapriv )
{
_irqL irqL;
_list *plist, *phead;
struct sta_info *psta = NULL;
_func_enter_;
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
phead = get_list_head(&pstapriv->free_sta_queue);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
psta = LIST_CONTAINOR(plist, struct sta_info ,list);
plist = get_next(plist);
rtw_mfree_stainfo(psta);
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
_func_exit_;
}
void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv)
{
rtw_mfree_all_stainfo(pstapriv); //be done before free sta_hash_lock
_rtw_spinlock_free(&pstapriv->free_sta_queue.lock);
_rtw_spinlock_free(&pstapriv->sta_hash_lock);
_rtw_spinlock_free(&pstapriv->wakeup_q.lock);
_rtw_spinlock_free(&pstapriv->sleep_q.lock);
}
u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
{
_func_enter_;
if(pstapriv){
rtw_mfree_sta_priv_lock(pstapriv);
if(pstapriv->pallocated_stainfo_buf) {
rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info)*NUM_STA+4);
}
}
_func_exit_;
return _SUCCESS;
}
//struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr)
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
_irqL irqL, irqL2;
uint tmp_aid;
s32 index;
_list *phash_list;
struct sta_info *psta;
_queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
int i = 0;
u16 wRxSeqInitialValue = 0xffff;
_func_enter_;
pfree_sta_queue = &pstapriv->free_sta_queue;
_enter_critical_bh(&(pfree_sta_queue->lock), &irqL);
if (_rtw_queue_empty(pfree_sta_queue) == _TRUE)
{
psta = NULL;
}
else
{
psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list);
rtw_list_delete(&(psta->list));
tmp_aid = psta->aid;
_rtw_init_stainfo(psta);
_rtw_memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
index = wifi_mac_hash(hwaddr);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("rtw_alloc_stainfo: index = %x", index));
if(index >= NUM_STA){
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("ERROR=> rtw_alloc_stainfo: index >= NUM_STA"));
psta= NULL;
goto exit;
}
phash_list = &(pstapriv->sta_hash[index]);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
rtw_list_insert_tail(&psta->hash_list, phash_list);
pstapriv->asoc_sta_count ++ ;
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
// Commented by Albert 2009/08/13
// For the SMC router, the sequence number of first packet of WPS handshake will be 0.
// In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable.
// So, we initialize the tid_rxseq variable as the 0xffff.
for( i = 0; i < 16; i++ )
{
_rtw_memcpy( &psta->sta_recvpriv.rxcache.tid_rxseq[ i ], &wRxSeqInitialValue, 2 );
}
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("alloc number_%d stainfo with hwaddr = %x %x %x %x %x %x \n",
pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5]));
init_addba_retry_timer(pstapriv->padapter, psta);
#ifdef CONFIG_TDLS
psta->padapter = pstapriv->padapter;
init_TPK_timer(pstapriv->padapter, psta);
_init_workitem(&psta->option_workitem, TDLS_option_workitem_callback, psta);
init_ch_switch_timer(pstapriv->padapter, psta);
init_base_ch_timer(pstapriv->padapter, psta);
_init_workitem(&psta->base_ch_workitem, base_channel_workitem_callback, psta);
init_off_ch_timer(pstapriv->padapter, psta);
_init_workitem(&psta->off_ch_workitem, off_channel_workitem_callback, psta);
#endif
//for A-MPDU Rx reordering buffer control
for(i=0; i < 16 ; i++)
{
preorder_ctrl = &psta->recvreorder_ctrl[i];
preorder_ctrl->padapter = pstapriv->padapter;
preorder_ctrl->enable = _FALSE;
preorder_ctrl->indicate_seq = 0xffff;
#ifdef DBG_RX_SEQ
DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d\n", __FUNCTION__, __LINE__,
preorder_ctrl->indicate_seq);
#endif
preorder_ctrl->wend_b= 0xffff;
//preorder_ctrl->wsize_b = (NR_RECVBUFF-2);
preorder_ctrl->wsize_b = 64;//64;
_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_recv_timer(preorder_ctrl);
}
}
exit:
_exit_critical_bh(&(pfree_sta_queue->lock), &irqL);
_func_exit_;
return psta;
}
// using pstapriv->sta_hash_lock to protect
u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta)
{
int i;
_irqL irqL0;
_queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
struct sta_xmit_priv *pstaxmitpriv;
struct xmit_priv *pxmitpriv= &padapter->xmitpriv;
struct sta_priv *pstapriv = &padapter->stapriv;
_func_enter_;
if (psta == NULL)
goto exit;
pfree_sta_queue = &pstapriv->free_sta_queue;
pstaxmitpriv = &psta->sta_xmitpriv;
//rtw_list_delete(&psta->sleep_list);
//rtw_list_delete(&psta->wakeup_list);
rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q);
psta->sleepq_len = 0;
_enter_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0);
rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vo_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending));
_exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0);
_enter_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0);
rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vi_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending));
_exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0);
_enter_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0);
rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->bk_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending));
_exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0);
_enter_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0);
rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->be_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending));
_exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0);
rtw_list_delete(&psta->hash_list);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]));
pstapriv->asoc_sta_count --;
// re-init sta_info; 20061114
_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
_cancel_timer_ex(&psta->addba_retry_timer);
#ifdef CONFIG_TDLS
_cancel_timer_ex(&psta->TPK_timer);
_cancel_timer_ex(&psta->option_timer);
_cancel_timer_ex(&psta->base_ch_timer);
_cancel_timer_ex(&psta->off_ch_timer);
#endif
//for A-MPDU Rx reordering buffer control, cancel reordering_ctrl_timer
for(i=0; i < 16 ; i++)
{
preorder_ctrl = &psta->recvreorder_ctrl[i];
_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
}
#ifdef CONFIG_AP_MODE
rtw_list_delete(&psta->asoc_list);
rtw_list_delete(&psta->auth_list);
psta->expire_to = 0;
psta->sleepq_ac_len = 0;
psta->qos_info = 0;
psta->max_sp_len = 0;
psta->uapsd_bk = 0;
psta->uapsd_be = 0;
psta->uapsd_vi = 0;
psta->uapsd_vo = 0;
psta->has_legacy_ac = 0;
#ifdef CONFIG_NATIVEAP_MLME
pstapriv->sta_dz_bitmap &=~BIT(psta->aid);
pstapriv->tim_bitmap &=~BIT(psta->aid);
rtw_indicate_sta_disassoc_event(padapter, psta);
if (pstapriv->sta_aid[psta->aid - 1] == psta)
{
pstapriv->sta_aid[psta->aid - 1] = NULL;
psta->aid = 0;
}
#endif
#endif
_enter_critical_bh(&(pfree_sta_queue->lock), &irqL0);
rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue));
_exit_critical_bh(&(pfree_sta_queue->lock), &irqL0);
exit:
_func_exit_;
return _SUCCESS;
}
// free all stainfo which in sta_hash[all]
void rtw_free_all_stainfo(_adapter *padapter)
{
_irqL irqL;
_list *plist, *phead;
s32 index;
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info* pbcmc_stainfo =rtw_get_bcmc_stainfo( padapter);
_func_enter_;
if(pstapriv->asoc_sta_count==1)
goto exit;
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
for(index=0; index< NUM_STA; index++)
{
phead = &(pstapriv->sta_hash[index]);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list);
plist = get_next(plist);
if(pbcmc_stainfo!=psta)
rtw_free_stainfo(padapter , psta);
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
exit:
_func_exit_;
}
/* any station allocated can be searched by hash list */
struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
_irqL irqL;
_list *plist, *phead;
struct sta_info *psta = NULL;
u32 index;
u8 *addr;
u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
_func_enter_;
if(hwaddr==NULL)
return NULL;
if(IS_MCAST(hwaddr))
{
addr = bc_addr;
}
else
{
addr = hwaddr;
}
index = wifi_mac_hash(addr);
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
phead = &(pstapriv->sta_hash[index]);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
if ((_rtw_memcmp(psta->hwaddr, addr, ETH_ALEN))== _TRUE)
{ // if found the matched address
break;
}
psta=NULL;
plist = get_next(plist);
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
_func_exit_;
return psta;
}
u32 rtw_init_bcmc_stainfo(_adapter* padapter)
{
struct sta_info *psta;
struct tx_servq *ptxservq;
u32 res=_SUCCESS;
NDIS_802_11_MAC_ADDRESS bcast_addr= {0xff,0xff,0xff,0xff,0xff,0xff};
struct sta_priv *pstapriv = &padapter->stapriv;
_queue *pstapending = &padapter->xmitpriv.bm_pending;
_func_enter_;
psta = rtw_alloc_stainfo(pstapriv, bcast_addr);
if(psta==NULL){
res=_FAIL;
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("rtw_alloc_stainfo fail"));
goto exit;
}
// default broadcast & multicast use macid 1
psta->mac_id = 1;
ptxservq= &(psta->sta_xmitpriv.be_q);
/*
_enter_critical(&pstapending->lock, &irqL0);
if (rtw_is_list_empty(&ptxservq->tx_pending))
rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(pstapending));
_exit_critical(&pstapending->lock, &irqL0);
*/
exit:
_func_exit_;
return _SUCCESS;
}
struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter)
{
struct sta_info *psta;
struct sta_priv *pstapriv = &padapter->stapriv;
u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
_func_enter_;
psta = rtw_get_stainfo(pstapriv, bc_addr);
_func_exit_;
return psta;
}
u8 rtw_access_ctrl(struct wlan_acl_pool* pacl_list, u8 * mac_addr)
{
return _TRUE;
}

1747
drivers/net/wireless/rtl8192c/core/rtw_wlan_util.c
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File diff suppressed because it is too large Load Diff

3779
drivers/net/wireless/rtl8192c/core/rtw_xmit.c
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File diff suppressed because it is too large Load Diff

122
drivers/net/wireless/rtl8192c/hal/hal_init.c
View File

@@ -1,122 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _HAL_INIT_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_byteorder.h>
#include <hal_init.h>
#ifdef CONFIG_SDIO_HCI
#include <sdio_hal.h>
#elif defined(CONFIG_USB_HCI)
#include <usb_hal.h>
#endif
void intf_chip_configure(_adapter *padapter)
{
if(padapter->HalFunc.intf_chip_configure)
padapter->HalFunc.intf_chip_configure(padapter);
}
void intf_read_chip_info(_adapter *padapter)
{
if(padapter->HalFunc.read_adapter_info)
padapter->HalFunc.read_adapter_info(padapter);
}
void intf_read_chip_version(_adapter *padapter)
{
if(padapter->HalFunc.read_chip_version)
padapter->HalFunc.read_chip_version(padapter);
}
void rtw_dm_init(_adapter *padapter)
{
if(padapter->HalFunc.dm_init)
padapter->HalFunc.dm_init(padapter);
}
void rtw_sw_led_init(_adapter *padapter)
{
if(padapter->HalFunc.InitSwLeds)
padapter->HalFunc.InitSwLeds(padapter);
}
void rtw_sw_led_deinit(_adapter *padapter)
{
if(padapter->HalFunc.DeInitSwLeds)
padapter->HalFunc.DeInitSwLeds(padapter);
}
uint rtw_hal_init(_adapter *padapter)
{
uint status = _SUCCESS;
padapter->hw_init_completed=_FALSE;
padapter->bfirst_init = _TRUE;
status = padapter->HalFunc.hal_init(padapter);
if(status == _SUCCESS){
padapter->hw_init_completed = _TRUE;
}
else{
padapter->hw_init_completed = _FALSE;
RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail\n"));
}
padapter->bfirst_init = _FALSE;
RT_TRACE(_module_hal_init_c_,_drv_err_,("-rtl871x_hal_init:status=0x%x\n",status));
return status;
}
uint rtw_hal_deinit(_adapter *padapter)
{
uint status = _SUCCESS;
_func_enter_;
status = padapter->HalFunc.hal_deinit(padapter);
if(status == _SUCCESS){
padapter->hw_init_completed = _FALSE;
}
else
{
RT_TRACE(_module_hal_init_c_,_drv_err_,("\n rtw_hal_deinit: hal_init fail\n"));
}
_func_exit_;
return status;
}
#ifdef SILENT_RESET_FOR_SPECIFIC_PLATFOM
void rtw_sreset_init(_adapter *padapter)
{
if(padapter->HalFunc.sreset_init_value)
padapter->HalFunc.sreset_init_value(padapter);
}
#endif

1134
drivers/net/wireless/rtl8192c/hal/rtl8192c/rtl8192c_cmd.c
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File diff suppressed because it is too large Load Diff

4687
drivers/net/wireless/rtl8192c/hal/rtl8192c/rtl8192c_dm.c
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File diff suppressed because it is too large Load Diff

3541
drivers/net/wireless/rtl8192c/hal/rtl8192c/rtl8192c_hal_init.c
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File diff suppressed because it is too large Load Diff

5415
drivers/net/wireless/rtl8192c/hal/rtl8192c/rtl8192c_phycfg.c
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File diff suppressed because it is too large Load Diff

1047
drivers/net/wireless/rtl8192c/hal/rtl8192c/rtl8192c_rf6052.c
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File diff suppressed because it is too large Load Diff

752
drivers/net/wireless/rtl8192c/hal/rtl8192c/rtl8192c_rxdesc.c
View File

@@ -1,752 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8192C_REDESC_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8192c_hal.h>
static u8 evm_db2percentage(s8 value)
{
//
// -33dB~0dB to 0%~99%
//
s8 ret_val;
ret_val = value;
//ret_val /= 2;
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("EVMdbToPercentage92S Value=%d / %x \n", ret_val, ret_val));
if(ret_val >= 0)
ret_val = 0;
if(ret_val <= -33)
ret_val = -33;
ret_val = 0 - ret_val;
ret_val*=3;
if(ret_val == 99)
ret_val = 100;
return(ret_val);
}
static s32 signal_scale_mapping(_adapter *padapter, s32 cur_sig )
{
s32 ret_sig;
#ifdef CONFIG_USB_HCI
if(cur_sig >= 51 && cur_sig <= 100)
{
ret_sig = 100;
}
else if(cur_sig >= 41 && cur_sig <= 50)
{
ret_sig = 80 + ((cur_sig - 40)*2);
}
else if(cur_sig >= 31 && cur_sig <= 40)
{
ret_sig = 66 + (cur_sig - 30);
}
else if(cur_sig >= 21 && cur_sig <= 30)
{
ret_sig = 54 + (cur_sig - 20);
}
else if(cur_sig >= 10 && cur_sig <= 20)
{
ret_sig = 42 + (((cur_sig - 10) * 2) / 3);
}
else if(cur_sig >= 5 && cur_sig <= 9)
{
ret_sig = 22 + (((cur_sig - 5) * 3) / 2);
}
else if(cur_sig >= 1 && cur_sig <= 4)
{
ret_sig = 6 + (((cur_sig - 1) * 3) / 2);
}
else
{
ret_sig = cur_sig;
}
#else
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if(pHalData->CustomerID == RT_CID_819x_Lenovo)
{
// Step 1. Scale mapping.
// 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.
// 20100426 Joseph: Modify Signal strength mapping.
// This modification makes the RSSI indication similar to Intel solution.
// 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.
if(cur_sig >= 54 && cur_sig <= 100)
{
ret_sig = 100;
}
else if(cur_sig>=42 && cur_sig <= 53 )
{
ret_sig = 95;
}
else if(cur_sig>=36 && cur_sig <= 41 )
{
ret_sig = 74 + ((cur_sig - 36) *20)/6;
}
else if(cur_sig>=33 && cur_sig <= 35 )
{
ret_sig = 65 + ((cur_sig - 33) *8)/2;
}
else if(cur_sig>=18 && cur_sig <= 32 )
{
ret_sig = 62 + ((cur_sig - 18) *2)/15;
}
else if(cur_sig>=15 && cur_sig <= 17 )
{
ret_sig = 33 + ((cur_sig - 15) *28)/2;
}
else if(cur_sig>=10 && cur_sig <= 14 )
{
ret_sig = 39;
}
else if(cur_sig>=8 && cur_sig <= 9 )
{
ret_sig = 33;
}
else if(cur_sig <= 8 )
{
ret_sig = 19;
}
}
else
{
// Step 1. Scale mapping.
if(cur_sig >= 61 && cur_sig <= 100)
{
ret_sig = 90 + ((cur_sig - 60) / 4);
}
else if(cur_sig >= 41 && cur_sig <= 60)
{
ret_sig = 78 + ((cur_sig - 40) / 2);
}
else if(cur_sig >= 31 && cur_sig <= 40)
{
ret_sig = 66 + (cur_sig - 30);
}
else if(cur_sig >= 21 && cur_sig <= 30)
{
ret_sig = 54 + (cur_sig - 20);
}
else if(cur_sig >= 5 && cur_sig <= 20)
{
ret_sig = 42 + (((cur_sig - 5) * 2) / 3);
}
else if(cur_sig == 4)
{
ret_sig = 36;
}
else if(cur_sig == 3)
{
ret_sig = 27;
}
else if(cur_sig == 2)
{
ret_sig = 18;
}
else if(cur_sig == 1)
{
ret_sig = 9;
}
else
{
ret_sig = cur_sig;
}
}
#endif
return ret_sig;
}
static s32 translate2dbm(u8 signal_strength_idx)
{
s32 signal_power; // in dBm.
// Translate to dBm (x=0.5y-95).
signal_power = (s32)((signal_strength_idx + 1) >> 1);
signal_power -= 95;
return signal_power;
}
void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat)
{
PHY_STS_OFDM_8192CD_T *pOfdm_buf;
PHY_STS_CCK_8192CD_T *pCck_buf;
u8 i, max_spatial_stream, evm;
s8 rx_pwr[4], rx_pwr_all = 0;
u8 pwdb_all;
u32 rssi,total_rssi=0;
u8 bcck_rate=0, rf_rx_num = 0, cck_highpwr = 0;
_adapter *padapter = prframe->u.hdr.adapter;
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
u8 tmp_rxsnr;
s8 rx_snrX;
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
PHY_RX_DRIVER_INFO_8192CD *pDrvInfo = ((PHY_RX_DRIVER_INFO_8192CD *)pphy_stat);
u8 bant1_sel = (pDrvInfo->ANTSEL == 1)?_TRUE:_FALSE;
#endif
// Record it for next packet processing
bcck_rate=(pattrib->mcs_rate<=3? 1:0);
if(bcck_rate) //CCK
{
u8 report;
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
if(bant1_sel == _TRUE)
pHalData->CCK_Ant1_Cnt++;
else
pHalData->CCK_Ant2_Cnt++;
#endif
// CCK Driver info Structure is not the same as OFDM packet.
pCck_buf = (PHY_STS_CCK_8192CD_T *)pphy_stat;
//Adapter->RxStats.NumQryPhyStatusCCK++;
//
// (1)Hardware does not provide RSSI for CCK
// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
//
if(padapter->pwrctrlpriv.rf_pwrstate == rf_on)
cck_highpwr = (u8)pHalData->bCckHighPower;
else
cck_highpwr = _FALSE;
if(!cck_highpwr)
{
report = pCck_buf->cck_agc_rpt&0xc0;
report = report>>6;
switch(report)
{
// 03312009 modified by cosa
// Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion
// Note: different RF with the different RNA gain.
case 0x3:
rx_pwr_all = (-46) - (pCck_buf->cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = (-26) - (pCck_buf->cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = (-12) - (pCck_buf->cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = (16) - (pCck_buf->cck_agc_rpt & 0x3e);
break;
}
}
else
{
report = pCck_buf->cck_agc_rpt & 0x60;
report = report>>5;
switch(report)
{
case 0x3:
rx_pwr_all = (-46) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
break;
case 0x2:
rx_pwr_all = (-26)- ((pCck_buf->cck_agc_rpt & 0x1f)<<1);
break;
case 0x1:
rx_pwr_all = (-12) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
break;
case 0x0:
rx_pwr_all = (16) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ;
break;
}
}
pwdb_all= query_rx_pwr_percentage(rx_pwr_all);
if(pHalData->CustomerID == RT_CID_819x_Lenovo)
{
// CCK gain is smaller than OFDM/MCS gain,
// so we add gain diff by experiences, the val is 6
pwdb_all+=6;
if(pwdb_all > 100)
pwdb_all = 100;
// modify the offset to make the same gain index with OFDM.
if(pwdb_all > 34 && pwdb_all <= 42)
pwdb_all -= 2;
else if(pwdb_all > 26 && pwdb_all <= 34)
pwdb_all -= 6;
else if(pwdb_all > 14 && pwdb_all <= 26)
pwdb_all -= 8;
else if(pwdb_all > 4 && pwdb_all <= 14)
pwdb_all -= 4;
}
pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive
pattrib->RecvSignalPower = rx_pwr_all; //dBM
padapter->recvpriv.rxpwdb = rx_pwr_all;
//
// (3) Get Signal Quality (EVM)
//
//if(bPacketMatchBSSID)
{
u8 sq;
if(pHalData->CustomerID == RT_CID_819x_Lenovo)
{
// mapping to 5 bars for vista signal strength
// signal quality in driver will be displayed to signal strength
// in vista.
if(pwdb_all >= 50)
sq = 100;
else if(pwdb_all >= 35 && pwdb_all < 50)
sq = 80;
else if(pwdb_all >= 22 && pwdb_all < 35)
sq = 60;
else if(pwdb_all >= 18 && pwdb_all < 22)
sq = 40;
else
sq = 20;
}
else
{
if(pwdb_all> 40)
{
sq = 100;
}
else
{
sq = pCck_buf->SQ_rpt;
if(pCck_buf->SQ_rpt > 64)
sq = 0;
else if (pCck_buf->SQ_rpt < 20)
sq= 100;
else
sq = ((64-sq) * 100) / 44;
}
}
pattrib->signal_qual=sq;
pattrib->rx_mimo_signal_qual[0]=sq;
pattrib->rx_mimo_signal_qual[1]=(-1);
}
}
else //OFDM/HT
{
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
if(bant1_sel == _TRUE)
pHalData->OFDM_Ant1_Cnt++;
else
pHalData->OFDM_Ant2_Cnt++;
#endif
pdmpriv->OFDM_Pkt_Cnt++;
pOfdm_buf = (PHY_STS_OFDM_8192CD_T *)pphy_stat;
//
// (1)Get RSSI per-path
//
for(i=0; i<pHalData->NumTotalRFPath; i++)
{
// 2008/01/30 MH we will judge RF RX path now.
if (pHalData->bRFPathRxEnable[i])
rf_rx_num++;
//else
//continue;
rx_pwr[i] = ((pOfdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
/* Translate DBM to percentage. */
rssi=query_rx_pwr_percentage(rx_pwr[i]);
total_rssi += rssi;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], rssi));
//Get Rx snr value in DB
tmp_rxsnr = pOfdm_buf->rxsnr_X[i];
rx_snrX = (s8)(tmp_rxsnr);
rx_snrX >>= 1;
padapter->recvpriv.RxSNRdB[i] = (int)rx_snrX;
/* Record Signal Strength for next packet */
//if(bPacketMatchBSSID)
{
//pRfd->Status.RxMIMOSignalStrength[i] =(u1Byte) RSSI;
//The following is for lenovo signal strength in vista
if(pHalData->CustomerID == RT_CID_819x_Lenovo)
{
u8 sq;
if(i == 0)
{
// mapping to 5 bars for vista signal strength
// signal quality in driver will be displayed to signal strength
// in vista.
if(rssi >= 50)
sq = 100;
else if(rssi >= 35 && rssi < 50)
sq = 80;
else if(rssi >= 22 && rssi < 35)
sq = 60;
else if(rssi >= 18 && rssi < 22)
sq = 40;
else
sq = 20;
//DbgPrint("ofdm/mcs RSSI=%d\n", RSSI);
//pRfd->Status.SignalQuality = SQ;
//DbgPrint("ofdm/mcs SQ = %d\n", pRfd->Status.SignalQuality);
}
}
}
}
//
// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive),average
//
rx_pwr_all = (((pOfdm_buf->pwdb_all ) >> 1 )& 0x7f) -110;//for OFDM Average RSSI
pwdb_all = query_rx_pwr_percentage(rx_pwr_all);
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("PWDB_ALL=%d\n", pwdb_all));
pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive
pattrib->RecvSignalPower = rx_pwr_all;//dBM
padapter->recvpriv.rxpwdb = rx_pwr_all;
//
// (3)EVM of HT rate
//
if(pHalData->CustomerID != RT_CID_819x_Lenovo)
{
if(pattrib->rxht && pattrib->mcs_rate >=20 && pattrib->mcs_rate<=27)
max_spatial_stream = 2; //both spatial stream make sense
else
max_spatial_stream = 1; //only spatial stream 1 makes sense
for(i=0; i<max_spatial_stream; i++)
{
// Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
// fill most significant bit to "zero" when doing shifting operation which may change a negative
// value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
evm = evm_db2percentage( (pOfdm_buf->rxevm_X[i]/*/ 2*/));//dbm
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",
pattrib->mcs_rate, pOfdm_buf->rxevm_X[i], "%",evm));
//if(bPacketMatchBSSID)
{
if(i==0) // Fill value in RFD, Get the first spatial stream only
{
pattrib->signal_qual = (u8)(evm & 0xff);
}
pattrib->rx_mimo_signal_qual[i] = (u8)(evm & 0xff);
}
}
}
//
// 4. Record rx statistics for debug
//
}
//UI BSS List signal strength(in percentage), make it good looking, from 0~100.
//It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
if(bcck_rate)
{
pattrib->signal_strength=(u8)signal_scale_mapping(padapter, pwdb_all);
}
else
{
if (rf_rx_num != 0)
{
pattrib->signal_strength= (u8)(signal_scale_mapping(padapter, total_rssi/=rf_rx_num));
}
}
//DBG_8192C("%s,rx_pwr_all(%d),RxPWDBAll(%d)\n",__FUNCTION__,rx_pwr_all,pattrib->RxPWDBAll);
}
static void process_rssi(_adapter *padapter,union recv_frame *prframe)
{
u32 last_rssi, tmp_val;
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
//DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength);
//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
{
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
if(signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
}
signal_stat->total_num++;
signal_stat->total_val += pattrib->signal_strength;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
//Adapter->RxStats.RssiCalculateCnt++; //For antenna Test
if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX)
{
padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX;
last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index];
padapter->recvpriv.signal_strength_data.total_val -= last_rssi;
}
padapter->recvpriv.signal_strength_data.total_val +=pattrib->signal_strength;
padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->signal_strength;
if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX)
padapter->recvpriv.signal_strength_data.index = 0;
tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num;
if(padapter->recvpriv.is_signal_dbg) {
padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg;
padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg);
} else {
padapter->recvpriv.signal_strength= tmp_val;
padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val);
}
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num));
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
}
}// Process_UI_RSSI_8192C
static void process_PWDB(_adapter *padapter, union recv_frame *prframe)
{
int UndecoratedSmoothedPWDB;
int UndecoratedSmoothedCCK;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
struct rx_pkt_attrib *pattrib= &prframe->u.hdr.attrib;
struct sta_info *psta = prframe->u.hdr.psta;
u8 isCCKrate=(pattrib->mcs_rate<=3? 1:0);
if(psta)
{
UndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
UndecoratedSmoothedCCK = psta->rssi_stat.UndecoratedSmoothedCCK;
}
else
{
UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
UndecoratedSmoothedCCK = pdmpriv->UndecoratedSmoothedCCK;
}
//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
if(!isCCKrate)
{
// Process OFDM RSSI
if(UndecoratedSmoothedPWDB < 0) // initialize
{
UndecoratedSmoothedPWDB = pattrib->RxPWDBAll;
}
if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedPWDB)
{
UndecoratedSmoothedPWDB =
( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB + 1;
}
else
{
UndecoratedSmoothedPWDB =
( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) +
(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
}
}
else
{
// Process CCK RSSI
if(UndecoratedSmoothedCCK < 0) // initialize
{
UndecoratedSmoothedCCK = pattrib->RxPWDBAll;
}
if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedCCK)
{
UndecoratedSmoothedCCK =
( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
}
else
{
UndecoratedSmoothedCCK =
( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
(pattrib->RxPWDBAll)) /(Rx_Smooth_Factor);
}
}
if(psta)
{
//psta->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;//todo:
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
if(pdmpriv->RSSI_Select == RSSI_OFDM)
psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
else if(pdmpriv->RSSI_Select == RSSI_CCK)
psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
psta->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
}
else
{
//pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
if(pdmpriv->RSSI_Select == RSSI_OFDM)
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
else if(pdmpriv->RSSI_Select == RSSI_CCK)
pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK;
pdmpriv->UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
}
//UpdateRxSignalStatistics8192C(padapter, prframe);
}
static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
{
u32 last_evm=0, tmpVal;
struct rx_pkt_attrib *pattrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
struct signal_stat * signal_stat;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
if(prframe == NULL || padapter==NULL){
return;
}
pattrib = &prframe->u.hdr.attrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
signal_stat = &padapter->recvpriv.signal_qual_data;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
//DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual);
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
if(signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
}
signal_stat->total_num++;
signal_stat->total_val += pattrib->signal_strength;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
if(pattrib->signal_qual != 0)
{
//
// 1. Record the general EVM to the sliding window.
//
if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
{
padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX;
last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index];
padapter->recvpriv.signal_qual_data.total_val -= last_evm;
}
padapter->recvpriv.signal_qual_data.total_val += pattrib->signal_qual;
padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->signal_qual;
if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
padapter->recvpriv.signal_qual_data.index = 0;
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->signal_qual));
// <1> Showed on UI for user, in percentage.
tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num;
padapter->recvpriv.signal_qual=(u8)tmpVal;
}
else
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->signal_qual));
}
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
}// Process_UiLinkQuality8192S
//void rtl8192c_process_phy_info(_adapter *padapter, union recv_frame *prframe)
void rtl8192c_process_phy_info(_adapter *padapter, void *prframe)
{
union recv_frame *precvframe = (union recv_frame *)prframe;
#ifdef CONFIG_SW_ANTENNA_DIVERSITY
// If we switch to the antenna for testing, the signal strength
// of the packets in this time shall not be counted into total receiving power.
// This prevents error counting Rx signal strength and affecting other dynamic mechanism.
// Select the packets to do RSSI checking for antenna switching.
SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll);
if(GET_HAL_DATA(padapter)->RSSI_test == _TRUE)
return;
#endif
//
// Check RSSI
//
process_rssi(padapter, precvframe);
//
// Check PWDB.
//
process_PWDB(padapter, precvframe);
//
// Check EVM
//
process_link_qual(padapter, precvframe);
}

285
drivers/net/wireless/rtl8192c/hal/rtl8192c/rtl8192c_sreset.c
View File

@@ -1,285 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <rtl8192c_sreset.h>
#include <rtl8192c_hal.h>
#ifdef SILENT_RESET_FOR_SPECIFIC_PLATFOM
extern void rtw_cancel_all_timer(_adapter *padapter);
void rtl8192c_sreset_init_value(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
_rtw_mutex_init(&psrtpriv->silentreset_mutex );
psrtpriv->silent_reset_inprogress = _FALSE;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time =0;
psrtpriv->last_tx_complete_time =0;
}
void rtl8192c_sreset_reset_value(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
psrtpriv->silent_reset_inprogress = _FALSE;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time =0;
psrtpriv->last_tx_complete_time =0;
}
static void _restore_security_setting(_adapter *padapter)
{
u8 EntryId = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct sta_priv * pstapriv = &padapter->stapriv;
struct sta_info *psta;
struct security_priv* psecuritypriv=&(padapter->securitypriv);
struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
(pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)
? rtw_write8(padapter, REG_SECCFG, 0xcc)
: rtw_write8(padapter, REG_SECCFG, 0xcf);
if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) ||
( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ ))
{
for(EntryId=0; EntryId<4; EntryId++)
{
if(EntryId == psecuritypriv->dot11PrivacyKeyIndex)
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1);
else
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0);
}
}
else if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_))
{
psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
if (psta == NULL) {
//DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n"));
}
else
{
//pairwise key
rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE);
//group key
rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0);
}
}
}
static void _restore_network_status(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
unsigned short caps;
u8 join_type;
#if 1
//=======================================================
// reset related register of Beacon control
//set MSR to nolink
Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_);
// reject all data frame
rtw_write16(padapter, REG_RXFLTMAP2,0x00);
//reset TSF
rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
//disable update TSF
if(IS_NORMAL_CHIP(pHalData->VersionID))
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4));
else
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)|BIT(5));
//=======================================================
rtw_joinbss_reset(padapter);
set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
//pmlmeinfo->assoc_AP_vendor = maxAP;
if (padapter->registrypriv.wifi_spec) {
// for WiFi test, follow WMM test plan spec
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549);
// for WiFi test, mixed mode with intel STA under bg mode throughput issue
if (padapter->mlmepriv.htpriv.ht_option == 0)
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320);
} else {
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444);
}
//disable dynamic functions, such as high power, DIG
//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
#endif
padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
join_type = 0;
padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3));
mlmeext_joinbss_event_callback(padapter, 1);
//restore Sequence No.
rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn);
}
void rtl8192c_silentreset_for_specific_platform(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
_irqL irqL;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
if (!netif_queue_stopped(padapter->pnetdev))
netif_stop_queue(padapter->pnetdev);
rtw_cancel_all_timer(padapter);
tasklet_kill(&pxmitpriv->xmit_tasklet);
_enter_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
psrtpriv->silent_reset_inprogress = _TRUE;
pwrpriv->change_rfpwrstate = rf_off;
#ifdef CONFIG_IPS
ips_enter(padapter);
ips_leave(padapter);
#endif
if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
{
_restore_network_status(padapter);
_restore_security_setting(padapter);
}
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING);
psrtpriv->silent_reset_inprogress = _FALSE;
_exit_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
if (netif_queue_stopped(padapter->pnetdev))
netif_wake_queue(padapter->pnetdev);
}
void rtl8192c_sreset_xmit_status_check(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
unsigned long current_time;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
unsigned int diff_time;
if(rtw_read32(padapter, REG_TXDMA_STATUS) !=0x00){
rtl8192c_silentreset_for_specific_platform(padapter);
}
//total xmit irp = 4
//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
//if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
current_time = rtw_get_current_time();
if(0==pxmitpriv->free_xmitbuf_cnt)
{
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
if(diff_time > 2000){
if(psrtpriv->last_tx_complete_time==0){
psrtpriv->last_tx_complete_time = current_time;
}
else{
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
if(diff_time > 4000){
//padapter->Wifi_Error_Status = WIFI_TX_HANG;
DBG_8192C("tx hang...start reset\n");
rtl8192c_silentreset_for_specific_platform(padapter);
}
}
}
}
}
void rtl8192c_sreset_linked_status_check(_adapter *padapter)
{
u32 regc50,regc58,reg824,reg800;
regc50 = rtw_read32(padapter,0xc50);
regc58 = rtw_read32(padapter,0xc58);
reg824 = rtw_read32(padapter,0x824);
reg800 = rtw_read32(padapter,0x800);
if( ((regc50&0xFFFFFF00)!= 0x69543400)||
((regc58&0xFFFFFF00)!= 0x69543400)||
(((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))||
( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000)))
{
rtl8192c_silentreset_for_specific_platform(padapter);
}
}
#ifdef SILENT_RESET_FOR_SPECIFIC_PLATFOM
u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
u8 status = WIFI_STATUS_SUCCESS;
u32 val32 = 0;
_irqL irqL;
if(psrtpriv->silent_reset_inprogress == _TRUE)
{
return status;
}
val32 =rtw_read32(padapter,REG_TXDMA_STATUS);
if(val32==0xeaeaeaea){
psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
}
else if(val32!=0){
DBG_8192C("txdmastatu(%x)\n",val32);
psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR;
}
if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status)
{
DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status);
status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL)));
}
DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status);
//status restore
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
return status;
}
#endif
#endif

7346
drivers/net/wireless/rtl8192c/hal/rtl8192c/usb/Hal8192CUHWImg.c
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File diff suppressed because it is too large Load Diff

2659
drivers/net/wireless/rtl8192c/hal/rtl8192c/usb/rtl8192cu_led.c
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File diff suppressed because it is too large Load Diff

380
drivers/net/wireless/rtl8192c/hal/rtl8192c/usb/rtl8192cu_recv.c
View File

@@ -1,380 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8192CU_RECV_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <mlme_osdep.h>
#include <ip.h>
#include <if_ether.h>
#include <ethernet.h>
#include <usb_ops.h>
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
#include <wifi.h>
#include <circ_buf.h>
#include <rtl8192c_hal.h>
void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf)
{
precvbuf->transfer_len = 0;
precvbuf->len = 0;
precvbuf->ref_cnt = 0;
if(precvbuf->pbuf)
{
precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf;
precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
}
}
int rtl8192cu_init_recv_priv(_adapter *padapter)
{
struct recv_priv *precvpriv = &padapter->recvpriv;
int i, res = _SUCCESS;
struct recv_buf *precvbuf;
#ifdef CONFIG_RECV_THREAD_MODE
_rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed
_rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed
#endif
#ifdef PLATFORM_LINUX
tasklet_init(&precvpriv->recv_tasklet,
(void(*)(unsigned long))rtl8192cu_recv_tasklet,
(unsigned long)padapter);
#endif
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL);
if(precvpriv->int_in_urb == NULL){
DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n");
}
#endif
precvpriv->int_in_buf = rtw_zmalloc(sizeof(INTERRUPT_MSG_FORMAT_EX));
if(precvpriv->int_in_buf == NULL){
DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n");
}
#endif
//init recv_buf
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
_rtw_init_queue(&precvpriv->recv_buf_pending_queue);
#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX
precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4);
if(precvpriv->pallocated_recv_buf==NULL){
res= _FAIL;
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n"));
goto exit;
}
_rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4);
//precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 -
// ((uint) (precvpriv->pallocated_recv_buf) &(4-1));
precvbuf = (struct recv_buf*)precvpriv->precv_buf;
for(i=0; i < NR_RECVBUFF ; i++)
{
_rtw_init_listhead(&precvbuf->list);
_rtw_spinlock_init(&precvbuf->recvbuf_lock);
precvbuf->alloc_sz = MAX_RECVBUF_SZ;
res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
if(res==_FAIL)
break;
precvbuf->ref_cnt = 0;
precvbuf->adapter =padapter;
//rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue));
precvbuf++;
}
precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF;
#ifdef PLATFORM_LINUX
skb_queue_head_init(&precvpriv->rx_skb_queue);
#ifdef CONFIG_PREALLOC_RECV_SKB
{
int i;
SIZE_PTR tmpaddr=0;
SIZE_PTR alignment=0;
struct sk_buff *pskb=NULL;
skb_queue_head_init(&precvpriv->free_recv_skb_queue);
for(i=0; i<NR_PREALLOC_RECV_SKB; i++)
{
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
#else
pskb = netdev_alloc_skb(padapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
#endif
if(pskb)
{
pskb->dev = padapter->pnetdev;
tmpaddr = (SIZE_PTR)pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
}
pskb=NULL;
}
}
#endif
#endif
exit:
return res;
}
void rtl8192cu_free_recv_priv (_adapter *padapter)
{
int i;
struct recv_buf *precvbuf;
struct recv_priv *precvpriv = &padapter->recvpriv;
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for(i=0; i < NR_RECVBUFF ; i++)
{
rtw_os_recvbuf_resource_free(padapter, precvbuf);
precvbuf++;
}
if(precvpriv->pallocated_recv_buf)
rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
if(precvpriv->int_in_urb)
{
usb_free_urb(precvpriv->int_in_urb);
}
#endif
if(precvpriv->int_in_buf)
rtw_mfree(precvpriv->int_in_buf, sizeof(INTERRUPT_MSG_FORMAT_EX));
#endif
#ifdef PLATFORM_LINUX
if (skb_queue_len(&precvpriv->rx_skb_queue)) {
DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n");
}
skb_queue_purge(&precvpriv->rx_skb_queue);
#ifdef CONFIG_PREALLOC_RECV_SKB
if (skb_queue_len(&precvpriv->free_recv_skb_queue)) {
//DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
}
skb_queue_purge(&precvpriv->free_recv_skb_queue);
#endif
#endif
}
void rtl8192cu_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat)
{
u8 physt, qos, shift, icverr, htc, crcerr;
u16 drvinfo_sz=0;
struct phy_stat *pphy_info;
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
_adapter *padapter = precvframe->u.hdr.adapter;
u8 bPacketMatchBSSID =_FALSE;
u8 bPacketToSelf = _FALSE;
u8 bPacketBeacon = _FALSE;
//Offset 0
drvinfo_sz = (le32_to_cpu(prxstat->rxdw0)&0x000f0000)>>16;
drvinfo_sz = drvinfo_sz<<3;
pattrib->bdecrypted = ((le32_to_cpu(prxstat->rxdw0) & BIT(27)) >> 27)? 0:1;
physt = ((le32_to_cpu(prxstat->rxdw0) & BIT(26)) >> 26)? 1:0;
shift = (le32_to_cpu(prxstat->rxdw0)&0x03000000)>>24;
qos = ((le32_to_cpu(prxstat->rxdw0) & BIT(23)) >> 23)? 1:0;
icverr = ((le32_to_cpu(prxstat->rxdw0) & BIT(15)) >> 15)? 1:0;
pattrib->crc_err = crcerr = ((le32_to_cpu(prxstat->rxdw0) & BIT(14)) >> 14 )? 1:0;
//Offset 4
//Offset 8
//Offset 12
#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
if ( le32_to_cpu(prxstat->rxdw3) & BIT(13)) {
pattrib->tcpchk_valid = 1; // valid
if ( le32_to_cpu(prxstat->rxdw3) & BIT(11) ) {
pattrib->tcp_chkrpt = 1; // correct
//DBG_8192C("tcp csum ok\n");
} else
pattrib->tcp_chkrpt = 0; // incorrect
if ( le32_to_cpu(prxstat->rxdw3) & BIT(12) )
pattrib->ip_chkrpt = 1; // correct
else
pattrib->ip_chkrpt = 0; // incorrect
} else {
pattrib->tcpchk_valid = 0; // invalid
}
#endif
pattrib->mcs_rate=(u8)((le32_to_cpu(prxstat->rxdw3))&0x3f);
pattrib->rxht=(u8)((le32_to_cpu(prxstat->rxdw3) >>6)&0x1);
htc = (u8)((le32_to_cpu(prxstat->rxdw3) >>10)&0x1);
//Offset 16
//Offset 20
#if 0 //dump rxdesc for debug
DBG_8192C("drvinfo_sz=%d\n", drvinfo_sz);
DBG_8192C("physt=%d\n", physt);
DBG_8192C("shift=%d\n", shift);
DBG_8192C("qos=%d\n", qos);
DBG_8192C("icverr=%d\n", icverr);
DBG_8192C("htc=%d\n", htc);
DBG_8192C("bdecrypted=%d\n", pattrib->bdecrypted);
DBG_8192C("mcs_rate=%d\n", pattrib->mcs_rate);
DBG_8192C("rxht=%d\n", pattrib->rxht);
#endif
//phy_info
if(drvinfo_sz && physt)
{
bPacketMatchBSSID = ((!IsFrameTypeCtrl(precvframe->u.hdr.rx_data)) && !icverr && !crcerr &&
_rtw_memcmp(get_hdr_bssid(precvframe->u.hdr.rx_data), get_bssid(&padapter->mlmepriv), ETH_ALEN));
bPacketToSelf = bPacketMatchBSSID && (_rtw_memcmp(get_da(precvframe->u.hdr.rx_data), myid(&padapter->eeprompriv), ETH_ALEN));
bPacketBeacon = (GetFrameSubType(precvframe->u.hdr.rx_data) == WIFI_BEACON);
pphy_info = (struct phy_stat *)(prxstat+1);
//DBG_8192C("pphy_info, of0=0x%08x\n", *pphy_info);
//DBG_8192C("pphy_info, of1=0x%08x\n", *(pphy_info+1));
//DBG_8192C("pphy_info, of2=0x%08x\n", *(pphy_info+2));
//DBG_8192C("pphy_info, of3=0x%08x\n", *(pphy_info+3));
//DBG_8192C("pphy_info, of4=0x%08x\n", *(pphy_info+4));
//DBG_8192C("pphy_info, of5=0x%08x\n", *(pphy_info+5));
//DBG_8192C("pphy_info, of6=0x%08x\n", *(pphy_info+6));
//DBG_8192C("pphy_info, of7=0x%08x\n", *(pphy_info+7));
rtl8192c_query_rx_phy_status(precvframe, pphy_info);
precvframe->u.hdr.psta = NULL;
if(bPacketMatchBSSID && check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
{
u8 *sa;
struct sta_info *psta=NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
sa = get_sa(precvframe->u.hdr.rx_data);
psta = rtw_get_stainfo(pstapriv, sa);
if(psta)
{
precvframe->u.hdr.psta = psta;
rtl8192c_process_phy_info(padapter, precvframe);
}
}
else if( bPacketToSelf || (bPacketBeacon && bPacketMatchBSSID) )
{
if(check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
{
u8 *sa;
struct sta_info *psta=NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
sa = get_sa(precvframe->u.hdr.rx_data);
psta = rtw_get_stainfo(pstapriv, sa);
if(psta)
{
precvframe->u.hdr.psta = psta;
}
}
rtl8192c_process_phy_info(padapter, precvframe);
}
#if 0 //dump phy_status for debug
DBG_8192C("signal_qual=%d\n", pattrib->signal_qual);
DBG_8192C("signal_strength=%d\n", pattrib->signal_strength);
#endif
}
}

1338
drivers/net/wireless/rtl8192c/hal/rtl8192c/usb/rtl8192cu_xmit.c
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5453
drivers/net/wireless/rtl8192c/hal/rtl8192c/usb/usb_halinit.c
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File diff suppressed because it is too large Load Diff

1208
drivers/net/wireless/rtl8192c/hal/rtl8192c/usb/usb_ops_ce.c
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File diff suppressed because it is too large Load Diff

1997
drivers/net/wireless/rtl8192c/hal/rtl8192c/usb/usb_ops_linux.c
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1266
drivers/net/wireless/rtl8192c/hal/rtl8192c/usb/usb_ops_xp.c
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File diff suppressed because it is too large Load Diff

66
drivers/net/wireless/rtl8192c/include/Hal8192CEHWImg.h
View File

@@ -1,66 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192CE_FW_IMG_H
#define __INC_HAL8192CE_FW_IMG_H
#include <basic_types.h>
/*Created on 2011/ 6/15, 5:45*/
#define TSMCImgArrayLength 14964 //v75 2011-06-15
extern u8 Rtl8192CEFwTSMCImgArray[TSMCImgArrayLength];
#define UMCACutImgArrayLength 14964 //v75 2011-06-15
extern u8 Rtl8192CEFwUMCACutImgArray[UMCACutImgArrayLength];
#define UMCBCutImgArrayLength 14946 //v75 2011-06-15
extern u8 Rtl8192CEFwUMCBCutImgArray[UMCBCutImgArrayLength];
#define PHY_REG_2TArrayLength 374
extern u32 Rtl8192CEPHY_REG_2TArray[PHY_REG_2TArrayLength];
#define PHY_REG_1TArrayLength 374
extern u32 Rtl8192CEPHY_REG_1TArray[PHY_REG_1TArrayLength];
#define PHY_ChangeTo_1T1RArrayLength 1
extern u32 Rtl8192CEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
#define PHY_ChangeTo_1T2RArrayLength 1
extern u32 Rtl8192CEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
#define PHY_ChangeTo_2T2RArrayLength 1
extern u32 Rtl8192CEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
#define PHY_REG_Array_PGLength 336
extern u32 Rtl8192CEPHY_REG_Array_PG[PHY_REG_Array_PGLength];
#define PHY_REG_Array_MPLength 4
extern u32 Rtl8192CEPHY_REG_Array_MP[PHY_REG_Array_MPLength];
#define RadioA_2TArrayLength 282
extern u32 Rtl8192CERadioA_2TArray[RadioA_2TArrayLength];
#define RadioB_2TArrayLength 78
extern u32 Rtl8192CERadioB_2TArray[RadioB_2TArrayLength];
#define RadioA_1TArrayLength 282
extern u32 Rtl8192CERadioA_1TArray[RadioA_1TArrayLength];
#define RadioB_1TArrayLength 1
extern u32 Rtl8192CERadioB_1TArray[RadioB_1TArrayLength];
#define RadioB_GM_ArrayLength 1
extern u32 Rtl8192CERadioB_GM_Array[RadioB_GM_ArrayLength];
#define MAC_2T_ArrayLength 172
extern u32 Rtl8192CEMAC_2T_Array[MAC_2T_ArrayLength];
#define MACPHY_Array_PGLength 1
extern u32 Rtl8192CEMACPHY_Array_PG[MACPHY_Array_PGLength];
#define AGCTAB_2TArrayLength 320
extern u32 Rtl8192CEAGCTAB_2TArray[AGCTAB_2TArrayLength];
#define AGCTAB_1TArrayLength 320
extern u32 Rtl8192CEAGCTAB_1TArray[AGCTAB_1TArrayLength];
#endif //__INC_HAL8192CE_FW_IMG_H

451
drivers/net/wireless/rtl8192c/include/Hal8192CPhyCfg.h
View File

@@ -1,451 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*****************************************************************************
* Module: __INC_HAL8192CPHYCFG_H
*
*
* Note:
*
*
* Export: Constants, macro, functions(API), global variables(None).
*
* Abbrev:
*
* History:
* Data Who Remark
* 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h.
* 2. Reorganize code architecture.
*
*****************************************************************************/
/* Check to see if the file has been included already. */
#ifndef __INC_HAL8192CPHYCFG_H
#define __INC_HAL8192CPHYCFG_H
/*--------------------------Define Parameters-------------------------------*/
#define LOOP_LIMIT 5
#define MAX_STALL_TIME 50 //us
#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80)
#define MAX_TXPWR_IDX_NMODE_92S 63
#define Reset_Cnt_Limit 3
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 9
#define HP_THERMAL_NUM 8
#ifdef CONFIG_PCI_HCI
#define MAX_AGGR_NUM 0x0A0A
#else
#define MAX_AGGR_NUM 0x0909
#endif
#ifdef CONFIG_PCI_HCI
#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \
{ \
u1Byte u1bTmp; \
u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \
u1bTmp |= BIT0; \
PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \
PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \
PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
delay_us(100); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
}
#endif
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
typedef enum _SwChnlCmdID{
CmdID_End,
CmdID_SetTxPowerLevel,
CmdID_BBRegWrite10,
CmdID_WritePortUlong,
CmdID_WritePortUshort,
CmdID_WritePortUchar,
CmdID_RF_WriteReg,
}SwChnlCmdID;
/* 1. Switch channel related */
typedef struct _SwChnlCmd{
SwChnlCmdID CmdID;
u32 Para1;
u32 Para2;
u32 msDelay;
}SwChnlCmd;
typedef enum _HW90_BLOCK{
HW90_BLOCK_MAC = 0,
HW90_BLOCK_PHY0 = 1,
HW90_BLOCK_PHY1 = 2,
HW90_BLOCK_RF = 3,
HW90_BLOCK_MAXIMUM = 4, // Never use this
}HW90_BLOCK_E, *PHW90_BLOCK_E;
typedef enum _RF90_RADIO_PATH{
RF90_PATH_A = 0, //Radio Path A
RF90_PATH_B = 1, //Radio Path B
RF90_PATH_C = 2, //Radio Path C
RF90_PATH_D = 3, //Radio Path D
//RF90_PATH_MAX //Max RF number 90 support
}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;
#define RF90_PATH_MAX 2
#define CHANNEL_MAX_NUMBER 14 // 14 is the max channel number
#define CHANNEL_GROUP_MAX 3 // ch1~3, ch4~9, ch10~14 total three groups
typedef enum _WIRELESS_MODE {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_A = 0x01,
WIRELESS_MODE_B = 0x02,
WIRELESS_MODE_G = 0x04,
WIRELESS_MODE_AUTO = 0x08,
WIRELESS_MODE_N_24G = 0x10,
WIRELESS_MODE_N_5G = 0x20
} WIRELESS_MODE;
typedef enum _BaseBand_Config_Type{
BaseBand_Config_PHY_REG = 0, //Radio Path A
BaseBand_Config_AGC_TAB = 1, //Radio Path B
}BaseBand_Config_Type, *PBaseBand_Config_Type;
typedef enum _PHY_Rate_Tx_Power_Offset_Area{
RA_OFFSET_LEGACY_OFDM1,
RA_OFFSET_LEGACY_OFDM2,
RA_OFFSET_HT_OFDM1,
RA_OFFSET_HT_OFDM2,
RA_OFFSET_HT_OFDM3,
RA_OFFSET_HT_OFDM4,
RA_OFFSET_HT_CCK,
}RA_OFFSET_AREA,*PRA_OFFSET_AREA;
/* BB/RF related */
typedef enum _RF_TYPE_8190P{
RF_TYPE_MIN, // 0
RF_8225=1, // 1 11b/g RF for verification only
RF_8256=2, // 2 11b/g/n
RF_8258=3, // 3 11a/b/g/n RF
RF_6052=4, // 4 11b/g/n RF
//RF_6052=5, // 4 11b/g/n RF
// TODO: We sholud remove this psudo PHY RF after we get new RF.
RF_PSEUDO_11N=5, // 5, It is a temporality RF.
}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E;
typedef enum _RATR_TABLE_MODE_8192C{
RATR_INX_WIRELESS_NGB = 0,
RATR_INX_WIRELESS_NG = 1,
RATR_INX_WIRELESS_NB = 2,
RATR_INX_WIRELESS_N = 3,
RATR_INX_WIRELESS_GB = 4,
RATR_INX_WIRELESS_G = 5,
RATR_INX_WIRELESS_B = 6,
RATR_INX_WIRELESS_MC = 7,
RATR_INX_WIRELESS_A = 8,
}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C;
typedef struct _BB_REGISTER_DEFINITION{
u32 rfintfs; // set software control:
// 0x870~0x877[8 bytes]
u32 rfintfi; // readback data:
// 0x8e0~0x8e7[8 bytes]
u32 rfintfo; // output data:
// 0x860~0x86f [16 bytes]
u32 rfintfe; // output enable:
// 0x860~0x86f [16 bytes]
u32 rf3wireOffset; // LSSI data:
// 0x840~0x84f [16 bytes]
u32 rfLSSI_Select; // BB Band Select:
// 0x878~0x87f [8 bytes]
u32 rfTxGainStage; // Tx gain stage:
// 0x80c~0x80f [4 bytes]
u32 rfHSSIPara1; // wire parameter control1 :
// 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes]
u32 rfHSSIPara2; // wire parameter control2 :
// 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes]
u32 rfSwitchControl; //Tx Rx antenna control :
// 0x858~0x85f [16 bytes]
u32 rfAGCControl1; //AGC parameter control1 :
// 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes]
u32 rfAGCControl2; //AGC parameter control2 :
// 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes]
u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix :
// 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes]
u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter :
// 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes]
u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix
// 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes]
u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type
// 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes]
u32 rfLSSIReadBack; //LSSI RF readback data SI mode
// 0x8a0~0x8af [16 bytes]
u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B
}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
#ifdef CONFIG_MP_INCLUDED
typedef enum _ANTENNA_PATH{
ANTENNA_NONE = 0x00,
ANTENNA_D ,
ANTENNA_C ,
ANTENNA_CD ,
ANTENNA_B ,
ANTENNA_BD ,
ANTENNA_BC ,
ANTENNA_BCD ,
ANTENNA_A ,
ANTENNA_AD ,
ANTENNA_AC ,
ANTENNA_ACD ,
ANTENNA_AB ,
ANTENNA_ABD ,
ANTENNA_ABC ,
ANTENNA_ABCD
} ANTENNA_PATH;
#endif
typedef struct _R_ANTENNA_SELECT_OFDM{
u32 r_tx_antenna:4;
u32 r_ant_l:4;
u32 r_ant_non_ht:4;
u32 r_ant_ht1:4;
u32 r_ant_ht2:4;
u32 r_ant_ht_s1:4;
u32 r_ant_non_ht_s1:4;
u32 OFDM_TXSC:2;
u32 Reserved:2;
}R_ANTENNA_SELECT_OFDM;
typedef struct _R_ANTENNA_SELECT_CCK{
u8 r_cckrx_enable_2:2;
u8 r_cckrx_enable:2;
u8 r_ccktx_enable:4;
}R_ANTENNA_SELECT_CCK;
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*--------------------------Exported Function prototype---------------------*/
//
// BB and RF register read/write
//
u32 rtl8192c_PHY_QueryBBReg( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask );
void rtl8192c_PHY_SetBBReg( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
u32 rtl8192c_PHY_QueryRFReg( IN PADAPTER Adapter,
IN RF90_RADIO_PATH_E eRFPath,
IN u32 RegAddr,
IN u32 BitMask );
void rtl8192c_PHY_SetRFReg( IN PADAPTER Adapter,
IN RF90_RADIO_PATH_E eRFPath,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
//
// Initialization related function
//
/* MAC/BB/RF HAL config */
int PHY_MACConfig8192C( IN PADAPTER Adapter );
int PHY_BBConfig8192C( IN PADAPTER Adapter );
int PHY_RFConfig8192C( IN PADAPTER Adapter );
/* RF config */
int rtl8192c_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter,
IN u8* pFileName,
IN RF90_RADIO_PATH_E eRFPath);
int rtl8192c_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter,
IN RF90_RADIO_PATH_E eRFPath);
/* BB/RF readback check for making sure init OK */
int rtl8192c_PHY_CheckBBAndRFOK( IN PADAPTER Adapter,
IN HW90_BLOCK_E CheckBlock,
IN RF90_RADIO_PATH_E eRFPath );
/* Read initi reg value for tx power setting. */
void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter );
//
// RF Power setting
//
//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter,
// IN RT_RF_POWER_STATE eRFPowerState);
//
// BB TX Power R/W
//
void PHY_GetTxPowerLevel8192C( IN PADAPTER Adapter,
OUT u32* powerlevel );
void PHY_SetTxPowerLevel8192C( IN PADAPTER Adapter,
IN u8 channel );
BOOLEAN PHY_UpdateTxPowerDbm8192C( IN PADAPTER Adapter,
IN int powerInDbm );
//
VOID
PHY_ScanOperationBackup8192C(IN PADAPTER Adapter,
IN u8 Operation );
//
// Switch bandwidth for 8192S
//
//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer );
void PHY_SetBWMode8192C( IN PADAPTER pAdapter,
IN HT_CHANNEL_WIDTH ChnlWidth,
IN unsigned char Offset );
//
// Set FW CMD IO for 8192S.
//
//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter,
// IN IO_TYPE IOType);
//
// Set A2 entry to fw for 8192S
//
extern void FillA2Entry8192C( IN PADAPTER Adapter,
IN u8 index,
IN u8* val);
//
// channel switch related funciton
//
//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer );
void PHY_SwChnl8192C( IN PADAPTER pAdapter,
IN u8 channel );
// Call after initialization
void PHY_SwChnlPhy8192C( IN PADAPTER pAdapter,
IN u8 channel );
void ChkFwCmdIoDone( IN PADAPTER Adapter);
#ifdef USE_WORKITEM
//extern void SetIOWorkItemCallback( IN PVOID pContext );
#else
//extern void SetIOTimerCallback( IN PRT_TIMER pTimer);
#endif
//
// BB/MAC/RF other monitor API
//
void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter,
IN BOOLEAN bEnableMonitorMode );
BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter,
IN u32 eRFPath );
//
// IQ calibrate
//
VOID rtl8192c_PHY_IQCalibrate( IN PADAPTER pAdapter , IN BOOLEAN bReCovery);
//
// LC calibrate
//
VOID rtl8192c_PHY_LCCalibrate(IN PADAPTER pAdapter);
//
// AP calibrate
//
VOID rtl8192c_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta);
VOID rtl8192c_PHY_DigitalPredistortion(IN PADAPTER pAdapter);
VOID rtl8192c_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain);
//
// Modify the value of the hw register when beacon interval be changed.
//
void
rtl8192c_PHY_SetBeaconHwReg( IN PADAPTER Adapter,
IN u16 BeaconInterval );
extern VOID
PHY_SwitchEphyParameter(
IN PADAPTER Adapter
);
extern VOID
PHY_EnableHostClkReq(
IN PADAPTER Adapter
);
BOOLEAN
SetAntennaConfig92C(
IN PADAPTER Adapter,
IN u8 DefaultAnt
);
/*--------------------------Exported Function prototype---------------------*/
#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192c_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192c_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data))
#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192c_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask))
#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192c_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data))
#define PHY_SetMacReg PHY_SetBBReg
#endif // __INC_HAL8192CPHYCFG_H

1052
drivers/net/wireless/rtl8192c/include/Hal8192CPhyReg.h
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92
drivers/net/wireless/rtl8192c/include/Hal8192CUHWImg.h
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@@ -1,92 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192CU_FW_IMG_H
#define __INC_HAL8192CU_FW_IMG_H
/*Created on 2011/ 6/15, 5:45*/
#ifdef CONFIG_BT_COEXISTENCE
#define TSMCImgArrayLength 14964 //Normal v75 2011-06-15
#else
#define TSMCImgArrayLength 15290 //P2P_PS v75 2011-06-15
#endif
extern u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength];
#define UMCACutImgArrayLength 14964 //v75 2011-06-15
extern u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength];
#define UMCBCutImgArrayLength 14946 //v75 2011-06-15
extern u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] ;
#define UMC8723ImgArrayLength 16288
extern u8 Rtl8192CUFwUMC8723ImgArray[UMC8723ImgArrayLength];
#define PHY_REG_2TArrayLength 374
extern u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength];
#define PHY_REG_1TArrayLength 374
extern u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength];
#define PHY_ChangeTo_1T1RArrayLength 1
extern u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
#define PHY_ChangeTo_1T2RArrayLength 1
extern u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
#define PHY_ChangeTo_2T2RArrayLength 1
extern u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
#define PHY_REG_Array_PGLength 336
extern u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength];
#define PHY_REG_Array_PG_mCardLength 336
extern u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength];
#define PHY_REG_Array_MPLength 4
extern u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength];
#define PHY_REG_1T_HPArrayLength 378
extern u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength];
#define PHY_REG_1T_mCardArrayLength 374
extern u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength];
#define PHY_REG_2T_mCardArrayLength 374
extern u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength];
#define PHY_REG_Array_PG_HPLength 336
extern u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength];
#define RadioA_2TArrayLength 282
extern u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength];
#define RadioB_2TArrayLength 78
extern u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength];
#define RadioA_1TArrayLength 282
extern u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength];
#define RadioB_1TArrayLength 1
extern u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength];
#define RadioA_1T_mCardArrayLength 282
extern u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength];
#define RadioB_1T_mCardArrayLength 1
extern u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength];
#define RadioA_1T_HPArrayLength 282
extern u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength];
#define RadioB_GM_ArrayLength 1
extern u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength];
#define MAC_2T_ArrayLength 172
extern u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength];
#define MACPHY_Array_PGLength 1
extern u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength];
#define AGCTAB_2TArrayLength 320
extern u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength];
#define AGCTAB_1TArrayLength 320
extern u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength];
#define AGCTAB_1T_HPArrayLength 320
extern u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength];
#endif //__INC_HAL8192CU_FW_IMG_H

66
drivers/net/wireless/rtl8192c/include/Hal8192DEHWImg.h
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@@ -1,66 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192DU_FW_IMG_H
#define __INC_HAL8192DU_FW_IMG_H
#include <basic_types.h>
/*Created on 2011/ 6/22, 2:27*/
#define ImgArrayLength 29642
extern u8 Rtl8192DEFwImgArray[ImgArrayLength];
#define MainArrayLength 1
extern u8 Rtl8192DEFwMainArray[MainArrayLength];
#define DataArrayLength 1
extern u8 Rtl8192DEFwDataArray[DataArrayLength];
#define PHY_REG_2TArrayLength 380
extern u32 Rtl8192DEPHY_REG_2TArray[PHY_REG_2TArrayLength];
#define PHY_REG_1TArrayLength 1
extern u32 Rtl8192DEPHY_REG_1TArray[PHY_REG_1TArrayLength];
#define PHY_REG_Array_PGLength 624
extern u32 Rtl8192DEPHY_REG_Array_PG[PHY_REG_Array_PGLength];
#define PHY_REG_Array_MPLength 10
extern u32 Rtl8192DEPHY_REG_Array_MP[PHY_REG_Array_MPLength];
#define RadioA_2TArrayLength 378
extern u32 Rtl8192DERadioA_2TArray[RadioA_2TArrayLength];
#define RadioB_2TArrayLength 384
extern u32 Rtl8192DERadioB_2TArray[RadioB_2TArrayLength];
#define RadioA_1TArrayLength 1
extern u32 Rtl8192DERadioA_1TArray[RadioA_1TArrayLength];
#define RadioB_1TArrayLength 1
extern u32 Rtl8192DERadioB_1TArray[RadioB_1TArrayLength];
#define RadioA_2T_intPAArrayLength 378
extern u32 Rtl8192DERadioA_2T_intPAArray[RadioA_2T_intPAArrayLength];
#define RadioB_2T_intPAArrayLength 384
extern u32 Rtl8192DERadioB_2T_intPAArray[RadioB_2T_intPAArrayLength];
#define MAC_2TArrayLength 160
extern u32 Rtl8192DEMAC_2TArray[MAC_2TArrayLength];
#define AGCTAB_ArrayLength 386
extern u32 Rtl8192DEAGCTAB_Array[AGCTAB_ArrayLength];
#define AGCTAB_5GArrayLength 194
extern u32 Rtl8192DEAGCTAB_5GArray[AGCTAB_5GArrayLength];
#define AGCTAB_2GArrayLength 194
extern u32 Rtl8192DEAGCTAB_2GArray[AGCTAB_2GArrayLength];
#define AGCTAB_2TArrayLength 1
extern u32 Rtl8192DEAGCTAB_2TArray[AGCTAB_2TArrayLength];
#define AGCTAB_1TArrayLength 1
extern u32 Rtl8192DEAGCTAB_1TArray[AGCTAB_1TArrayLength];
#endif //__INC_HAL8192CU_FW_IMG_H

54
drivers/net/wireless/rtl8192c/include/Hal8192DETestHWImg.h
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@@ -1,54 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192DETEST_FW_IMG_H
#define __INC_HAL8192DETEST_FW_IMG_H
#include <basic_types.h>
/*Created on 2010/ 5/27, 8: 6*/
#define Rtl8192DTestImgArrayLength 15054
extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength];
#define Rtl8192DTestMainArrayLength 1
extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength];
#define Rtl8192DTestDataArrayLength 1
extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength];
#define Rtl8192DTestPHY_REG_2TArrayLength 376
extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength];
#define Rtl8192DTestPHY_REG_1TArrayLength 1
extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength];
#define Rtl8192DTestPHY_REG_Array_PGLength 1
extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength];
#define Rtl8192DTestRadioA_2TArrayLength 340
extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength];
#define Rtl8192DTestRadioB_2TArrayLength 340
extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength];
#define Rtl8192DTestRadioA_1TArrayLength 1
extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength];
#define Rtl8192DTestRadioB_1TArrayLength 1
extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength];
#define Rtl8192DTestMAC_2TArrayLength 174
extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength];
#define Rtl8192DTestAGCTAB_5GArrayLength 514
extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength];
#define Rtl8192DTestAGCTAB_2GArrayLength 514
extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength];
#endif //__INC_HAL8192CU_FW_IMG_H

545
drivers/net/wireless/rtl8192c/include/Hal8192DPhyCfg.h
View File

@@ -1,545 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*****************************************************************************
*
* Module: __INC_HAL8192DPHYCFG_H
*
*
* Note:
*
*
* Export: Constants, macro, functions(API), global variables(None).
*
* Abbrev:
*
* History:
* Data Who Remark
* 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h.
* 2. Reorganize code architecture.
*
*****************************************************************************/
/* Check to see if the file has been included already. */
#ifndef __INC_HAL8192DPHYCFG_H
#define __INC_HAL8192DPHYCFG_H
/*--------------------------Define Parameters-------------------------------*/
#define LOOP_LIMIT 5
#define MAX_STALL_TIME 50 //us
#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80)
#define MAX_TXPWR_IDX_NMODE_92S 63
#define Reset_Cnt_Limit 3
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 10
#define IQK_BB_REG_NUM_test 6
#define index_mapping_NUM 13
#define Rx_index_mapping_NUM 15
#define AVG_THERMAL_NUM 8
#define IQK_Matrix_REG_NUM 8
#define IQK_Matrix_Settings_NUM 1+24+21
#ifdef CONFIG_PCI_HCI
#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \
{ \
u1Byte u1bTmp; \
u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \
u1bTmp |= BIT0; \
PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \
PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \
PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
delay_us(100); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
delay_us(10); \
PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
}
#endif
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
typedef enum _SwChnlCmdID{
CmdID_End,
CmdID_SetTxPowerLevel,
CmdID_BBRegWrite10,
CmdID_WritePortUlong,
CmdID_WritePortUshort,
CmdID_WritePortUchar,
CmdID_RF_WriteReg,
}SwChnlCmdID;
/* 1. Switch channel related */
typedef struct _SwChnlCmd{
SwChnlCmdID CmdID;
u32 Para1;
u32 Para2;
u32 msDelay;
}SwChnlCmd;
typedef enum _HW90_BLOCK{
HW90_BLOCK_MAC = 0,
HW90_BLOCK_PHY0 = 1,
HW90_BLOCK_PHY1 = 2,
HW90_BLOCK_RF = 3,
HW90_BLOCK_MAXIMUM = 4, // Never use this
}HW90_BLOCK_E, *PHW90_BLOCK_E;
//vivi added this for read parameter from header, 20100908
typedef enum _RF_CONTENT{
radioa_txt = 0x1000,
radiob_txt = 0x1001,
radioc_txt = 0x1002,
radiod_txt = 0x1003
} RF_CONTENT;
typedef enum _RF90_RADIO_PATH{
RF90_PATH_A = 0, //Radio Path A
RF90_PATH_B = 1, //Radio Path B
RF90_PATH_C = 2, //Radio Path C
RF90_PATH_D = 3, //Radio Path D
//RF90_PATH_MAX //Max RF number 90 support
}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;
#define RF90_PATH_MAX 2
typedef enum _WIRELESS_MODE {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_A = 0x01,
WIRELESS_MODE_B = 0x02,
WIRELESS_MODE_G = 0x04,
WIRELESS_MODE_AUTO = 0x08,
WIRELESS_MODE_N_24G = 0x10,
WIRELESS_MODE_N_5G = 0x20
} WIRELESS_MODE;
#if(TX_POWER_FOR_5G_BAND == 1)
#define CHANNEL_MAX_NUMBER 14+24+21 // 14 is the max channel number
#define CHANNEL_GROUP_MAX 3+9 // ch1~3, ch4~9, ch10~14 total three groups
#define MAX_PG_GROUP 13
#else
#define CHANNEL_MAX_NUMBER 14 // 14 is the max channel number
#define CHANNEL_GROUP_MAX 3 // ch1~3, ch4~9, ch10~14 total three groups
#define MAX_PG_GROUP 7
#endif
#define CHANNEL_GROUP_MAX_2G 3
#define CHANNEL_GROUP_IDX_5GL 3
#define CHANNEL_GROUP_IDX_5GM 6
#define CHANNEL_GROUP_IDX_5GH 9
#define CHANNEL_GROUP_MAX_5G 9
#define CHANNEL_MAX_NUMBER_2G 14
#if (RTL8192D_DUAL_MAC_MODE_SWITCH == 1)
typedef enum _BaseBand_Config_Type{
BaseBand_Config_PHY_REG = 0,
BaseBand_Config_AGC_TAB = 1,
BaseBand_Config_AGC_TAB_2G = 2,
BaseBand_Config_AGC_TAB_5G = 3,
}BaseBand_Config_Type, *PBaseBand_Config_Type;
#else
typedef enum _BaseBand_Config_Type{
BaseBand_Config_PHY_REG = 0, //Radio Path A
BaseBand_Config_AGC_TAB = 1, //Radio Path B
}BaseBand_Config_Type, *PBaseBand_Config_Type;
#endif
typedef enum _MACPHY_MODE_8192D{
DUALMAC_DUALPHY,
DUALMAC_SINGLEPHY,
SINGLEMAC_SINGLEPHY
}MACPHY_MODE_8192D,*PMACPHY_MODE_8192D;
typedef enum _BAND_TYPE{
BAND_ON_2_4G = 0,
BAND_ON_5G,
BAND_ON_BOTH,
BANDMAX
}BAND_TYPE,*PBAND_TYPE;
typedef enum _PHY_Rate_Tx_Power_Offset_Area{
RA_OFFSET_LEGACY_OFDM1,
RA_OFFSET_LEGACY_OFDM2,
RA_OFFSET_HT_OFDM1,
RA_OFFSET_HT_OFDM2,
RA_OFFSET_HT_OFDM3,
RA_OFFSET_HT_OFDM4,
RA_OFFSET_HT_CCK,
}RA_OFFSET_AREA,*PRA_OFFSET_AREA;
/* BB/RF related */
typedef enum _RF_TYPE_8190P{
RF_TYPE_MIN, // 0
RF_8225=1, // 1 11b/g RF for verification only
RF_8256=2, // 2 11b/g/n
RF_8258=3, // 3 11a/b/g/n RF
RF_6052=4, // 4 11b/g/n RF
//RF_6052=5, // 4 11b/g/n RF
// TODO: We sholud remove this psudo PHY RF after we get new RF.
RF_PSEUDO_11N=5, // 5, It is a temporality RF.
}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E;
typedef enum _RATR_TABLE_MODE_8192C{
RATR_INX_WIRELESS_NGB = 0,
RATR_INX_WIRELESS_NG = 1,
RATR_INX_WIRELESS_NB = 2,
RATR_INX_WIRELESS_N = 3,
RATR_INX_WIRELESS_GB = 4,
RATR_INX_WIRELESS_G = 5,
RATR_INX_WIRELESS_B = 6,
RATR_INX_WIRELESS_MC = 7,
RATR_INX_WIRELESS_A = 8,
}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C;
typedef struct _BB_REGISTER_DEFINITION{
u32 rfintfs; // set software control:
// 0x870~0x877[8 bytes]
u32 rfintfi; // readback data:
// 0x8e0~0x8e7[8 bytes]
u32 rfintfo; // output data:
// 0x860~0x86f [16 bytes]
u32 rfintfe; // output enable:
// 0x860~0x86f [16 bytes]
u32 rf3wireOffset; // LSSI data:
// 0x840~0x84f [16 bytes]
u32 rfLSSI_Select; // BB Band Select:
// 0x878~0x87f [8 bytes]
u32 rfTxGainStage; // Tx gain stage:
// 0x80c~0x80f [4 bytes]
u32 rfHSSIPara1; // wire parameter control1 :
// 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes]
u32 rfHSSIPara2; // wire parameter control2 :
// 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes]
u32 rfSwitchControl; //Tx Rx antenna control :
// 0x858~0x85f [16 bytes]
u32 rfAGCControl1; //AGC parameter control1 :
// 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes]
u32 rfAGCControl2; //AGC parameter control2 :
// 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes]
u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix :
// 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes]
u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter :
// 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes]
u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix
// 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes]
u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type
// 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes]
u32 rfLSSIReadBack; //LSSI RF readback data SI mode
// 0x8a0~0x8af [16 bytes]
u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B
}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
#ifdef CONFIG_MP_INCLUDED
typedef enum _ANTENNA_PATH{
ANTENNA_NONE = 0x00,
ANTENNA_D ,
ANTENNA_C ,
ANTENNA_CD ,
ANTENNA_B ,
ANTENNA_BD ,
ANTENNA_BC ,
ANTENNA_BCD ,
ANTENNA_A ,
ANTENNA_AD ,
ANTENNA_AC ,
ANTENNA_ACD ,
ANTENNA_AB ,
ANTENNA_ABD ,
ANTENNA_ABC ,
ANTENNA_ABCD
} ANTENNA_PATH;
#endif
typedef struct _R_ANTENNA_SELECT_OFDM{
u32 r_tx_antenna:4;
u32 r_ant_l:4;
u32 r_ant_non_ht:4;
u32 r_ant_ht1:4;
u32 r_ant_ht2:4;
u32 r_ant_ht_s1:4;
u32 r_ant_non_ht_s1:4;
u32 OFDM_TXSC:2;
u32 Reserved:2;
}R_ANTENNA_SELECT_OFDM;
typedef struct _R_ANTENNA_SELECT_CCK{
u8 r_cckrx_enable_2:2;
u8 r_cckrx_enable:2;
u8 r_ccktx_enable:4;
}R_ANTENNA_SELECT_CCK;
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
//Added for TX Power
//u8 GetRightChnlPlace(u8 chnl);
u8 rtl8192d_GetRightChnlPlaceforIQK(u8 chnl);
u8 rtl8192d_getChnlGroupfromArray(u8 chnl);
/*--------------------------Exported Function prototype---------------------*/
//
// BB and RF register read/write
//
void rtl8192d_PHY_SetBBReg1Byte( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
u32 rtl8192d_PHY_QueryBBReg( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask );
void rtl8192d_PHY_SetBBReg( IN PADAPTER Adapter,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
u32 rtl8192d_PHY_QueryRFReg( IN PADAPTER Adapter,
IN RF90_RADIO_PATH_E eRFPath,
IN u32 RegAddr,
IN u32 BitMask );
void rtl8192d_PHY_SetRFReg( IN PADAPTER Adapter,
IN RF90_RADIO_PATH_E eRFPath,
IN u32 RegAddr,
IN u32 BitMask,
IN u32 Data );
//
// Initialization related function
//
/* MAC/BB/RF HAL config */
extern int PHY_MACConfig8192D( IN PADAPTER Adapter );
extern int PHY_BBConfig8192D( IN PADAPTER Adapter );
extern int PHY_RFConfig8192D( IN PADAPTER Adapter );
/* RF config */
int rtl8192d_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter,
IN u8* pFileName,
IN RF90_RADIO_PATH_E eRFPath);
int rtl8192d_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter,
IN RF_CONTENT Content,
IN RF90_RADIO_PATH_E eRFPath);
/* BB/RF readback check for making sure init OK */
int rtl8192d_PHY_CheckBBAndRFOK( IN PADAPTER Adapter,
IN HW90_BLOCK_E CheckBlock,
IN RF90_RADIO_PATH_E eRFPath );
/* Read initi reg value for tx power setting. */
void rtl8192d_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter );
//
// RF Power setting
//
//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter,
// IN RT_RF_POWER_STATE eRFPowerState);
//
// BB TX Power R/W
//
void PHY_GetTxPowerLevel8192D( IN PADAPTER Adapter,
OUT u32* powerlevel );
void PHY_SetTxPowerLevel8192D( IN PADAPTER Adapter,
IN u8 channel );
BOOLEAN PHY_UpdateTxPowerDbm8192D( IN PADAPTER Adapter,
IN int powerInDbm );
//
VOID
PHY_ScanOperationBackup8192D(IN PADAPTER Adapter,
IN u8 Operation );
//
// Switch bandwidth for 8192S
//
//void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer );
void PHY_SetBWMode8192D( IN PADAPTER pAdapter,
IN HT_CHANNEL_WIDTH ChnlWidth,
IN unsigned char Offset );
//
// Set FW CMD IO for 8192S.
//
//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter,
// IN IO_TYPE IOType);
//
// Set A2 entry to fw for 8192S
//
extern void FillA2Entry8192C( IN PADAPTER Adapter,
IN u8 index,
IN u8* val);
//
// channel switch related funciton
//
//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer );
void PHY_SwChnl8192D( IN PADAPTER pAdapter,
IN u8 channel );
// Call after initialization
void PHY_SwChnlPhy8192D( IN PADAPTER pAdapter,
IN u8 channel );
extern void ChkFwCmdIoDone( IN PADAPTER Adapter);
#ifdef USE_WORKITEM
//extern void SetIOWorkItemCallback( IN PVOID pContext );
#else
//extern void SetIOTimerCallback( IN PRT_TIMER pTimer);
#endif
//
// BB/MAC/RF other monitor API
//
void PHY_SetMonitorMode8192D(IN PADAPTER pAdapter,
IN BOOLEAN bEnableMonitorMode );
BOOLEAN PHY_CheckIsLegalRfPath8192D(IN PADAPTER pAdapter,
IN u32 eRFPath );
//
// IQ calibrate
//
void rtl8192d_PHY_IQCalibrate( IN PADAPTER pAdapter);
//
// LC calibrate
//
void rtl8192d_PHY_LCCalibrate(IN PADAPTER pAdapter);
//
// AP calibrate
//
void rtl8192d_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta);
//
// Modify the value of the hw register when beacon interval be changed.
//
void
rtl8192d_PHY_SetBeaconHwReg( IN PADAPTER Adapter,
IN u16 BeaconInterval );
extern VOID
PHY_SwitchEphyParameter(
IN PADAPTER Adapter
);
extern VOID
PHY_EnableHostClkReq(
IN PADAPTER Adapter
);
BOOLEAN
SetAntennaConfig92C(
IN PADAPTER Adapter,
IN u8 DefaultAnt
);
VOID
PHY_UpdateBBRFConfiguration8192D(
IN PADAPTER Adapter,
IN BOOLEAN bisBandSwitch
);
VOID PHY_ReadMacPhyMode92D(
IN PADAPTER Adapter,
IN BOOLEAN AutoloadFail
);
VOID PHY_ConfigMacPhyMode92D(
IN PADAPTER Adapter
);
VOID PHY_ConfigMacPhyModeInfo92D(
IN PADAPTER Adapter
);
VOID PHY_ConfigMacCoexist_RFPage92D(
IN PADAPTER Adapter
);
VOID
rtl8192d_PHY_InitRxSetting(
IN PADAPTER Adapter
);
VOID
rtl8192d_PHY_ResetIQKResult(
IN PADAPTER Adapter
);
VOID
rtl8192d_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain);
VOID
HalChangeCCKStatus8192D(
IN PADAPTER Adapter,
IN BOOLEAN bCCKDisable
);
/*--------------------------Exported Function prototype---------------------*/
#define PHY_SetBBReg1Byte(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg1Byte((Adapter), (RegAddr), (BitMask), (Data))
#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192d_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data))
#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192d_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask))
#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192d_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data))
#define PHY_SetMacReg PHY_SetBBReg
#endif // __INC_HAL8192SPHYCFG_H

1059
drivers/net/wireless/rtl8192c/include/Hal8192DPhyReg.h
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File diff suppressed because it is too large Load Diff

66
drivers/net/wireless/rtl8192c/include/Hal8192DUHWImg.h
View File

@@ -1,66 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192DU_FW_IMG_H
#define __INC_HAL8192DU_FW_IMG_H
#include <basic_types.h>
/*Created on 2011/ 6/22, 2:27*/
#define ImgArrayLength 29642
extern u8 Rtl8192DUFwImgArray[ImgArrayLength];
#define MainArrayLength 1
extern u8 Rtl8192DUFwMainArray[MainArrayLength];
#define DataArrayLength 1
extern u8 Rtl8192DUFwDataArray[DataArrayLength];
#define PHY_REG_2TArrayLength 380
extern u32 Rtl8192DUPHY_REG_2TArray[PHY_REG_2TArrayLength];
#define PHY_REG_1TArrayLength 1
extern u32 Rtl8192DUPHY_REG_1TArray[PHY_REG_1TArrayLength];
#define PHY_REG_Array_PGLength 624
extern u32 Rtl8192DUPHY_REG_Array_PG[PHY_REG_Array_PGLength];
#define PHY_REG_Array_MPLength 10
extern u32 Rtl8192DUPHY_REG_Array_MP[PHY_REG_Array_MPLength];
#define RadioA_2TArrayLength 378
extern u32 Rtl8192DURadioA_2TArray[RadioA_2TArrayLength];
#define RadioB_2TArrayLength 384
extern u32 Rtl8192DURadioB_2TArray[RadioB_2TArrayLength];
#define RadioA_1TArrayLength 1
extern u32 Rtl8192DURadioA_1TArray[RadioA_1TArrayLength];
#define RadioB_1TArrayLength 1
extern u32 Rtl8192DURadioB_1TArray[RadioB_1TArrayLength];
#define RadioA_2T_intPAArrayLength 378
extern u32 Rtl8192DURadioA_2T_intPAArray[RadioA_2T_intPAArrayLength];
#define RadioB_2T_intPAArrayLength 384
extern u32 Rtl8192DURadioB_2T_intPAArray[RadioB_2T_intPAArrayLength];
#define MAC_2TArrayLength 160
extern u32 Rtl8192DUMAC_2TArray[MAC_2TArrayLength];
#define AGCTAB_ArrayLength 386
extern u32 Rtl8192DUAGCTAB_Array[AGCTAB_ArrayLength];
#define AGCTAB_5GArrayLength 194
extern u32 Rtl8192DUAGCTAB_5GArray[AGCTAB_5GArrayLength];
#define AGCTAB_2GArrayLength 194
extern u32 Rtl8192DUAGCTAB_2GArray[AGCTAB_2GArrayLength];
#define AGCTAB_2TArrayLength 1
extern u32 Rtl8192DUAGCTAB_2TArray[AGCTAB_2TArrayLength];
#define AGCTAB_1TArrayLength 1
extern u32 Rtl8192DUAGCTAB_1TArray[AGCTAB_1TArrayLength];
#endif //__INC_HAL8192CU_FW_IMG_H

54
drivers/net/wireless/rtl8192c/include/Hal8192DUTestHWImg.h
View File

@@ -1,54 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_HAL8192DUTEST_FW_IMG_H
#define __INC_HAL8192DUTEST_FW_IMG_H
#include <basic_types.h>
/*Created on 2010/ 5/27, 9:49*/
#define Rtl8192DTestImgArrayLength 15054
extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength];
#define Rtl8192DTestMainArrayLength 1
extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength];
#define Rtl8192DTestDataArrayLength 1
extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength];
#define Rtl8192DTestPHY_REG_2TArrayLength 376
extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength];
#define Rtl8192DTestPHY_REG_1TArrayLength 1
extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength];
#define Rtl8192DTestPHY_REG_Array_PGLength 1
extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength];
#define Rtl8192DTestRadioA_2TArrayLength 340
extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength];
#define Rtl8192DTestRadioB_2TArrayLength 340
extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength];
#define Rtl8192DTestRadioA_1TArrayLength 1
extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength];
#define Rtl8192DTestRadioB_1TArrayLength 1
extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength];
#define Rtl8192DTestMAC_2TArrayLength 174
extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength];
#define Rtl8192DTestAGCTAB_5GArrayLength 514
extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength];
#define Rtl8192DTestAGCTAB_2GArrayLength 514
extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength];
#endif //__INC_HAL8192CU_FW_IMG_H

216
drivers/net/wireless/rtl8192c/include/autoconf.h
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@@ -1,216 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*
* Public General Config
*/
#define AUTOCONF_INCLUDED
#define RTL871X_MODULE_NAME "92CU"
#define DRV_NAME "rtl8192cu"
#define CONFIG_USB_HCI 1
#define CONFIG_RTL8192C 1
#define PLATFORM_LINUX 1
/*
* Internal General Config
*/
//#define CONFIG_PWRCTRL
//#define CONFIG_H2CLBK
#define CONFIG_EMBEDDED_FWIMG 1
#define CONFIG_R871X_TEST 1
#define CONFIG_80211N_HT 1
#define CONFIG_RECV_REORDERING_CTRL 1
//#define CONFIG_TCP_CSUM_OFFLOAD_RX 1
//#define CONFIG_DRVEXT_MODULE 1
#ifndef CONFIG_MP_INCLUDED
//#define CONFIG_IPS 1 /* modified by gwl, we'd better comment out the IPS function if we use lower speed IO interface. */
#ifdef CONFIG_IPS
//#define CONFIG_IPS_LEVEL_2 1 //enable this to set default IPS mode to IPS_LEVEL_2 (added by gwl)
#endif
#define SUPPORT_HW_RFOFF_DETECTED 1
#define CONFIG_LPS 1
//#define CONFIG_BT_COEXIST 1
//befor link
#define CONFIG_ANTENNA_DIVERSITY
//after link
#ifdef CONFIG_ANTENNA_DIVERSITY
#define CONFIG_SW_ANTENNA_DIVERSITY
//#define CONFIG_HW_ANTENNA_DIVERSITY
#endif
#else
#define CONFIG_MP_IWPRIV_SUPPORT 1
#endif
#define CONFIG_AP_MODE 1
#define CONFIG_NATIVEAP_MLME 1
// Added by Albert 20110314
//#define CONFIG_P2P 1
// Added by Kurt 20110511
//#define CONFIG_TDLS 1
#ifdef CONFIG_AP_MODE
#ifndef CONFIG_NATIVEAP_MLME
#define CONFIG_HOSTAPD_MLME 1
#endif
#define CONFIG_FIND_BEST_CHANNEL 1//added by gwl
#endif
#define CONFIG_SKB_COPY 1//for amsdu
#define CONFIG_LED
#ifdef CONFIG_LED
#define CONFIG_SW_LED
#endif //CONFIG_LED
#define CONFIG_HANDLE_JOINBSS_ON_ASSOC_RSP
#define USB_INTERFERENCE_ISSUE // this should be checked in all usb interface
#define CONFIG_GLOBAL_UI_PID
#define CONFIG_LAYER2_ROAMING
#define CONFIG_LAYER2_ROAMING_RESUME
//#define CONFIG_ADAPTOR_INFO_CACHING_FILE // now just applied on 8192cu only, should make it general...
//#define CONFIG_RESUME_IN_WORKQUEUE
//#define CONFIG_SET_SCAN_DENY_TIMER
#define CONFIG_LONG_DELAY_ISSUE
#define CONFIG_NEW_SIGNAL_STAT_PROCESS
/*
* Interface Related Config
*/
//#define CONFIG_USB_INTERRUPT_IN_PIPE 1
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#define CONFIG_USB_TX_AGGREGATION 1
#define CONFIG_USB_RX_AGGREGATION 1
#endif
#define CONFIG_PREALLOC_RECV_SKB 1
#define CONFIG_REDUCE_USB_TX_INT 1
//#define CONFIG_EASY_REPLACEMENT 1
/*
* CONFIG_USE_USB_BUFFER_ALLOC_XX uses Linux USB Buffer alloc API and is for Linux platform only now!
*/
//#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1 // For TX path
//#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1 // For RX path
#define CONFIG_USB_VENDOR_REQ_PREALLOC 1
//#define CONFIG_USB_SUPPORT_ASYNC_VDN_REQ 1
/*
* HAL Related Config
*/
#define RTL8192C_RX_PACKET_NO_INCLUDE_CRC 1
#define SUPPORTED_BLOCK_IO
#define RTL8192CU_FW_DOWNLOAD_ENABLE 1
#define CONFIG_ONLY_ONE_OUT_EP_TO_LOW 0
#define CONFIG_OUT_EP_WIFI_MODE 0
#define ENABLE_USB_DROP_INCORRECT_OUT 0
#define RTL8192CU_ASIC_VERIFICATION 0 // For ASIC verification.
#define RTL8192CU_ADHOC_WORKAROUND_SETTING 1
#define DISABLE_BB_RF 0
#define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0
#ifdef CONFIG_MP_INCLUDED
#define MP_DRIVER 1
#undef CONFIG_USB_TX_AGGREGATION
#undef CONFIG_USB_RX_AGGREGATION
#else
#define MP_DRIVER 0
#endif
/*
* Platform Related Config
*/
#ifdef CONFIG_PLATFORM_MN10300
#define CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
#if defined (CONFIG_SW_ANTENNA_DIVERSITY)
#undef CONFIG_SW_ANTENNA_DIVERSITY
#define CONFIG_HW_ANTENNA_DIVERSITY
#endif
#endif
#ifndef CONFIG_WISTRON_PLATFORM
//#define CONFIG_DYNAMIC_ALLOCIATE_VENDOR_CMD 1
#define SILENT_RESET_FOR_SPECIFIC_PLATFOM 1
#endif
#ifdef CONFIG_PLATFORM_TI_DM365
#define CONFIG_SPECIFIC_URB_NUM
#endif
/*
* Debug Related Config
*/
//#define CONFIG_DEBUG_RTL871X
#define DBG 0
#define CONFIG_DEBUG_RTL819X
#define CONFIG_PROC_DEBUG 1
//#define DBG_IO
//#define DBG_DELAY_OS
//#define DBG_MEM_ALLOC
//#define DBG_IOCTL
//#define DBG_TX
//#define DBG_XMIT_BUF
//#define DBG_TX_DROP_FRAME
//#define DBG_RX_DROP_FRAME
//#define DBG_RX_SEQ
//#define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE

276
drivers/net/wireless/rtl8192c/include/basic_types.h
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@@ -1,276 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __BASIC_TYPES_H__
#define __BASIC_TYPES_H__
#include <drv_conf.h>
#define SUCCESS 0
#define FAIL (-1)
#ifndef TRUE
#define _TRUE 1
#else
#define _TRUE TRUE
#endif
#ifndef FALSE
#define _FALSE 0
#else
#define _FALSE FALSE
#endif
#ifdef PLATFORM_WINDOWS
typedef signed char s8;
typedef unsigned char u8;
typedef signed short s16;
typedef unsigned short u16;
typedef signed long s32;
typedef unsigned long u32;
typedef unsigned int uint;
typedef signed int sint;
typedef signed long long s64;
typedef unsigned long long u64;
#ifdef NDIS50_MINIPORT
#define NDIS_MAJOR_VERSION 5
#define NDIS_MINOR_VERSION 0
#endif
#ifdef NDIS51_MINIPORT
#define NDIS_MAJOR_VERSION 5
#define NDIS_MINOR_VERSION 1
#endif
typedef NDIS_PROC proc_t;
typedef LONG atomic_t;
#endif
#ifdef PLATFORM_LINUX
#include <linux/types.h>
#define IN
#define OUT
#define VOID void
#define NDIS_OID uint
#define NDIS_STATUS uint
typedef signed int sint;
#ifndef PVOID
typedef void * PVOID;
//#define PVOID (void *)
#endif
#define UCHAR u8
#define USHORT u16
#define UINT u32
#define ULONG u32
typedef void (*proc_t)(void*);
typedef __kernel_size_t SIZE_T;
typedef __kernel_ssize_t SSIZE_T;
#define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field)
#endif
#define MEM_ALIGNMENT_OFFSET (sizeof (SIZE_T))
#define MEM_ALIGNMENT_PADDING (sizeof(SIZE_T) - 1)
#define SIZE_PTR SIZE_T
#define SSIZE_PTR SSIZE_T
//port from fw by thomas
// TODO: Belows are Sync from SD7-Driver. It is necessary to check correctness
/*
* Call endian free function when
* 1. Read/write packet content.
* 2. Before write integer to IO.
* 3. After read integer from IO.
*/
//
// Byte Swapping routine.
//
#define EF1Byte
#define EF2Byte le16_to_cpu
#define EF4Byte le32_to_cpu
//
// Read LE format data from memory
//
#define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr)))
#define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr)))
#define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr)))
//
// Write LE data to memory
//
#define WriteEF1Byte(_ptr, _val) (*((u8 *)(_ptr)))=EF1Byte(_val)
#define WriteEF2Byte(_ptr, _val) (*((u16 *)(_ptr)))=EF2Byte(_val)
#define WriteEF4Byte(_ptr, _val) (*((u32 *)(_ptr)))=EF4Byte(_val)
//
// Example:
// BIT_LEN_MASK_32(0) => 0x00000000
// BIT_LEN_MASK_32(1) => 0x00000001
// BIT_LEN_MASK_32(2) => 0x00000003
// BIT_LEN_MASK_32(32) => 0xFFFFFFFF
//
#define BIT_LEN_MASK_32(__BitLen) \
(0xFFFFFFFF >> (32 - (__BitLen)))
//
// Example:
// BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003
// BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000
//
#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) \
(BIT_LEN_MASK_32(__BitLen) << (__BitOffset))
//
// Description:
// Return 4-byte value in host byte ordering from
// 4-byte pointer in litten-endian system.
//
#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
(EF4Byte(*((u32 *)(__pStart))))
//
// Description:
// Translate subfield (continuous bits in little-endian) of 4-byte value in litten byte to
// 4-byte value in host byte ordering.
//
#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
( \
( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \
& \
BIT_LEN_MASK_32(__BitLen) \
)
//
// Description:
// Mask subfield (continuous bits in little-endian) of 4-byte value in litten byte oredering
// and return the result in 4-byte value in host byte ordering.
//
#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
( \
LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
& \
( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \
)
//
// Description:
// Set subfield of little-endian 4-byte value to specified value.
//
#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \
*((u32 *)(__pStart)) = \
EF4Byte( \
LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
| \
( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \
);
#define BIT_LEN_MASK_16(__BitLen) \
(0xFFFF >> (16 - (__BitLen)))
#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \
(BIT_LEN_MASK_16(__BitLen) << (__BitOffset))
#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
(EF2Byte(*((u16 *)(__pStart))))
#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
( \
( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \
& \
BIT_LEN_MASK_16(__BitLen) \
)
#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
( \
LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
& \
( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \
)
#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \
*((u16 *)(__pStart)) = \
EF2Byte( \
LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
| \
( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \
);
#define BIT_LEN_MASK_8(__BitLen) \
(0xFF >> (8 - (__BitLen)))
#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \
(BIT_LEN_MASK_8(__BitLen) << (__BitOffset))
#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
(EF1Byte(*((u8 *)(__pStart))))
#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
( \
( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \
& \
BIT_LEN_MASK_8(__BitLen) \
)
#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
( \
LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
& \
( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \
)
#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \
*((u8 *)(__pStart)) = \
EF1Byte( \
LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
| \
( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \
);
// Get the N-bytes aligment offset from the current length
#define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment))
typedef unsigned char BOOLEAN,*PBOOLEAN;
#endif //__BASIC_TYPES_H__

87
drivers/net/wireless/rtl8192c/include/byteorder/big_endian.h
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@@ -1,87 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H
#define _LINUX_BYTEORDER_BIG_ENDIAN_H
#ifndef __BIG_ENDIAN
#define __BIG_ENDIAN 4321
#endif
#ifndef __BIG_ENDIAN_BITFIELD
#define __BIG_ENDIAN_BITFIELD
#endif
#include <byteorder/swab.h>
#define __constant_htonl(x) ((__u32)(x))
#define __constant_ntohl(x) ((__u32)(x))
#define __constant_htons(x) ((__u16)(x))
#define __constant_ntohs(x) ((__u16)(x))
#define __constant_cpu_to_le64(x) ___constant_swab64((x))
#define __constant_le64_to_cpu(x) ___constant_swab64((x))
#define __constant_cpu_to_le32(x) ___constant_swab32((x))
#define __constant_le32_to_cpu(x) ___constant_swab32((x))
#define __constant_cpu_to_le16(x) ___constant_swab16((x))
#define __constant_le16_to_cpu(x) ___constant_swab16((x))
#define __constant_cpu_to_be64(x) ((__u64)(x))
#define __constant_be64_to_cpu(x) ((__u64)(x))
#define __constant_cpu_to_be32(x) ((__u32)(x))
#define __constant_be32_to_cpu(x) ((__u32)(x))
#define __constant_cpu_to_be16(x) ((__u16)(x))
#define __constant_be16_to_cpu(x) ((__u16)(x))
#define __cpu_to_le64(x) __swab64((x))
#define __le64_to_cpu(x) __swab64((x))
#define __cpu_to_le32(x) __swab32((x))
#define __le32_to_cpu(x) __swab32((x))
#define __cpu_to_le16(x) __swab16((x))
#define __le16_to_cpu(x) __swab16((x))
#define __cpu_to_be64(x) ((__u64)(x))
#define __be64_to_cpu(x) ((__u64)(x))
#define __cpu_to_be32(x) ((__u32)(x))
#define __be32_to_cpu(x) ((__u32)(x))
#define __cpu_to_be16(x) ((__u16)(x))
#define __be16_to_cpu(x) ((__u16)(x))
#define __cpu_to_le64p(x) __swab64p((x))
#define __le64_to_cpup(x) __swab64p((x))
#define __cpu_to_le32p(x) __swab32p((x))
#define __le32_to_cpup(x) __swab32p((x))
#define __cpu_to_le16p(x) __swab16p((x))
#define __le16_to_cpup(x) __swab16p((x))
#define __cpu_to_be64p(x) (*(__u64*)(x))
#define __be64_to_cpup(x) (*(__u64*)(x))
#define __cpu_to_be32p(x) (*(__u32*)(x))
#define __be32_to_cpup(x) (*(__u32*)(x))
#define __cpu_to_be16p(x) (*(__u16*)(x))
#define __be16_to_cpup(x) (*(__u16*)(x))
#define __cpu_to_le64s(x) __swab64s((x))
#define __le64_to_cpus(x) __swab64s((x))
#define __cpu_to_le32s(x) __swab32s((x))
#define __le32_to_cpus(x) __swab32s((x))
#define __cpu_to_le16s(x) __swab16s((x))
#define __le16_to_cpus(x) __swab16s((x))
#define __cpu_to_be64s(x) do {} while (0)
#define __be64_to_cpus(x) do {} while (0)
#define __cpu_to_be32s(x) do {} while (0)
#define __be32_to_cpus(x) do {} while (0)
#define __cpu_to_be16s(x) do {} while (0)
#define __be16_to_cpus(x) do {} while (0)
#include <byteorder/generic.h>
#endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */

209
drivers/net/wireless/rtl8192c/include/byteorder/generic.h
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@@ -1,209 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_GENERIC_H
#define _LINUX_BYTEORDER_GENERIC_H
/*
* linux/byteorder_generic.h
* Generic Byte-reordering support
*
* Francois-Rene Rideau <fare@tunes.org> 19970707
* gathered all the good ideas from all asm-foo/byteorder.h into one file,
* cleaned them up.
* I hope it is compliant with non-GCC compilers.
* I decided to put __BYTEORDER_HAS_U64__ in byteorder.h,
* because I wasn't sure it would be ok to put it in types.h
* Upgraded it to 2.1.43
* Francois-Rene Rideau <fare@tunes.org> 19971012
* Upgraded it to 2.1.57
* to please Linus T., replaced huge #ifdef's between little/big endian
* by nestedly #include'd files.
* Francois-Rene Rideau <fare@tunes.org> 19971205
* Made it to 2.1.71; now a facelift:
* Put files under include/linux/byteorder/
* Split swab from generic support.
*
* TODO:
* = Regular kernel maintainers could also replace all these manual
* byteswap macros that remain, disseminated among drivers,
* after some grep or the sources...
* = Linus might want to rename all these macros and files to fit his taste,
* to fit his personal naming scheme.
* = it seems that a few drivers would also appreciate
* nybble swapping support...
* = every architecture could add their byteswap macro in asm/byteorder.h
* see how some architectures already do (i386, alpha, ppc, etc)
* = cpu_to_beXX and beXX_to_cpu might some day need to be well
* distinguished throughout the kernel. This is not the case currently,
* since little endian, big endian, and pdp endian machines needn't it.
* But this might be the case for, say, a port of Linux to 20/21 bit
* architectures (and F21 Linux addict around?).
*/
/*
* The following macros are to be defined by <asm/byteorder.h>:
*
* Conversion of long and short int between network and host format
* ntohl(__u32 x)
* ntohs(__u16 x)
* htonl(__u32 x)
* htons(__u16 x)
* It seems that some programs (which? where? or perhaps a standard? POSIX?)
* might like the above to be functions, not macros (why?).
* if that's true, then detect them, and take measures.
* Anyway, the measure is: define only ___ntohl as a macro instead,
* and in a separate file, have
* unsigned long inline ntohl(x){return ___ntohl(x);}
*
* The same for constant arguments
* __constant_ntohl(__u32 x)
* __constant_ntohs(__u16 x)
* __constant_htonl(__u32 x)
* __constant_htons(__u16 x)
*
* Conversion of XX-bit integers (16- 32- or 64-)
* between native CPU format and little/big endian format
* 64-bit stuff only defined for proper architectures
* cpu_to_[bl]eXX(__uXX x)
* [bl]eXX_to_cpu(__uXX x)
*
* The same, but takes a pointer to the value to convert
* cpu_to_[bl]eXXp(__uXX x)
* [bl]eXX_to_cpup(__uXX x)
*
* The same, but change in situ
* cpu_to_[bl]eXXs(__uXX x)
* [bl]eXX_to_cpus(__uXX x)
*
* See asm-foo/byteorder.h for examples of how to provide
* architecture-optimized versions
*
*/
#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL)
/*
* inside the kernel, we can use nicknames;
* outside of it, we must avoid POSIX namespace pollution...
*/
#define cpu_to_le64 __cpu_to_le64
#define le64_to_cpu __le64_to_cpu
#define cpu_to_le32 __cpu_to_le32
#define le32_to_cpu __le32_to_cpu
#define cpu_to_le16 __cpu_to_le16
#define le16_to_cpu __le16_to_cpu
#define cpu_to_be64 __cpu_to_be64
#define be64_to_cpu __be64_to_cpu
#define cpu_to_be32 __cpu_to_be32
#define be32_to_cpu __be32_to_cpu
#define cpu_to_be16 __cpu_to_be16
#define be16_to_cpu __be16_to_cpu
#define cpu_to_le64p __cpu_to_le64p
#define le64_to_cpup __le64_to_cpup
#define cpu_to_le32p __cpu_to_le32p
#define le32_to_cpup __le32_to_cpup
#define cpu_to_le16p __cpu_to_le16p
#define le16_to_cpup __le16_to_cpup
#define cpu_to_be64p __cpu_to_be64p
#define be64_to_cpup __be64_to_cpup
#define cpu_to_be32p __cpu_to_be32p
#define be32_to_cpup __be32_to_cpup
#define cpu_to_be16p __cpu_to_be16p
#define be16_to_cpup __be16_to_cpup
#define cpu_to_le64s __cpu_to_le64s
#define le64_to_cpus __le64_to_cpus
#define cpu_to_le32s __cpu_to_le32s
#define le32_to_cpus __le32_to_cpus
#define cpu_to_le16s __cpu_to_le16s
#define le16_to_cpus __le16_to_cpus
#define cpu_to_be64s __cpu_to_be64s
#define be64_to_cpus __be64_to_cpus
#define cpu_to_be32s __cpu_to_be32s
#define be32_to_cpus __be32_to_cpus
#define cpu_to_be16s __cpu_to_be16s
#define be16_to_cpus __be16_to_cpus
#endif
/*
* Handle ntohl and suches. These have various compatibility
* issues - like we want to give the prototype even though we
* also have a macro for them in case some strange program
* wants to take the address of the thing or something..
*
* Note that these used to return a "long" in libc5, even though
* long is often 64-bit these days.. Thus the casts.
*
* They have to be macros in order to do the constant folding
* correctly - if the argument passed into a inline function
* it is no longer constant according to gcc..
*/
#undef ntohl
#undef ntohs
#undef htonl
#undef htons
/*
* Do the prototypes. Somebody might want to take the
* address or some such sick thing..
*/
#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2)
extern __u32 ntohl(__u32);
extern __u32 htonl(__u32);
#else
extern unsigned long int ntohl(unsigned long int);
extern unsigned long int htonl(unsigned long int);
#endif
extern unsigned short int ntohs(unsigned short int);
extern unsigned short int htons(unsigned short int);
#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) || defined(PLATFORM_MPIXEL)
#define ___htonl(x) __cpu_to_be32(x)
#define ___htons(x) __cpu_to_be16(x)
#define ___ntohl(x) __be32_to_cpu(x)
#define ___ntohs(x) __be16_to_cpu(x)
#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2)
#define htonl(x) ___htonl(x)
#define ntohl(x) ___ntohl(x)
#else
#define htonl(x) ((unsigned long)___htonl(x))
#define ntohl(x) ((unsigned long)___ntohl(x))
#endif
#define htons(x) ___htons(x)
#define ntohs(x) ___ntohs(x)
#endif /* OPTIMIZE */
#if defined (PLATFORM_WINDOWS)
#define htonl(x) __cpu_to_be32(x)
#define ntohl(x) __be32_to_cpu(x)
#define htons(x) __cpu_to_be16(x)
#define ntohs(x) __be16_to_cpu(x)
#endif
#endif /* _LINUX_BYTEORDER_GENERIC_H */

89
drivers/net/wireless/rtl8192c/include/byteorder/little_endian.h
View File

@@ -1,89 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H
#ifndef __LITTLE_ENDIAN
#define __LITTLE_ENDIAN 1234
#endif
#ifndef __LITTLE_ENDIAN_BITFIELD
#define __LITTLE_ENDIAN_BITFIELD
#endif
#include <byteorder/swab.h>
#ifndef __constant_htonl
#define __constant_htonl(x) ___constant_swab32((x))
#define __constant_ntohl(x) ___constant_swab32((x))
#define __constant_htons(x) ___constant_swab16((x))
#define __constant_ntohs(x) ___constant_swab16((x))
#define __constant_cpu_to_le64(x) ((__u64)(x))
#define __constant_le64_to_cpu(x) ((__u64)(x))
#define __constant_cpu_to_le32(x) ((__u32)(x))
#define __constant_le32_to_cpu(x) ((__u32)(x))
#define __constant_cpu_to_le16(x) ((__u16)(x))
#define __constant_le16_to_cpu(x) ((__u16)(x))
#define __constant_cpu_to_be64(x) ___constant_swab64((x))
#define __constant_be64_to_cpu(x) ___constant_swab64((x))
#define __constant_cpu_to_be32(x) ___constant_swab32((x))
#define __constant_be32_to_cpu(x) ___constant_swab32((x))
#define __constant_cpu_to_be16(x) ___constant_swab16((x))
#define __constant_be16_to_cpu(x) ___constant_swab16((x))
#define __cpu_to_le64(x) ((__u64)(x))
#define __le64_to_cpu(x) ((__u64)(x))
#define __cpu_to_le32(x) ((__u32)(x))
#define __le32_to_cpu(x) ((__u32)(x))
#define __cpu_to_le16(x) ((__u16)(x))
#define __le16_to_cpu(x) ((__u16)(x))
#define __cpu_to_be64(x) __swab64((x))
#define __be64_to_cpu(x) __swab64((x))
#define __cpu_to_be32(x) __swab32((x))
#define __be32_to_cpu(x) __swab32((x))
#define __cpu_to_be16(x) __swab16((x))
#define __be16_to_cpu(x) __swab16((x))
#define __cpu_to_le64p(x) (*(__u64*)(x))
#define __le64_to_cpup(x) (*(__u64*)(x))
#define __cpu_to_le32p(x) (*(__u32*)(x))
#define __le32_to_cpup(x) (*(__u32*)(x))
#define __cpu_to_le16p(x) (*(__u16*)(x))
#define __le16_to_cpup(x) (*(__u16*)(x))
#define __cpu_to_be64p(x) __swab64p((x))
#define __be64_to_cpup(x) __swab64p((x))
#define __cpu_to_be32p(x) __swab32p((x))
#define __be32_to_cpup(x) __swab32p((x))
#define __cpu_to_be16p(x) __swab16p((x))
#define __be16_to_cpup(x) __swab16p((x))
#define __cpu_to_le64s(x) do {} while (0)
#define __le64_to_cpus(x) do {} while (0)
#define __cpu_to_le32s(x) do {} while (0)
#define __le32_to_cpus(x) do {} while (0)
#define __cpu_to_le16s(x) do {} while (0)
#define __le16_to_cpus(x) do {} while (0)
#define __cpu_to_be64s(x) __swab64s((x))
#define __be64_to_cpus(x) __swab64s((x))
#define __cpu_to_be32s(x) __swab32s((x))
#define __be32_to_cpus(x) __swab32s((x))
#define __cpu_to_be16s(x) __swab16s((x))
#define __be16_to_cpus(x) __swab16s((x))
#endif // __constant_htonl
#include <byteorder/generic.h>
#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */

133
drivers/net/wireless/rtl8192c/include/byteorder/swab.h
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@@ -1,133 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_SWAB_H
#define _LINUX_BYTEORDER_SWAB_H
#if !defined(CONFIG_PLATFORM_MSTAR_TITANIA12)
#ifndef __u16
typedef unsigned short __u16;
#endif
#ifndef __u32
typedef unsigned int __u32;
#endif
#ifndef __u8
typedef unsigned char __u8;
#endif
#ifndef __u64
typedef unsigned long long __u64;
#endif
__inline static __u16 ___swab16(__u16 x)
{
__u16 __x = x;
return
((__u16)(
(((__u16)(__x) & (__u16)0x00ffU) << 8) |
(((__u16)(__x) & (__u16)0xff00U) >> 8) ));
}
__inline static __u32 ___swab32(__u32 x)
{
__u32 __x = (x);
return ((__u32)(
(((__u32)(__x) & (__u32)0x000000ffUL) << 24) |
(((__u32)(__x) & (__u32)0x0000ff00UL) << 8) |
(((__u32)(__x) & (__u32)0x00ff0000UL) >> 8) |
(((__u32)(__x) & (__u32)0xff000000UL) >> 24) ));
}
__inline static __u64 ___swab64(__u64 x)
{
__u64 __x = (x);
return
((__u64)( \
(__u64)(((__u64)(__x) & (__u64)0x00000000000000ffULL) << 56) | \
(__u64)(((__u64)(__x) & (__u64)0x000000000000ff00ULL) << 40) | \
(__u64)(((__u64)(__x) & (__u64)0x0000000000ff0000ULL) << 24) | \
(__u64)(((__u64)(__x) & (__u64)0x00000000ff000000ULL) << 8) | \
(__u64)(((__u64)(__x) & (__u64)0x000000ff00000000ULL) >> 8) | \
(__u64)(((__u64)(__x) & (__u64)0x0000ff0000000000ULL) >> 24) | \
(__u64)(((__u64)(__x) & (__u64)0x00ff000000000000ULL) >> 40) | \
(__u64)(((__u64)(__x) & (__u64)0xff00000000000000ULL) >> 56) )); \
}
#endif // CONFIG_PLATFORM_MSTAR_TITANIA12
#ifndef __arch__swab16
__inline static __u16 __arch__swab16(__u16 x)
{
return ___swab16(x);
}
#endif
#ifndef __arch__swab32
__inline static __u32 __arch__swab32(__u32 x)
{
__u32 __tmp = (x) ;
return ___swab32(__tmp);
}
#endif
#ifndef __arch__swab64
__inline static __u64 __arch__swab64(__u64 x)
{
__u64 __tmp = (x) ;
return ___swab64(__tmp);
}
#endif
#ifndef __swab16
#define __swab16(x) __fswab16(x)
#define __swab32(x) __fswab32(x)
#define __swab64(x) __fswab64(x)
#endif // __swab16
__inline static const __u16 __fswab16(__u16 x)
{
return __arch__swab16(x);
}
__inline static const __u32 __fswab32(__u32 x)
{
return __arch__swab32(x);
}
#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS)
#define swab16 __swab16
#define swab32 __swab32
#define swab64 __swab64
#define swab16p __swab16p
#define swab32p __swab32p
#define swab64p __swab64p
#define swab16s __swab16s
#define swab32s __swab32s
#define swab64s __swab64s
#endif
#endif /* _LINUX_BYTEORDER_SWAB_H */

157
drivers/net/wireless/rtl8192c/include/byteorder/swabb.h
View File

@@ -1,157 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_BYTEORDER_SWABB_H
#define _LINUX_BYTEORDER_SWABB_H
/*
* linux/byteorder/swabb.h
* SWAp Bytes Bizarrely
* swaHHXX[ps]?(foo)
*
* Support for obNUXIous pdp-endian and other bizarre architectures.
* Will Linux ever run on such ancient beasts? if not, this file
* will be but a programming pearl. Still, it's a reminder that we
* shouldn't be making too many assumptions when trying to be portable.
*
*/
/*
* Meaning of the names I chose (vaxlinux people feel free to correct them):
* swahw32 swap 16-bit half-words in a 32-bit word
* swahb32 swap 8-bit halves of each 16-bit half-word in a 32-bit word
*
* No 64-bit support yet. I don't know NUXI conventions for long longs.
* I guarantee it will be a mess when it's there, though :->
* It will be even worse if there are conflicting 64-bit conventions.
* Hopefully, no one ever used 64-bit objects on NUXI machines.
*
*/
#define ___swahw32(x) \
({ \
__u32 __x = (x); \
((__u32)( \
(((__u32)(__x) & (__u32)0x0000ffffUL) << 16) | \
(((__u32)(__x) & (__u32)0xffff0000UL) >> 16) )); \
})
#define ___swahb32(x) \
({ \
__u32 __x = (x); \
((__u32)( \
(((__u32)(__x) & (__u32)0x00ff00ffUL) << 8) | \
(((__u32)(__x) & (__u32)0xff00ff00UL) >> 8) )); \
})
#define ___constant_swahw32(x) \
((__u32)( \
(((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \
(((__u32)(x) & (__u32)0xffff0000UL) >> 16) ))
#define ___constant_swahb32(x) \
((__u32)( \
(((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \
(((__u32)(x) & (__u32)0xff00ff00UL) >> 8) ))
/*
* provide defaults when no architecture-specific optimization is detected
*/
#ifndef __arch__swahw32
# define __arch__swahw32(x) ___swahw32(x)
#endif
#ifndef __arch__swahb32
# define __arch__swahb32(x) ___swahb32(x)
#endif
#ifndef __arch__swahw32p
# define __arch__swahw32p(x) __swahw32(*(x))
#endif
#ifndef __arch__swahb32p
# define __arch__swahb32p(x) __swahb32(*(x))
#endif
#ifndef __arch__swahw32s
# define __arch__swahw32s(x) do { *(x) = __swahw32p((x)); } while (0)
#endif
#ifndef __arch__swahb32s
# define __arch__swahb32s(x) do { *(x) = __swahb32p((x)); } while (0)
#endif
/*
* Allow constant folding
*/
#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__)
# define __swahw32(x) \
(__builtin_constant_p((__u32)(x)) ? \
___swahw32((x)) : \
__fswahw32((x)))
# define __swahb32(x) \
(__builtin_constant_p((__u32)(x)) ? \
___swahb32((x)) : \
__fswahb32((x)))
#else
# define __swahw32(x) __fswahw32(x)
# define __swahb32(x) __fswahb32(x)
#endif /* OPTIMIZE */
__inline static__ __const__ __u32 __fswahw32(__u32 x)
{
return __arch__swahw32(x);
}
__inline static__ __u32 __swahw32p(__u32 *x)
{
return __arch__swahw32p(x);
}
__inline static__ void __swahw32s(__u32 *addr)
{
__arch__swahw32s(addr);
}
__inline static__ __const__ __u32 __fswahb32(__u32 x)
{
return __arch__swahb32(x);
}
__inline static__ __u32 __swahb32p(__u32 *x)
{
return __arch__swahb32p(x);
}
__inline static__ void __swahb32s(__u32 *addr)
{
__arch__swahb32s(addr);
}
#ifdef __BYTEORDER_HAS_U64__
/*
* Not supported yet
*/
#endif /* __BYTEORDER_HAS_U64__ */
#if defined(PLATFORM_LINUX)
#define swahw32 __swahw32
#define swahb32 __swahb32
#define swahw32p __swahw32p
#define swahb32p __swahb32p
#define swahw32s __swahw32s
#define swahb32s __swahb32s
#endif
#endif /* _LINUX_BYTEORDER_SWABB_H */

27
drivers/net/wireless/rtl8192c/include/circ_buf.h
View File

@@ -1,27 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CIRC_BUF_H_
#define __CIRC_BUF_H_ 1
#define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1))
#define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size))
#endif //_CIRC_BUF_H_

36
drivers/net/wireless/rtl8192c/include/cmd_osdep.h
View File

@@ -1,36 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CMD_OSDEP_H_
#define __CMD_OSDEP_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
extern sint _rtw_init_cmd_priv (struct cmd_priv *pcmdpriv);
extern sint _rtw_init_evt_priv(struct evt_priv *pevtpriv);
extern void _rtw_free_evt_priv (struct evt_priv *pevtpriv);
extern void _rtw_free_cmd_priv (struct cmd_priv *pcmdpriv);
extern sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj);
extern struct cmd_obj *_rtw_dequeue_cmd(_queue *queue);
#endif

57
drivers/net/wireless/rtl8192c/include/drv_conf.h
View File

@@ -1,57 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_CONF_H__
#define __DRV_CONF_H__
#include "autoconf.h"
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
//Rockchips' android kernel doesn't has CONFIG_ANDROID defined,
//add this to force CONFIG_ANDROID defined
#ifdef CONFIG_PLATFORM_ANDROID
//#define CONFIG_ANDROID
#endif
#if defined(CONFIG_HAS_EARLYSUSPEND) && defined (CONFIG_RESUME_IN_WORKQUEUE)
#warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically.\n"
#undef CONFIG_RESUME_IN_WORKQUEUE
#endif
#if defined(CONFIG_ANDROID_POWER) && defined (CONFIG_RESUME_IN_WORKQUEUE)
#warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically.\n"
#undef CONFIG_RESUME_IN_WORKQUEUE
#endif
#ifdef CONFIG_RESUME_IN_WORKQUEUE //this can be removed, because there is no case for this...
#if !defined( CONFIG_WAKELOCK) && !defined(CONFIG_ANDROID_POWER)
#error "enable CONFIG_RESUME_IN_WORKQUEUE without CONFIG_WAKELOCK or CONFIG_ANDROID_POWER will suffer from the danger of wifi's unfunctionality...\n"
#error "If you still want to enable CONFIG_RESUME_IN_WORKQUEUE in this case, mask this preprossor checking and GOOD LUCK...\n"
#endif
#endif
//#include <rtl871x_byteorder.h>
#endif // __DRV_CONF_H__

432
drivers/net/wireless/rtl8192c/include/drv_types.h
View File

@@ -1,432 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*-------------------------------------------------------------------------------
For type defines and data structure defines
--------------------------------------------------------------------------------*/
#ifndef __DRV_TYPES_H__
#define __DRV_TYPES_H__
#include <drv_conf.h>
#include <osdep_service.h>
#include <wlan_bssdef.h>
#ifdef PLATFORM_OS_XP
#include <drv_types_xp.h>
#endif
#ifdef PLATFORM_OS_CE
#include <drv_types_ce.h>
#endif
#ifdef PLATFORM_LINUX
#include <drv_types_linux.h>
#endif
enum _NIC_VERSION {
RTL8711_NIC,
RTL8712_NIC,
RTL8713_NIC,
RTL8716_NIC
};
enum{
UP_LINK,
DOWN_LINK,
};
typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER;
#ifdef CONFIG_80211N_HT
#include <rtw_ht.h>
#endif
#include <rtw_cmd.h>
#include <wlan_bssdef.h>
#include <rtw_xmit.h>
#include <rtw_recv.h>
#include <hal_init.h>
#include <rtw_qos.h>
#include <rtw_security.h>
#include <rtw_pwrctrl.h>
#include <rtw_io.h>
#include <rtw_eeprom.h>
#include <sta_info.h>
#include <rtw_mlme.h>
#include <rtw_debug.h>
#include <rtw_rf.h>
#include <rtw_event.h>
#include <rtw_led.h>
#include <rtw_mlme_ext.h>
#include <rtw_p2p.h>
#ifdef CONFIG_DRVEXT_MODULE
#include <drvext_api.h>
#endif
#ifdef CONFIG_MP_INCLUDED
#include <rtw_mp.h>
#endif
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
#define SPEC_DEV_ID_ENABLE_PS BIT(2)
#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
struct specific_device_id{
u32 flags;
u16 idVendor;
u16 idProduct;
};
struct registry_priv
{
u8 chip_version;
u8 rfintfs;
u8 lbkmode;
u8 hci;
NDIS_802_11_SSID ssid;
u8 network_mode; //infra, ad-hoc, auto
u8 channel;//ad-hoc support requirement
u8 wireless_mode;//A, B, G, auto
u8 scan_mode;//active, passive
u8 radio_enable;
u8 preamble;//long, short, auto
u8 vrtl_carrier_sense;//Enable, Disable, Auto
u8 vcs_type;//RTS/CTS, CTS-to-self
u16 rts_thresh;
u16 frag_thresh;
u8 adhoc_tx_pwr;
u8 soft_ap;
u8 power_mgnt;
u8 ips_mode;
u8 smart_ps;
u8 long_retry_lmt;
u8 short_retry_lmt;
u16 busy_thresh;
u8 ack_policy;
u8 mp_mode;
u8 software_encrypt;
u8 software_decrypt;
//UAPSD
u8 wmm_enable;
u8 uapsd_enable;
u8 uapsd_max_sp;
u8 uapsd_acbk_en;
u8 uapsd_acbe_en;
u8 uapsd_acvi_en;
u8 uapsd_acvo_en;
WLAN_BSSID_EX dev_network;
#ifdef CONFIG_80211N_HT
u8 ht_enable;
u8 cbw40_enable;
u8 ampdu_enable;//for tx
#endif
u8 rf_config ;
u8 low_power ;
u8 wifi_spec;// !turbo_mode
u8 channel_plan;
#ifdef CONFIG_BT_COEXIST
u8 bt_iso;
u8 bt_sco;
u8 bt_ampdu;
#endif
BOOLEAN bAcceptAddbaReq;
u8 antdiv_cfg;
u8 usbss_enable;//0:disable,1:enable
u8 hwpdn_mode;//0:disable,1:enable,2:deside by EFUSE config
u8 hwpwrp_detect;//0:disable,1:enable
u8 hw_wps_pbc;//0:disable,1:enable
#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
char adaptor_info_caching_file_path[PATH_LENGTH_MAX];
#endif
#ifdef CONFIG_LAYER2_ROAMING
u8 max_roaming_times; // the max number driver will try to roaming
#endif
};
//For registry parameters
#define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv,field))
#define RGTRY_SZ(field) sizeof(((struct registry_priv*) 0)->field)
#define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX,field))
#define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field)
#define MAX_CONTINUAL_URB_ERR 4
struct dvobj_priv {
_adapter * padapter;
//For 92D, DMDP have 2 interface.
u8 InterfaceNumber;
u8 NumInterfaces;
/*-------- below is for SDIO INTERFACE --------*/
#ifdef CONFIG_SDIO_HCI
#ifdef PLATFORM_OS_XP
PDEVICE_OBJECT pphysdevobj;//pPhysDevObj;
PDEVICE_OBJECT pfuncdevobj;//pFuncDevObj;
PDEVICE_OBJECT pnextdevobj;//pNextDevObj;
SDBUS_INTERFACE_STANDARD sdbusinft;//SdBusInterface;
u8 nextdevstacksz;//unsigned char NextDeviceStackSize;
#endif//PLATFORM_OS_XP
#ifdef PLATFORM_OS_CE
SD_DEVICE_HANDLE hDevice;
SD_CARD_RCA sd_rca;
SD_CARD_INTERFACE card_intf;
BOOLEAN enableIsarWithStatus;
WCHAR active_path[MAX_ACTIVE_REG_PATH];
SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap;
#endif//PLATFORM_OS_CE
#ifdef PLATFORM_LINUX
struct sdio_func *func;
#endif//PLATFORM_LINUX
u8 func_number;//unsigned char FunctionNumber;
u32 block_transfer_len;//unsigned long BLOCK_TRANSFER_LEN;
u32 blk_shiftbits;
u16 driver_version;
u16 rxblknum;
u16 rxblknum_rd;
u16 c2hblknum;
u8 tx_block_mode;
u8 rx_block_mode;
u8 cmdfifo_cnt;
u8 rxfifo_cnt;
u16 sdio_hisr;
u16 sdio_himr;
#endif// CONFIG_SDIO_HCI
/*-------- below is for USB INTERFACE --------*/
#ifdef CONFIG_USB_HCI
u8 nr_endpoint;
u8 ishighspeed;
u8 RtNumInPipes;
u8 RtNumOutPipes;
int ep_num[5]; //endpoint number
int RegUsbSS;
_sema usb_suspend_sema;
#ifdef CONFIG_USB_VENDOR_REQ_PREALLOC
_mutex usb_vendor_req_mutex;
u8 * usb_alloc_vendor_req_buf;
u8 * usb_vendor_req_buf;
#endif
#ifdef PLATFORM_WINDOWS
//related device objects
PDEVICE_OBJECT pphysdevobj;//pPhysDevObj;
PDEVICE_OBJECT pfuncdevobj;//pFuncDevObj;
PDEVICE_OBJECT pnextdevobj;//pNextDevObj;
u8 nextdevstacksz;//unsigned char NextDeviceStackSize; //= (CHAR)CEdevice->pUsbDevObj->StackSize + 1;
//urb for control diescriptor request
#ifdef PLATFORM_OS_XP
struct _URB_CONTROL_DESCRIPTOR_REQUEST descriptor_urb;
PUSB_CONFIGURATION_DESCRIPTOR pconfig_descriptor;//UsbConfigurationDescriptor;
#endif
#ifdef PLATFORM_OS_CE
WCHAR active_path[MAX_ACTIVE_REG_PATH]; // adapter regpath
USB_EXTENSION usb_extension;
_nic_hdl pipehdls_r8192c[0x10];
#endif
u32 config_descriptor_len;//ULONG UsbConfigurationDescriptorLength;
#endif//PLATFORM_WINDOWS
#ifdef PLATFORM_LINUX
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
#endif//PLATFORM_LINUX
ATOMIC_T continual_urb_error;
#endif//CONFIG_USB_HCI
/*-------- below is for PCIE INTERFACE --------*/
#ifdef CONFIG_PCI_HCI
#ifdef PLATFORM_LINUX
struct pci_dev *ppcidev;
//PCI MEM map
unsigned long pci_mem_end; /* shared mem end */
unsigned long pci_mem_start; /* shared mem start */
//PCI IO map
unsigned long pci_base_addr; /* device I/O address */
//PciBridge
struct pci_priv pcipriv;
u16 irqline;
u8 irq_enabled;
u8 irq_alloc;
RT_ISR_CONTENT isr_content;
_lock irq_th_lock;
//ASPM
u8 const_pci_aspm;
u8 const_amdpci_aspm;
u8 const_hwsw_rfoff_d3;
u8 const_support_pciaspm;
// pci-e bridge */
u8 const_hostpci_aspm_setting;
// pci-e device */
u8 const_devicepci_aspm_setting;
u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
u8 b_support_backdoor;
#endif//PLATFORM_LINUX
#endif//CONFIG_PCI_HCI
};
typedef enum _DRIVER_STATE{
DRIVER_NORMAL = 0,
DRIVER_DISAPPEAR = 1,
DRIVER_REPLACE_DONGLE = 2,
}DRIVER_STATE;
struct _ADAPTER{
int DriverState;// for disable driver using module, use dongle to replace module.
int pid[3];//process id from UI, 0:wpa_supplicant, 1:hostapd, 2:dhcpcd
int bDongle;//build-in module or external dongle
u16 chip_type;
u16 HardwareType;
u16 interface_type;//USB,SDIO,PCI
struct dvobj_priv dvobjpriv;
struct mlme_priv mlmepriv;
struct mlme_ext_priv mlmeextpriv;
struct cmd_priv cmdpriv;
struct evt_priv evtpriv;
//struct io_queue *pio_queue;
struct io_priv iopriv;
struct xmit_priv xmitpriv;
struct recv_priv recvpriv;
struct sta_priv stapriv;
struct security_priv securitypriv;
struct registry_priv registrypriv;
struct wlan_acl_pool acl_list;
struct pwrctrl_priv pwrctrlpriv;
struct eeprom_priv eeprompriv;
struct led_priv ledpriv;
#ifdef CONFIG_DRVEXT_MODULE
struct drvext_priv drvextpriv;
#endif
#ifdef CONFIG_AP_MODE
struct hostapd_priv *phostapdpriv;
#endif
#ifdef CONFIG_P2P
struct wifidirect_info wdinfo;
#endif //CONFIG_P2P
PVOID HalData;
struct hal_ops HalFunc;
#ifdef CONFIG_BT_COEXIST
//struct btcoexist_priv bt_coexist;
#endif
s32 bDriverStopped;
s32 bSurpriseRemoved;
s32 bCardDisableWOHSM;
u32 IsrContent;
u32 ImrContent;
u8 EepromAddressSize;
u8 hw_init_completed;
u8 init_adpt_in_progress;
u8 bfirst_init;
_thread_hdl_ cmdThread;
_thread_hdl_ evtThread;
_thread_hdl_ xmitThread;
_thread_hdl_ recvThread;
NDIS_STATUS (*dvobj_init)(_adapter * adapter);
void (*dvobj_deinit)(_adapter * adapter);
void (*intf_start)(_adapter * adapter);
void (*intf_stop)(_adapter * adapter);
#ifdef PLATFORM_LINUX
_nic_hdl pnetdev;
_nic_hdl old_pnetdev; // used for rtw_change_ifname
int bup;
struct net_device_stats stats;
struct iw_statistics iwstats;
struct proc_dir_entry *dir_dev;// for proc directory
#endif //end of PLATFORM_LINUX
int net_closed;
u8 bFWReady;
u8 bReadPortCancel;
u8 bWritePortCancel;
u8 bRxRSSIDisplay;
#ifdef CONFIG_AUTOSUSPEND
u8 bDisableAutosuspend;
#endif
};
__inline static u8 *myid(struct eeprom_priv *peepriv)
{
return (peepriv->mac_addr);
}
#endif //__DRV_TYPES_H__

92
drivers/net/wireless/rtl8192c/include/drv_types_ce.h
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@@ -1,92 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_TYPES_CE_H__
#define __DRV_TYPES_CE_H__
#include <drv_conf.h>
#include <osdep_service.h>
#include <Sdcardddk.h>
#define MAX_ACTIVE_REG_PATH 256
#define MAX_MCAST_LIST_NUM 32
//for ioctl
#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer)
#define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h
#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h
#define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h
#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h
#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h
typedef struct _MP_REG_ENTRY
{
NDIS_STRING RegName; // variable name text
BOOLEAN bRequired; // 1 -> required, 0 -> optional
u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString
uint FieldOffset; // offset to MP_ADAPTER field
uint FieldSize; // size (in bytes) of the field
#ifdef UNDER_AMD64
u64 Default;
#else
u32 Default; // default value to use
#endif
u32 Min; // minimum value allowed
u32 Max; // maximum value allowed
} MP_REG_ENTRY, *PMP_REG_ENTRY;
#ifdef CONFIG_USB_HCI
typedef struct _USB_EXTENSION {
LPCUSB_FUNCS _lpUsbFuncs;
USB_HANDLE _hDevice;
PVOID pAdapter;
#if 0
USB_ENDPOINT_DESCRIPTOR _endpACLIn;
USB_ENDPOINT_DESCRIPTOR _endpACLOutHigh;
USB_ENDPOINT_DESCRIPTOR _endpACLOutNormal;
USB_PIPE pPipeIn;
USB_PIPE pPipeOutNormal;
USB_PIPE pPipeOutHigh;
#endif
} USB_EXTENSION, *PUSB_EXTENSION;
#endif
typedef struct _OCTET_STRING{
u8 *Octet;
u16 Length;
} OCTET_STRING, *POCTET_STRING;
#endif

25
drivers/net/wireless/rtl8192c/include/drv_types_linux.h
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@@ -1,25 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_TYPES_LINUX_H__
#define __DRV_TYPES_LINUX_H__
#endif

95
drivers/net/wireless/rtl8192c/include/drv_types_xp.h
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@@ -1,95 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_TYPES_XP_H__
#define __DRV_TYPES_XP_H__
#include <drv_conf.h>
#include <osdep_service.h>
#define MAX_MCAST_LIST_NUM 32
//for ioctl
#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer)
#define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h
#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h
#define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h
#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h
#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h
#undef ON_VISTA
//added by Jackson
#ifndef ON_VISTA
//
// Bus driver versions
//
#define SDBUS_DRIVER_VERSION_1 0x100
#define SDBUS_DRIVER_VERSION_2 0x200
#define SDP_FUNCTION_TYPE 4
#define SDP_BUS_DRIVER_VERSION 5
#define SDP_BUS_WIDTH 6
#define SDP_BUS_CLOCK 7
#define SDP_BUS_INTERFACE_CONTROL 8
#define SDP_HOST_BLOCK_LENGTH 9
#define SDP_FUNCTION_BLOCK_LENGTH 10
#define SDP_FN0_BLOCK_LENGTH 11
#define SDP_FUNCTION_INT_ENABLE 12
#endif
typedef struct _MP_REG_ENTRY
{
NDIS_STRING RegName; // variable name text
BOOLEAN bRequired; // 1 -> required, 0 -> optional
u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString
uint FieldOffset; // offset to MP_ADAPTER field
uint FieldSize; // size (in bytes) of the field
#ifdef UNDER_AMD64
u64 Default;
#else
u32 Default; // default value to use
#endif
u32 Min; // minimum value allowed
u32 Max; // maximum value allowed
} MP_REG_ENTRY, *PMP_REG_ENTRY;
typedef struct _OCTET_STRING{
u8 *Octet;
u16 Length;
} OCTET_STRING, *POCTET_STRING;
#endif

41
drivers/net/wireless/rtl8192c/include/ethernet.h
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@@ -1,41 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*! \file */
#ifndef __INC_ETHERNET_H
#define __INC_ETHERNET_H
#define ETHERNET_ADDRESS_LENGTH 6 //!< Ethernet Address Length
#define ETHERNET_HEADER_SIZE 14 //!< Ethernet Header Length
#define LLC_HEADER_SIZE 6 //!< LLC Header Length
#define TYPE_LENGTH_FIELD_SIZE 2 //!< Type/Length Size
#define MINIMUM_ETHERNET_PACKET_SIZE 60 //!< Minimum Ethernet Packet Size
#define MAXIMUM_ETHERNET_PACKET_SIZE 1514 //!< Maximum Ethernet Packet Size
#define RT_ETH_IS_MULTICAST(_pAddr) ((((UCHAR *)(_pAddr))[0]&0x01)!=0) //!< Is Multicast Address?
#define RT_ETH_IS_BROADCAST(_pAddr) ( \
((UCHAR *)(_pAddr))[0]==0xff && \
((UCHAR *)(_pAddr))[1]==0xff && \
((UCHAR *)(_pAddr))[2]==0xff && \
((UCHAR *)(_pAddr))[3]==0xff && \
((UCHAR *)(_pAddr))[4]==0xff && \
((UCHAR *)(_pAddr))[5]==0xff ) //!< Is Broadcast Address?
#endif // #ifndef __INC_ETHERNET_H

31480
drivers/net/wireless/rtl8192c/include/farray.h
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35
drivers/net/wireless/rtl8192c/include/h2clbk.h
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@@ -1,35 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _H2CLBK_H_
#include <rtl8711_spec.h>
#include <TypeDef.h>
void _lbk_cmd(PADAPTER Adapter);
void _lbk_rsp(PADAPTER Adapter);
void _lbk_evt(IN PADAPTER Adapter);
void h2c_event_callback(unsigned char *dev, unsigned char *pbuf);

272
drivers/net/wireless/rtl8192c/include/hal_init.h
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@@ -1,272 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_INIT_H__
#define __HAL_INIT_H__
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#ifdef CONFIG_PCI_HCI
#include <pci_hal.h>
#endif
enum RTL871X_HCI_TYPE {
RTW_SDIO,
RTW_USB,
RTW_PCIE
};
enum _CHIP_TYPE {
NULL_CHIP_TYPE,
RTL8712_8188S_8191S_8192S,
RTL8188C_8192C,
RTL8192D,
MAX_CHIP_TYPE
};
typedef enum _HW_VARIABLES{
HW_VAR_MEDIA_STATUS,
HW_VAR_MEDIA_STATUS1,
HW_VAR_SET_OPMODE,
HW_VAR_BSSID,
HW_VAR_INIT_RTS_RATE,
HW_VAR_BASIC_RATE,
HW_VAR_TXPAUSE,
HW_VAR_BCN_FUNC,
HW_VAR_CORRECT_TSF,
HW_VAR_CHECK_BSSID,
HW_VAR_MLME_DISCONNECT,
HW_VAR_MLME_SITESURVEY,
HW_VAR_MLME_JOIN,
HW_VAR_BEACON_INTERVAL,
HW_VAR_SLOT_TIME,
HW_VAR_SIFS,
HW_VAR_ACK_PREAMBLE,
HW_VAR_SEC_CFG,
HW_VAR_TX_BCN_DONE,
HW_VAR_RF_TYPE,
HW_VAR_DM_FLAG,
HW_VAR_DM_FUNC_OP,
HW_VAR_DM_FUNC_SET,
HW_VAR_DM_FUNC_CLR,
HW_VAR_CAM_EMPTY_ENTRY,
HW_VAR_CAM_INVALID_ALL,
HW_VAR_CAM_WRITE,
HW_VAR_AC_PARAM_VO,
HW_VAR_AC_PARAM_VI,
HW_VAR_AC_PARAM_BE,
HW_VAR_AC_PARAM_BK,
HW_VAR_AMPDU_MIN_SPACE,
HW_VAR_AMPDU_FACTOR,
HW_VAR_RXDMA_AGG_PG_TH,
HW_VAR_SET_RPWM,
HW_VAR_H2C_FW_PWRMODE,
HW_VAR_H2C_FW_JOINBSSRPT,
HW_VAR_FWLPS_RF_ON,
HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
HW_VAR_INITIAL_GAIN,
HW_VAR_TRIGGER_GPIO_0,
HW_VAR_BT_SET_COEXIST,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_CURRENT_ANTENNA,
HW_VAR_ANTENNA_DIVERSITY_LINK,
HW_VAR_ANTENNA_DIVERSITY_SELECT,
HW_VAR_SWITCH_EPHY_WoWLAN,
HW_VAR_EFUSE_BYTES,
HW_VAR_FIFO_CLEARN_UP,
}HW_VARIABLES;
typedef enum _HAL_DEF_VARIABLE{
HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
HAL_DEF_IS_SUPPORT_ANT_DIV,
HAL_DEF_CURRENT_ANTENNA,
HAL_DEF_DRVINFO_SZ,
HAL_DEF_MAX_RECVBUF_SZ,
HAL_DEF_RX_PACKET_OFFSET,
HAL_DEF_DBG_DUMP_RXPKT,//for dbg
HAL_DEF_DBG_DM_FUNC,//for dbg
}HAL_DEF_VARIABLE;
typedef enum _HAL_INTF_PS_FUNC{
HAL_USB_SELECT_SUSPEND,
HAL_MAX_ID,
}HAL_INTF_PS_FUNC;
struct hal_ops {
u32 (*hal_init)(PADAPTER Adapter);
u32 (*hal_deinit)(PADAPTER Adapter);
void (*free_hal_data)(PADAPTER Adapter);
u32 (*inirp_init)(PADAPTER Adapter);
u32 (*inirp_deinit)(PADAPTER Adapter);
s32 (*init_xmit_priv)(PADAPTER Adapter);
void (*free_xmit_priv)(PADAPTER Adapter);
s32 (*init_recv_priv)(PADAPTER Adapter);
void (*free_recv_priv)(PADAPTER Adapter);
void (*InitSwLeds)(PADAPTER Adapter);
void (*DeInitSwLeds)(PADAPTER Adapter);
void (*dm_init)(PADAPTER Adapter);
void (*dm_deinit)(PADAPTER Adapter);
void (*read_chip_version)(PADAPTER Adapter);
void (*init_default_value)(PADAPTER Adapter);
void (*intf_chip_configure)(PADAPTER Adapter);
void (*read_adapter_info)(PADAPTER Adapter);
void (*enable_interrupt)(PADAPTER Adapter);
void (*disable_interrupt)(PADAPTER Adapter);
s32 (*interrupt_handler)(PADAPTER Adapter);
void (*set_bwmode_handler)(PADAPTER Adapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset);
void (*set_channel_handler)(PADAPTER Adapter, u8 channel);
void (*hal_dm_watchdog)(PADAPTER Adapter);
void (*SetHwRegHandler)(PADAPTER Adapter, u8 variable,u8* val);
void (*GetHwRegHandler)(PADAPTER Adapter, u8 variable,u8* val);
u8 (*GetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
u8 (*SetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
void (*UpdateRAMaskHandler)(PADAPTER Adapter, u32 mac_id);
void (*SetBeaconRelatedRegistersHandler)(PADAPTER Adapter);
void (*Add_RateATid)(PADAPTER Adapter, u32 bitmap, u8 arg);
#ifdef CONFIG_ANTENNA_DIVERSITY
u8 (*SwAntDivBeforeLinkHandler)(PADAPTER Adapter);
void (*SwAntDivCompareHandler)(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
#endif
u8 (*interface_ps_func)(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8* val);
s32 (*hal_xmit)(PADAPTER Adapter, struct xmit_frame *pxmitframe);
void (*mgnt_xmit)(PADAPTER Adapter, struct xmit_frame *pmgntframe);
u32 (*read_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask);
void (*write_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask, u32 Data);
u32 (*read_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask);
void (*write_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
#ifdef CONFIG_HOSTAPD_MLME
s32 (*hostap_mgnt_xmit_entry)(PADAPTER Adapter, _pkt *pkt);
#endif
void (*EfusePowerSwitch)(PADAPTER pAdapter, u8 bWrite, u8 PwrState);
void (*ReadEFuse)(PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, BOOLEAN bPseudoTest);
void (*EFUSEGetEfuseDefinition)(PADAPTER pAdapter, u8 efuseType, u8 type, PVOID *pOut, BOOLEAN bPseudoTest);
u16 (*EfuseGetCurrentSize)(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest);
int (*Efuse_PgPacketRead)(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest);
int (*Efuse_PgPacketWrite)(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
u8 (*Efuse_WordEnableDataWrite)(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
#ifdef SILENT_RESET_FOR_SPECIFIC_PLATFOM
void (*sreset_init_value)(_adapter *padapter);
void (*sreset_reset_value)(_adapter *padapter);
void (*silentreset)(_adapter *padapter);
void (*sreset_xmit_status_check)(_adapter *padapter);
void (*sreset_linked_status_check) (_adapter *padapter);
u8 (*sreset_get_wifi_status)(_adapter *padapter);
#endif
};
typedef enum _RT_EEPROM_TYPE{
EEPROM_93C46,
EEPROM_93C56,
EEPROM_BOOT_EFUSE,
}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
#define USB_HIGH_SPEED_BULK_SIZE 512
#define USB_FULL_SPEED_BULK_SIZE 64
#define RF_CHANGE_BY_INIT 0
#define RF_CHANGE_BY_IPS BIT28
#define RF_CHANGE_BY_PS BIT29
#define RF_CHANGE_BY_HW BIT30
#define RF_CHANGE_BY_SW BIT31
typedef enum _HARDWARE_TYPE{
HARDWARE_TYPE_RTL8180,
HARDWARE_TYPE_RTL8185,
HARDWARE_TYPE_RTL8187,
HARDWARE_TYPE_RTL8188,
HARDWARE_TYPE_RTL8190P,
HARDWARE_TYPE_RTL8192E,
HARDWARE_TYPE_RTL819xU,
HARDWARE_TYPE_RTL8192SE,
HARDWARE_TYPE_RTL8192SU,
HARDWARE_TYPE_RTL8192CE,
HARDWARE_TYPE_RTL8192CU,
HARDWARE_TYPE_RTL8192DE,
HARDWARE_TYPE_RTL8192DU,
HARDWARE_TYPE_RTL8723E,
HARDWARE_TYPE_RTL8723U,
}HARDWARE_TYPE;
#define IS_HARDWARE_TYPE_8192CE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CE)
#define IS_HARDWARE_TYPE_8192CU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CU)
#define IS_HARDWARE_TYPE_8192DE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DE)
#define IS_HARDWARE_TYPE_8192DU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DU)
#define IS_HARDWARE_TYPE_8723E(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723E)
#define IS_HARDWARE_TYPE_8723U(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723U)
#define IS_HARDWARE_TYPE_8192C(_Adapter) \
(IS_HARDWARE_TYPE_8192CE(_Adapter) || IS_HARDWARE_TYPE_8192CU(_Adapter))
#define IS_HARDWARE_TYPE_8192D(_Adapter) \
(IS_HARDWARE_TYPE_8192DE(_Adapter) || IS_HARDWARE_TYPE_8192DU(_Adapter))
#define IS_HARDWARE_TYPE_8723(_Adapter) \
(IS_HARDWARE_TYPE_8723E(_Adapter) || IS_HARDWARE_TYPE_8723U(_Adapter))
typedef struct eeprom_priv EEPROM_EFUSE_PRIV, *PEEPROM_EFUSE_PRIV;
#define GET_EEPROM_EFUSE_PRIV(priv) (&priv->eeprompriv)
void rtw_dm_init(_adapter *padapter);
void rtw_sw_led_init(_adapter *padapter);
void rtw_sw_led_deinit(_adapter *padapter);
uint rtw_hal_init(_adapter *padapter);
uint rtw_hal_deinit(_adapter *padapter);
void rtw_hal_stop(_adapter *padapter);
void intf_chip_configure(_adapter *padapter);
void intf_read_chip_info(_adapter *padapter);
void intf_read_chip_version(_adapter *padapter);
#ifdef SILENT_RESET_FOR_SPECIFIC_PLATFOM
void rtw_sreset_init(_adapter *padapter);
#endif
#endif //__HAL_INIT_H__

1432
drivers/net/wireless/rtl8192c/include/ieee80211.h
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File diff suppressed because it is too large Load Diff

477
drivers/net/wireless/rtl8192c/include/ieee80211_ext.h
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@@ -1,477 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __IEEE80211_EXT_H
#define __IEEE80211_EXT_H
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#define WMM_OUI_TYPE 2
#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0
#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1
#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2
#define WMM_VERSION 1
#define WPA_PROTO_WPA BIT(0)
#define WPA_PROTO_RSN BIT(1)
#define WPA_KEY_MGMT_IEEE8021X BIT(0)
#define WPA_KEY_MGMT_PSK BIT(1)
#define WPA_KEY_MGMT_NONE BIT(2)
#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3)
#define WPA_KEY_MGMT_WPA_NONE BIT(4)
#define WPA_CAPABILITY_PREAUTH BIT(0)
#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6)
#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9)
#define PMKID_LEN 16
#ifdef PLATFORM_LINUX
struct wpa_ie_hdr {
u8 elem_id;
u8 len;
u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */
u8 version[2]; /* little endian */
}__attribute__ ((packed));
struct rsn_ie_hdr {
u8 elem_id; /* WLAN_EID_RSN */
u8 len;
u8 version[2]; /* little endian */
}__attribute__ ((packed));
struct wme_ac_parameter {
#if defined(CONFIG_LITTLE_ENDIAN)
/* byte 1 */
u8 aifsn:4,
acm:1,
aci:2,
reserved:1;
/* byte 2 */
u8 eCWmin:4,
eCWmax:4;
#elif defined(CONFIG_BIG_ENDIAN)
/* byte 1 */
u8 reserved:1,
aci:2,
acm:1,
aifsn:4;
/* byte 2 */
u8 eCWmax:4,
eCWmin:4;
#else
#error "Please fix <endian.h>"
#endif
/* bytes 3 & 4 */
u16 txopLimit;
} __attribute__ ((packed));
struct wme_parameter_element {
/* required fields for WME version 1 */
u8 oui[3];
u8 oui_type;
u8 oui_subtype;
u8 version;
u8 acInfo;
u8 reserved;
struct wme_ac_parameter ac[4];
} __attribute__ ((packed));
#endif
#ifdef PLATFORM_WINDOWS
#pragma pack(1)
struct wpa_ie_hdr {
u8 elem_id;
u8 len;
u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */
u8 version[2]; /* little endian */
};
struct rsn_ie_hdr {
u8 elem_id; /* WLAN_EID_RSN */
u8 len;
u8 version[2]; /* little endian */
};
#pragma pack()
#endif
#define WPA_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16) (val)) >> 8; \
(a)[0] = ((u16) (val)) & 0xff; \
} while (0)
#define WPA_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define WPA_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val))
//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val))
/* Action category code */
enum ieee80211_category {
WLAN_CATEGORY_SPECTRUM_MGMT = 0,
WLAN_CATEGORY_QOS = 1,
WLAN_CATEGORY_DLS = 2,
WLAN_CATEGORY_BACK = 3,
WLAN_CATEGORY_HT = 7,
WLAN_CATEGORY_WMM = 17,
};
/* SPECTRUM_MGMT action code */
enum ieee80211_spectrum_mgmt_actioncode {
WLAN_ACTION_SPCT_MSR_REQ = 0,
WLAN_ACTION_SPCT_MSR_RPRT = 1,
WLAN_ACTION_SPCT_TPC_REQ = 2,
WLAN_ACTION_SPCT_TPC_RPRT = 3,
WLAN_ACTION_SPCT_CHL_SWITCH = 4,
WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5,
};
/* BACK action code */
enum ieee80211_back_actioncode {
WLAN_ACTION_ADDBA_REQ = 0,
WLAN_ACTION_ADDBA_RESP = 1,
WLAN_ACTION_DELBA = 2,
};
/* HT features action code */
enum ieee80211_ht_actioncode {
WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
WLAN_ACTION_SM_PS = 1,
WLAN_ACTION_PSPM = 2,
WLAN_ACTION_PCO_PHASE = 3,
WLAN_ACTION_MIMO_CSI_MX = 4,
WLAN_ACTION_MIMO_NONCP_BF = 5,
WLAN_ACTION_MIMP_CP_BF = 6,
WLAN_ACTION_ASEL_INDICATES_FB = 7,
WLAN_ACTION_HI_INFO_EXCHG = 8,
};
/* BACK (block-ack) parties */
enum ieee80211_back_parties {
WLAN_BACK_RECIPIENT = 0,
WLAN_BACK_INITIATOR = 1,
WLAN_BACK_TIMER = 2,
};
#ifdef PLATFORM_LINUX
struct ieee80211_mgmt {
u16 frame_control;
u16 duration;
u8 da[6];
u8 sa[6];
u8 bssid[6];
u16 seq_ctrl;
union {
struct {
u16 auth_alg;
u16 auth_transaction;
u16 status_code;
/* possibly followed by Challenge text */
u8 variable[0];
} __attribute__ ((packed)) auth;
struct {
u16 reason_code;
} __attribute__ ((packed)) deauth;
struct {
u16 capab_info;
u16 listen_interval;
/* followed by SSID and Supported rates */
u8 variable[0];
} __attribute__ ((packed)) assoc_req;
struct {
u16 capab_info;
u16 status_code;
u16 aid;
/* followed by Supported rates */
u8 variable[0];
} __attribute__ ((packed)) assoc_resp, reassoc_resp;
struct {
u16 capab_info;
u16 listen_interval;
u8 current_ap[6];
/* followed by SSID and Supported rates */
u8 variable[0];
} __attribute__ ((packed)) reassoc_req;
struct {
u16 reason_code;
} __attribute__ ((packed)) disassoc;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params, TIM */
u8 variable[0];
} __attribute__ ((packed)) beacon;
struct {
/* only variable items: SSID, Supported rates */
u8 variable[0];
} __attribute__ ((packed)) probe_req;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params */
u8 variable[0];
} __attribute__ ((packed)) probe_resp;
struct {
u8 category;
union {
struct {
u8 action_code;
u8 dialog_token;
u8 status_code;
u8 variable[0];
} __attribute__ ((packed)) wme_action;
#if 0
struct{
u8 action_code;
u8 element_id;
u8 length;
struct ieee80211_channel_sw_ie sw_elem;
} __attribute__ ((packed)) chan_switch;
struct{
u8 action_code;
u8 dialog_token;
u8 element_id;
u8 length;
struct ieee80211_msrment_ie msr_elem;
} __attribute__ ((packed)) measurement;
#endif
struct{
u8 action_code;
u8 dialog_token;
u16 capab;
u16 timeout;
u16 start_seq_num;
} __attribute__ ((packed)) addba_req;
struct{
u8 action_code;
u8 dialog_token;
u16 status;
u16 capab;
u16 timeout;
} __attribute__ ((packed)) addba_resp;
struct{
u8 action_code;
u16 params;
u16 reason_code;
} __attribute__ ((packed)) delba;
struct{
u8 action_code;
/* capab_info for open and confirm,
* reason for close
*/
u16 aux;
/* Followed in plink_confirm by status
* code, AID and supported rates,
* and directly by supported rates in
* plink_open and plink_close
*/
u8 variable[0];
} __attribute__ ((packed)) plink_action;
struct{
u8 action_code;
u8 variable[0];
} __attribute__ ((packed)) mesh_action;
} __attribute__ ((packed)) u;
} __attribute__ ((packed)) action;
} __attribute__ ((packed)) u;
}__attribute__ ((packed));
#endif
#ifdef PLATFORM_WINDOWS
#pragma pack(1)
struct ieee80211_mgmt {
u16 frame_control;
u16 duration;
u8 da[6];
u8 sa[6];
u8 bssid[6];
u16 seq_ctrl;
union {
struct {
u16 auth_alg;
u16 auth_transaction;
u16 status_code;
/* possibly followed by Challenge text */
u8 variable[0];
} auth;
struct {
u16 reason_code;
} deauth;
struct {
u16 capab_info;
u16 listen_interval;
/* followed by SSID and Supported rates */
u8 variable[0];
} assoc_req;
struct {
u16 capab_info;
u16 status_code;
u16 aid;
/* followed by Supported rates */
u8 variable[0];
} assoc_resp, reassoc_resp;
struct {
u16 capab_info;
u16 listen_interval;
u8 current_ap[6];
/* followed by SSID and Supported rates */
u8 variable[0];
} reassoc_req;
struct {
u16 reason_code;
} disassoc;
#if 0
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params, TIM */
u8 variable[0];
} beacon;
struct {
/* only variable items: SSID, Supported rates */
u8 variable[0];
} probe_req;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params */
u8 variable[0];
} probe_resp;
#endif
struct {
u8 category;
union {
struct {
u8 action_code;
u8 dialog_token;
u8 status_code;
u8 variable[0];
} wme_action;
/*
struct{
u8 action_code;
u8 element_id;
u8 length;
struct ieee80211_channel_sw_ie sw_elem;
} chan_switch;
struct{
u8 action_code;
u8 dialog_token;
u8 element_id;
u8 length;
struct ieee80211_msrment_ie msr_elem;
} measurement;
*/
struct{
u8 action_code;
u8 dialog_token;
u16 capab;
u16 timeout;
u16 start_seq_num;
} addba_req;
struct{
u8 action_code;
u8 dialog_token;
u16 status;
u16 capab;
u16 timeout;
} addba_resp;
struct{
u8 action_code;
u16 params;
u16 reason_code;
} delba;
struct{
u8 action_code;
/* capab_info for open and confirm,
* reason for close
*/
u16 aux;
/* Followed in plink_confirm by status
* code, AID and supported rates,
* and directly by supported rates in
* plink_open and plink_close
*/
u8 variable[0];
} plink_action;
struct{
u8 action_code;
u8 variable[0];
} mesh_action;
} u;
} action;
} u;
} ;
#pragma pack()
#endif
/* mgmt header + 1 byte category code */
#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u)
#endif

112
drivers/net/wireless/rtl8192c/include/if_ether.h
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@@ -1,112 +0,0 @@
/*
* INET An implementation of the TCP/IP protocol suite for the LINUX
* operating system. INET is implemented using the BSD Socket
* interface as the means of communication with the user level.
*
* Global definitions for the Ethernet IEEE 802.3 interface.
*
* Version: @(#)if_ether.h 1.0.1a 02/08/94
*
* Author: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
* Donald Becker, <becker@super.org>
* Alan Cox, <alan@redhat.com>
* Steve Whitehouse, <gw7rrm@eeshack3.swan.ac.uk>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _LINUX_IF_ETHER_H
#define _LINUX_IF_ETHER_H
/*
* IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble
* and FCS/CRC (frame check sequence).
*/
#define ETH_ALEN 6 /* Octets in one ethernet addr */
#define ETH_HLEN 14 /* Total octets in header. */
#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */
#define ETH_DATA_LEN 1500 /* Max. octets in payload */
#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */
/*
* These are the defined Ethernet Protocol ID's.
*/
#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */
#define ETH_P_PUP 0x0200 /* Xerox PUP packet */
#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */
#define ETH_P_IP 0x0800 /* Internet Protocol packet */
#define ETH_P_X25 0x0805 /* CCITT X.25 */
#define ETH_P_ARP 0x0806 /* Address Resolution packet */
#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet [ NOT AN OFFICIALLY REGISTERED ID ] */
#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */
#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */
#define ETH_P_DEC 0x6000 /* DEC Assigned proto */
#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */
#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */
#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */
#define ETH_P_LAT 0x6004 /* DEC LAT */
#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */
#define ETH_P_CUST 0x6006 /* DEC Customer use */
#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */
#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */
#define ETH_P_ATALK 0x809B /* Appletalk DDP */
#define ETH_P_AARP 0x80F3 /* Appletalk AARP */
#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */
#define ETH_P_IPX 0x8137 /* IPX over DIX */
#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */
#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */
#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */
#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */
#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport
* over Ethernet
*/
/*
* Non DIX types. Won't clash for 1500 types.
*/
#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */
#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */
#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */
#define ETH_P_802_2 0x0004 /* 802.2 frames */
#define ETH_P_SNAP 0x0005 /* Internal only */
#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */
#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/
#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */
#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */
#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/
#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */
#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */
#define ETH_P_CONTROL 0x0016 /* Card specific control frames */
#define ETH_P_IRDA 0x0017 /* Linux-IrDA */
#define ETH_P_ECONET 0x0018 /* Acorn Econet */
/*
* This is an Ethernet frame header.
*/
struct ethhdr
{
unsigned char h_dest[ETH_ALEN]; /* destination eth addr */
unsigned char h_source[ETH_ALEN]; /* source ether addr */
unsigned short h_proto; /* packet type ID field */
};
struct _vlan {
unsigned short h_vlan_TCI; // Encapsulates priority and VLAN ID
unsigned short h_vlan_encapsulated_proto;
};
#define get_vlan_id(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI)) & 0xfff)
#define get_vlan_priority(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI))>>13)
#define get_vlan_encap_proto(pvlan) (ntohs((unsigned short )pvlan->h_vlan_encapsulated_proto))
#endif /* _LINUX_IF_ETHER_H */

138
drivers/net/wireless/rtl8192c/include/ip.h
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@@ -1,138 +0,0 @@
/*
* INET An implementation of the TCP/IP protocol suite for the LINUX
* operating system. INET is implemented using the BSD Socket
* interface as the means of communication with the user level.
*
* Definitions for the IP protocol.
*
* Version: @(#)ip.h 1.0.2 04/28/93
*
* Authors: Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _LINUX_IP_H
#define _LINUX_IP_H
#include <rtw_byteorder.h>
/* SOL_IP socket options */
#define IPTOS_TOS_MASK 0x1E
#define IPTOS_TOS(tos) ((tos)&IPTOS_TOS_MASK)
#define IPTOS_LOWDELAY 0x10
#define IPTOS_THROUGHPUT 0x08
#define IPTOS_RELIABILITY 0x04
#define IPTOS_MINCOST 0x02
#define IPTOS_PREC_MASK 0xE0
#define IPTOS_PREC(tos) ((tos)&IPTOS_PREC_MASK)
#define IPTOS_PREC_NETCONTROL 0xe0
#define IPTOS_PREC_INTERNETCONTROL 0xc0
#define IPTOS_PREC_CRITIC_ECP 0xa0
#define IPTOS_PREC_FLASHOVERRIDE 0x80
#define IPTOS_PREC_FLASH 0x60
#define IPTOS_PREC_IMMEDIATE 0x40
#define IPTOS_PREC_PRIORITY 0x20
#define IPTOS_PREC_ROUTINE 0x00
/* IP options */
#define IPOPT_COPY 0x80
#define IPOPT_CLASS_MASK 0x60
#define IPOPT_NUMBER_MASK 0x1f
#define IPOPT_COPIED(o) ((o)&IPOPT_COPY)
#define IPOPT_CLASS(o) ((o)&IPOPT_CLASS_MASK)
#define IPOPT_NUMBER(o) ((o)&IPOPT_NUMBER_MASK)
#define IPOPT_CONTROL 0x00
#define IPOPT_RESERVED1 0x20
#define IPOPT_MEASUREMENT 0x40
#define IPOPT_RESERVED2 0x60
#define IPOPT_END (0 |IPOPT_CONTROL)
#define IPOPT_NOOP (1 |IPOPT_CONTROL)
#define IPOPT_SEC (2 |IPOPT_CONTROL|IPOPT_COPY)
#define IPOPT_LSRR (3 |IPOPT_CONTROL|IPOPT_COPY)
#define IPOPT_TIMESTAMP (4 |IPOPT_MEASUREMENT)
#define IPOPT_RR (7 |IPOPT_CONTROL)
#define IPOPT_SID (8 |IPOPT_CONTROL|IPOPT_COPY)
#define IPOPT_SSRR (9 |IPOPT_CONTROL|IPOPT_COPY)
#define IPOPT_RA (20|IPOPT_CONTROL|IPOPT_COPY)
#define IPVERSION 4
#define MAXTTL 255
#define IPDEFTTL 64
/* struct timestamp, struct route and MAX_ROUTES are removed.
REASONS: it is clear that nobody used them because:
- MAX_ROUTES value was wrong.
- "struct route" was wrong.
- "struct timestamp" had fatally misaligned bitfields and was completely unusable.
*/
#define IPOPT_OPTVAL 0
#define IPOPT_OLEN 1
#define IPOPT_OFFSET 2
#define IPOPT_MINOFF 4
#define MAX_IPOPTLEN 40
#define IPOPT_NOP IPOPT_NOOP
#define IPOPT_EOL IPOPT_END
#define IPOPT_TS IPOPT_TIMESTAMP
#define IPOPT_TS_TSONLY 0 /* timestamps only */
#define IPOPT_TS_TSANDADDR 1 /* timestamps and addresses */
#define IPOPT_TS_PRESPEC 3 /* specified modules only */
#ifdef PLATFORM_LINUX
struct ip_options {
__u32 faddr; /* Saved first hop address */
unsigned char optlen;
unsigned char srr;
unsigned char rr;
unsigned char ts;
unsigned char is_setbyuser:1, /* Set by setsockopt? */
is_data:1, /* Options in __data, rather than skb */
is_strictroute:1, /* Strict source route */
srr_is_hit:1, /* Packet destination addr was our one */
is_changed:1, /* IP checksum more not valid */
rr_needaddr:1, /* Need to record addr of outgoing dev */
ts_needtime:1, /* Need to record timestamp */
ts_needaddr:1; /* Need to record addr of outgoing dev */
unsigned char router_alert;
unsigned char __pad1;
unsigned char __pad2;
unsigned char __data[0];
};
#define optlength(opt) (sizeof(struct ip_options) + opt->optlen)
#endif
struct iphdr {
#if defined(__LITTLE_ENDIAN_BITFIELD)
__u8 ihl:4,
version:4;
#elif defined (__BIG_ENDIAN_BITFIELD)
__u8 version:4,
ihl:4;
#else
#error "Please fix <asm/byteorder.h>"
#endif
__u8 tos;
__u16 tot_len;
__u16 id;
__u16 frag_off;
__u8 ttl;
__u8 protocol;
__u16 check;
__u32 saddr;
__u32 daddr;
/*The options start here. */
};
#endif /* _LINUX_IP_H */

43
drivers/net/wireless/rtl8192c/include/mlme_osdep.h
View File

@@ -1,43 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __MLME_OSDEP_H_
#define __MLME_OSDEP_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#if defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL)
extern int time_after(u32 now, u32 old);
#endif
extern void rtw_init_mlme_timer(_adapter *padapter);
extern void rtw_os_indicate_disconnect( _adapter *adapter );
extern void rtw_os_indicate_connect( _adapter *adapter );
extern void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie);
#ifdef CONFIG_AP_MODE
void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta);
void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta);
#endif
void rtw_reset_securitypriv( _adapter *adapter );
#endif //_MLME_OSDEP_H_

353
drivers/net/wireless/rtl8192c/include/mp_custom_oid.h
View File

@@ -1,353 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CUSTOM_OID_H
#define __CUSTOM_OID_H
// by Owen
// 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit
// 0xFF818500 - 0xFF81850F RTL8185 Setup Utility
// 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility
//
// by Owen for Production Kit
// For Production Kit with Agilent Equipments
// in order to make our custom oids hopefully somewhat unique
// we will use 0xFF (indicating implementation specific OID)
// 81(first byte of non zero Realtek unique identifier)
// 80 (second byte of non zero Realtek unique identifier)
// XX (the custom OID number - providing 255 possible custom oids)
#define OID_RT_PRO_RESET_DUT 0xFF818000
#define OID_RT_PRO_SET_DATA_RATE 0xFF818001
#define OID_RT_PRO_START_TEST 0xFF818002
#define OID_RT_PRO_STOP_TEST 0xFF818003
#define OID_RT_PRO_SET_PREAMBLE 0xFF818004
#define OID_RT_PRO_SET_SCRAMBLER 0xFF818005
#define OID_RT_PRO_SET_FILTER_BB 0xFF818006
#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007
#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008
#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009
#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A
#define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D
#define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E
#define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F
#define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010
#define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011
#define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012
#define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013
#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014
#define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015
#define OID_RT_PRO_SET_INTEGRATOR 0xFF818016
#define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017
#define OID_RT_PRO_GET_INTEGRATOR 0xFF818018
#define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019
#define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A
#define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B
#define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C
#define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D
#define OID_RT_PRO_READ_CIS_DATA 0xFF81801E
#define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F
#define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020
#define OID_RT_PRO_WRITE_EEPROM 0xFF818021
#define OID_RT_PRO_READ_EEPROM 0xFF818022
#define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023
#define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024
#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025
#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026
#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027
#define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028
#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029
#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A
#define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C
// added by Owen on 04/08/03 for Cameo's request
#define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D
#define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E
#define OID_RT_PRO_SET_MODULATION 0xFF81802F
//
//Sean
#define OID_RT_DRIVER_OPTION 0xFF818080
#define OID_RT_RF_OFF 0xFF818081
#define OID_RT_AUTH_STATUS 0xFF818082
//========================================================================
#define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B
#define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C
#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B
#define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043
//========================================================================
// by Owen for RTL8185 Phy Status Report Utility
#define OID_RT_UTILITY_FALSE_ALARM_COUNTERS 0xFF818580
#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581
#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582
#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583
#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584
#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS 0xFF818585
#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586
//
// by Owen on 03/09/19-03/09/22 for RTL8185
#define OID_RT_WIRELESS_MODE 0xFF818500
#define OID_RT_SUPPORTED_RATES 0xFF818501
#define OID_RT_DESIRED_RATES 0xFF818502
#define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503
//
#define OID_RT_GET_CONNECT_STATE 0xFF030001
#define OID_RT_RESCAN 0xFF030002
#define OID_RT_SET_KEY_LENGTH 0xFF030003
#define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004
#define OID_RT_SET_CHANNEL 0xFF010182
#define OID_RT_SET_SNIFFER_MODE 0xFF010183
#define OID_RT_GET_SIGNAL_QUALITY 0xFF010184
#define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185
#define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186
#define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187
#define OID_RT_GET_TX_RETRY 0xFF010188
#define OID_RT_GET_RX_RETRY 0xFF010189
#define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A//S
#define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B//S
#define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190
#define OID_RT_GET_TX_BEACON_OK 0xFF010191
#define OID_RT_GET_TX_BEACON_ERR 0xFF010192
#define OID_RT_GET_RX_ICV_ERR 0xFF010193
#define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194
#define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195
#define OID_RT_GET_PREAMBLE_MODE 0xFF010196
#define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197
#define OID_RT_GET_AP_IP 0xFF010198
#define OID_RT_GET_CHANNELPLAN 0xFF010199
#define OID_RT_SET_PREAMBLE_MODE 0xFF01019A
#define OID_RT_SET_BCN_INTVL 0xFF01019B
#define OID_RT_GET_RF_VENDER 0xFF01019C
#define OID_RT_DEDICATE_PROBE 0xFF01019D
#define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E
#define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F
#define OID_RT_GET_CCA_ERR 0xFF0101A0
#define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1
#define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2
#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3
#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4
// by Owen on 03/31/03 for Cameo's request
#define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5
//
#define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5
#define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6
#define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7
#define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8
#define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9
#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA
#define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB
#define OID_RT_GET_CHANNEL 0xFF0101AC
#define OID_RT_SET_CHANNELPLAN 0xFF0101AD
#define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE
#define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF
#define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0
#define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1
#define OID_RT_GET_IS_ROAMING 0xFF0101B2
#define OID_RT_GET_IS_PRIVACY 0xFF0101B3
#define OID_RT_GET_KEY_MISMATCH 0xFF0101B4
#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5
#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6
#define OID_RT_RESET_LOG 0xFF0101B7
#define OID_RT_GET_LOG 0xFF0101B8
#define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9
#define OID_RT_GET_HEADER_FAIL 0xFF0101BA
#define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB
#define OID_RT_GET_CHANNEL_LIST 0xFF0101BC
#define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD
#define OID_RT_GET_TX_INFO 0xFF0101BE
#define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF
#define OID_RT_RF_READ_WRITE 0xFF0101C0
// For Netgear request. 2005.01.13, by rcnjko.
#define OID_RT_FORCED_DATA_RATE 0xFF0101C1
#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2
// For Netgear request. 2005.02.17, by rcnjko.
#define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3
// For AZ project. 2005.06.27, by rcnjko.
#define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4
// Vincent 8185MP
#define OID_RT_PRO_RX_FILTER 0xFF0111C0
//Andy TEST
//#define OID_RT_PRO_WRITE_REGISTRY 0xFF0111C1
//#define OID_RT_PRO_READ_REGISTRY 0xFF0111C2
#define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1
#define OID_CE_USB_READ_REGISTRY 0xFF0111C2
#define OID_RT_PRO_SET_INITIAL_GAIN 0xFF0111C3
#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4
#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5
#define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6
#define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7
#define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8
#define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9
#define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA
// AP OID
#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300
#define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301
#define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302
#define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303
#define OID_RT_AP_SUPPORTED 0xFF010304 // Determine if driver supports AP mode. 2004.08.27, by rcnjko.
#define OID_RT_AP_SET_PASSPHRASE 0xFF010305 // Set WPA-PSK passphrase into authenticator. 2005.07.08, byrcnjko.
// 8187MP. 2004.09.06, by rcnjko.
#define OID_RT_PRO8187_WI_POLL 0xFF818780
#define OID_RT_PRO_WRITE_BB_REG 0xFF818781
#define OID_RT_PRO_READ_BB_REG 0xFF818782
#define OID_RT_PRO_WRITE_RF_REG 0xFF818783
#define OID_RT_PRO_READ_RF_REG 0xFF818784
// Meeting House. added by Annie, 2005-07-20.
#define OID_RT_MH_VENDER_ID 0xFFEDC100
//8711 MP OID added 20051230.
#define OID_RT_PRO8711_JOIN_BSS 0xFF871100//S
#define OID_RT_PRO_READ_REGISTER 0xFF871101 //Q
#define OID_RT_PRO_WRITE_REGISTER 0xFF871102 //S
#define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 //Q
#define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 //S
#define OID_RT_PRO_WRITE_TXCMD 0xFF871105 //S
#define OID_RT_PRO_READ16_EEPROM 0xFF871106 //Q
#define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 //S
#define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 //S
#define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 //Q
#define OID_RT_PRO8711_WI_POLL 0xFF87110A //Q
#define OID_RT_PRO8711_PKT_LOSS 0xFF87110B //Q
#define OID_RT_RD_ATTRIB_MEM 0xFF87110C//Q
#define OID_RT_WR_ATTRIB_MEM 0xFF87110D//S
//Method 2 for H2C/C2H
#define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 //S
#define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 //Q
#define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 //S
#define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 //Q
#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114//Q
#define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 //Q, S
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 //S
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 //Q,S
#define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 //Q
#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 //Q
#define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A //S
#define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B //Q
#define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C //S
#define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D //Q
#define OID_RT_PRO_SET_RF_INTFS 0xFF87111E //S
#define OID_RT_POLL_RX_STATUS 0xFF87111F //Q
#define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 //Q,S
#define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121//S
#define OID_RT_PRO_SET_BASIC_RATE 0xFF871122//S
#define OID_RT_PRO_READ_TSSI 0xFF871123//S
#define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124//S
#define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 //Q
#define OID_RT_PRO_SET_PWRSTATE 0xFF871151 //S
//Method 2 , using workitem
#define OID_RT_SET_READ_REG 0xFF871181 //S
#define OID_RT_SET_WRITE_REG 0xFF871182 //S
#define OID_RT_SET_BURST_READ_REG 0xFF871183 //S
#define OID_RT_SET_BURST_WRITE_REG 0xFF871184 //S
#define OID_RT_SET_WRITE_TXCMD 0xFF871185 //S
#define OID_RT_SET_READ16_EEPROM 0xFF871186 //S
#define OID_RT_SET_WRITE16_EEPROM 0xFF871187 //S
#define OID_RT_QRY_POLL_WKITEM 0xFF871188 //Q
//For SDIO INTERFACE only
#define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 //Q, S
#define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1
//For USB INTERFACE only
#define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 //Q, S
#define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 //S
#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 //S
#define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 //Q
#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 //Q
#define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB //S
#define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC //S
#define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE
#define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 //Q, S
#define OID_RT_PRO_ADD_STA_INFO 0xFF871201 //S
#define OID_RT_PRO_DELE_STA_INFO 0xFF871202 //S
#define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 //Q
#define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 //Q, S
#define OID_RT_PRO_READ_EFUSE 0xFF871205 //Q
#define OID_RT_PRO_WRITE_EFUSE 0xFF871206 //S
#define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 //Q, S
#define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 //Q
#define OID_RT_SET_BANDWIDTH 0xFF871209 //S
#define OID_RT_SET_CRYSTAL_CAP 0xFF87120A //S
#define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B //S
#define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C //Q
#define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D //S
#define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E //S
#define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F //S
#define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 //Q
#define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 //S
#define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 //Q
#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 //Q
#define OID_RT_SET_POWER_DOWN 0xFF871214 //S
#define OID_RT_GET_POWER_MODE 0xFF871215 //Q
#define OID_RT_PRO_EFUSE 0xFF871216 //Q, S
#define OID_RT_PRO_EFUSE_MAP 0xFF871217 //Q, S
#endif //#ifndef __CUSTOM_OID_H

47
drivers/net/wireless/rtl8192c/include/nic_spec.h
View File

@@ -1,47 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __NIC_SPEC_H__
#define __NIC_SPEC_H__
#include <drv_conf.h>
#define RTL8711_MCTRL_ (0x20000)
#define RTL8711_UART_ (0x30000)
#define RTL8711_TIMER_ (0x40000)
#define RTL8711_FINT_ (0x50000)
#define RTL8711_HINT_ (0x50000)
#define RTL8711_GPIO_ (0x60000)
#define RTL8711_WLANCTRL_ (0x200000)
#define RTL8711_WLANFF_ (0xe00000)
#define RTL8711_HCICTRL_ (0x600000)
#define RTL8711_SYSCFG_ (0x620000)
#define RTL8711_SYSCTRL_ (0x620000)
#define RTL8711_MCCTRL_ (0x020000)
#include <rtl8711_regdef.h>
#include <rtl8711_bitdef.h>
#endif // __RTL8711_SPEC_H__

171
drivers/net/wireless/rtl8192c/include/osdep_ce_service.h
View File

@@ -1,171 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __OSDEP_CE_SERVICE_H_
#define __OSDEP_CE_SERVICE_H_
#include <ndis.h>
#include <ntddndis.h>
#ifdef CONFIG_SDIO_HCI
#include "SDCardDDK.h"
#endif
#ifdef CONFIG_USB_HCI
#include <usbdi.h>
#endif
typedef HANDLE _sema;
typedef LIST_ENTRY _list;
typedef NDIS_STATUS _OS_STATUS;
typedef NDIS_SPIN_LOCK _lock;
typedef HANDLE _rwlock; //Mutex
typedef u32 _irqL;
typedef NDIS_HANDLE _nic_hdl;
typedef NDIS_MINIPORT_TIMER _timer;
struct __queue {
LIST_ENTRY queue;
_lock lock;
};
typedef NDIS_PACKET _pkt;
typedef NDIS_BUFFER _buffer;
typedef struct __queue _queue;
typedef HANDLE _thread_hdl_;
typedef DWORD thread_return;
typedef void* thread_context;
typedef NDIS_WORK_ITEM _workitem;
#define thread_exit() ExitThread(STATUS_SUCCESS); return 0;
#define SEMA_UPBND (0x7FFFFFFF) //8192
__inline static _list *get_prev(_list *list)
{
return list->Blink;
}
__inline static _list *get_next(_list *list)
{
return list->Flink;
}
__inline static _list *get_list_head(_queue *queue)
{
return (&(queue->queue));
}
#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member)
__inline static void _enter_critical(_lock *plock, _irqL *pirqL)
{
NdisAcquireSpinLock(plock);
}
__inline static void _exit_critical(_lock *plock, _irqL *pirqL)
{
NdisReleaseSpinLock(plock);
}
__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL)
{
NdisDprAcquireSpinLock(plock);
}
__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL)
{
NdisDprReleaseSpinLock(plock);
}
__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
{
WaitForSingleObject(*prwlock, INFINITE );
}
__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
{
ReleaseMutex(*prwlock);
}
__inline static void rtw_list_delete(_list *plist)
{
RemoveEntryList(plist);
InitializeListHead(plist);
}
__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx)
{
NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx);
}
__inline static void _set_timer(_timer *ptimer,u32 delay_time)
{
NdisMSetTimer(ptimer,delay_time);
}
__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
{
NdisMCancelTimer(ptimer,bcancelled);
}
__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)
{
NdisInitializeWorkItem(pwork, pfunc, cntx);
}
__inline static void _set_workitem(_workitem *pwork)
{
NdisScheduleWorkItem(pwork);
}
#define ATOMIC_INIT(i) { (i) }
//
// Global Mutex: can only be used at PASSIVE level.
//
#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \
{ \
while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\
{ \
NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
NdisMSleep(10000); \
} \
}
#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \
{ \
NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
}
#endif

128
drivers/net/wireless/rtl8192c/include/osdep_intf.h
View File

@@ -1,128 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __OSDEP_INTF_H_
#define __OSDEP_INTF_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2)
struct intf_priv {
u8 *intf_dev;
u32 max_iosz; //USB2.0: 128, USB1.1: 64, SDIO:64
u32 max_xmitsz; //USB2.0: unlimited, SDIO:512
u32 max_recvsz; //USB2.0: unlimited, SDIO:512
volatile u8 *io_rwmem;
volatile u8 *allocated_io_rwmem;
u32 io_wsz; //unit: 4bytes
u32 io_rsz;//unit: 4bytes
u8 intf_status;
void (*_bus_io)(u8 *priv);
/*
Under Sync. IRP (SDIO/USB)
A protection mechanism is necessary for the io_rwmem(read/write protocol)
Under Async. IRP (SDIO/USB)
The protection mechanism is through the pending queue.
*/
_mutex ioctl_mutex;
#ifdef PLATFORM_LINUX
#ifdef CONFIG_USB_HCI
// when in USB, IO is through interrupt in/out endpoints
struct usb_device *udev;
PURB piorw_urb;
u8 io_irp_cnt;
u8 bio_irp_pending;
_sema io_retevt;
_timer io_timer;
u8 bio_irp_timeout;
u8 bio_timer_cancel;
#endif
#endif
#ifdef PLATFORM_OS_XP
#ifdef CONFIG_SDIO_HCI
// below is for io_rwmem...
PMDL pmdl;
PSDBUS_REQUEST_PACKET sdrp;
PSDBUS_REQUEST_PACKET recv_sdrp;
PSDBUS_REQUEST_PACKET xmit_sdrp;
PIRP piorw_irp;
#endif
#ifdef CONFIG_USB_HCI
PURB piorw_urb;
PIRP piorw_irp;
u8 io_irp_cnt;
u8 bio_irp_pending;
_sema io_retevt;
#endif
#endif
};
#ifdef CONFIG_R871X_TEST
int rtw_start_pseudo_adhoc(_adapter *padapter);
int rtw_stop_pseudo_adhoc(_adapter *padapter);
#endif
u8 rtw_init_drv_sw(_adapter *padapter);
u8 rtw_free_drv_sw(_adapter *padapter);
u8 rtw_reset_drv_sw(_adapter *padapter);
u32 rtw_start_drv_threads(_adapter *padapter);
void rtw_stop_drv_threads (_adapter *padapter);
void rtw_cancel_all_timer(_adapter *padapter);
#ifdef PLATFORM_LINUX
int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname);
struct net_device *rtw_init_netdev(_adapter *padapter);
#ifdef CONFIG_PROC_DEBUG
void rtw_proc_init_one(struct net_device *dev);
void rtw_proc_remove_one(struct net_device *dev);
#endif
#endif
void rtw_ips_dev_unload(_adapter *padapter);
#ifdef CONFIG_IPS
int rtw_ips_pwr_up(_adapter *padapter);
void rtw_ips_pwr_down(_adapter *padapter);
#endif
#endif //_OSDEP_INTF_H_

808
drivers/net/wireless/rtl8192c/include/osdep_service.h
View File

@@ -1,808 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __OSDEP_SERVICE_H_
#define __OSDEP_SERVICE_H_
#include <drv_conf.h>
#include <basic_types.h>
//#include <rtl871x_byteorder.h>
#define _SUCCESS 1
#define _FAIL 0
#undef _TRUE
#define _TRUE 1
#undef _FALSE
#define _FALSE 0
#ifdef PLATFORM_LINUX
#include <linux/version.h>
#include <linux/spinlock.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,5))
#include <linux/kref.h>
#endif
#include <linux/smp_lock.h>
#include <linux/netdevice.h>
#include <linux/skbuff.h>
#include <linux/circ_buf.h>
#include <asm/uaccess.h>
#include <asm/byteorder.h>
#include <asm/atomic.h>
#include <asm/io.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26))
#include <asm/semaphore.h>
#else
#include <linux/semaphore.h>
#endif
#include <linux/sem.h>
#include <linux/sched.h>
#include <linux/etherdevice.h>
#include <linux/wireless.h>
#include <net/iw_handler.h>
#include <linux/if_arp.h>
#include <linux/rtnetlink.h>
#include <linux/delay.h>
#include <linux/proc_fs.h> // Necessary because we use the proc fs
#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
#include <linux/in.h>
#include <linux/ip.h>
#include <linux/udp.h>
#endif
#ifdef CONFIG_USB_HCI
#include <linux/usb.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
#include <linux/usb_ch9.h>
#else
#include <linux/usb/ch9.h>
#endif
#endif
#ifdef CONFIG_SDIO_HCI
#include <linux/mmc/sdio_func.h>
#include <linux/mmc/sdio_ids.h>
#endif
#ifdef CONFIG_PCI_HCI
#include <linux/pci.h>
#endif
#ifdef CONFIG_USB_HCI
typedef struct urb * PURB;
#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22))
#ifdef CONFIG_USB_SUSPEND
#define CONFIG_AUTOSUSPEND 1
#endif
#endif
#endif
typedef struct semaphore _sema;
typedef spinlock_t _lock;
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
typedef struct mutex _mutex;
#else
typedef struct semaphore _mutex;
#endif
typedef struct timer_list _timer;
struct __queue {
struct list_head queue;
_lock lock;
};
typedef struct sk_buff _pkt;
typedef unsigned char _buffer;
typedef struct __queue _queue;
typedef struct list_head _list;
typedef int _OS_STATUS;
//typedef u32 _irqL;
typedef unsigned long _irqL;
typedef struct net_device * _nic_hdl;
typedef pid_t _thread_hdl_;
typedef int thread_return;
typedef void* thread_context;
#define thread_exit() complete_and_exit(NULL, 0)
typedef void timer_hdl_return;
typedef void* timer_hdl_context;
typedef struct work_struct _workitem;
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
#endif
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
#define skb_tail_pointer(skb) skb->tail
#endif
__inline static _list *get_next(_list *list)
{
return list->next;
}
__inline static _list *get_list_head(_queue *queue)
{
return (&(queue->queue));
}
#define LIST_CONTAINOR(ptr, type, member) \
((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member)))
__inline static void _enter_critical(_lock *plock, _irqL *pirqL)
{
spin_lock_irqsave(plock, *pirqL);
}
__inline static void _exit_critical(_lock *plock, _irqL *pirqL)
{
spin_unlock_irqrestore(plock, *pirqL);
}
__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL)
{
spin_lock_irqsave(plock, *pirqL);
}
__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL)
{
spin_unlock_irqrestore(plock, *pirqL);
}
__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL)
{
spin_lock_bh(plock);
}
__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL)
{
spin_unlock_bh(plock);
}
__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL)
{
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
mutex_lock(pmutex);
#else
down(pmutex);
#endif
}
__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL)
{
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
mutex_unlock(pmutex);
#else
up(pmutex);
#endif
}
__inline static void rtw_list_delete(_list *plist)
{
list_del_init(plist);
}
__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void* cntx)
{
//setup_timer(ptimer, pfunc,(u32)cntx);
ptimer->function = pfunc;
ptimer->data = (unsigned long)cntx;
init_timer(ptimer);
}
__inline static void _set_timer(_timer *ptimer,u32 delay_time)
{
mod_timer(ptimer , (jiffies+(delay_time*HZ/1000)));
}
__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
{
del_timer_sync(ptimer);
*bcancelled= _TRUE;//TRUE ==1; FALSE==0
}
#ifdef PLATFORM_LINUX
#define RTW_TIMER_HDL_ARGS void *FunctionContext
#elif defined(PLATFORM_OS_CE) || defined(PLATFORM_WINDOWS)
#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3
#endif
#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl
#define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)
{
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
INIT_WORK(pwork, pfunc);
#else
INIT_WORK(pwork, pfunc,pwork);
#endif
}
__inline static void _set_workitem(_workitem *pwork)
{
schedule_work(pwork);
}
//
// Global Mutex: can only be used at PASSIVE level.
//
#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \
{ \
while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\
{ \
atomic_dec((atomic_t *)&(_MutexCounter)); \
msleep(10); \
} \
}
#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \
{ \
atomic_dec((atomic_t *)&(_MutexCounter)); \
}
#endif // PLATFORM_LINUX
#ifdef PLATFORM_OS_XP
#include <ndis.h>
#include <ntddk.h>
#include <ntddsd.h>
#include <ntddndis.h>
#include <ntdef.h>
#ifdef CONFIG_USB_HCI
#include <usb.h>
#include <usbioctl.h>
#include <usbdlib.h>
#endif
typedef KSEMAPHORE _sema;
typedef LIST_ENTRY _list;
typedef NDIS_STATUS _OS_STATUS;
typedef NDIS_SPIN_LOCK _lock;
typedef KMUTEX _mutex;
typedef KIRQL _irqL;
// USB_PIPE for WINCE , but handle can be use just integer under windows
typedef NDIS_HANDLE _nic_hdl;
typedef NDIS_MINIPORT_TIMER _timer;
struct __queue {
LIST_ENTRY queue;
_lock lock;
};
typedef NDIS_PACKET _pkt;
typedef NDIS_BUFFER _buffer;
typedef struct __queue _queue;
typedef PKTHREAD _thread_hdl_;
typedef void thread_return;
typedef void* thread_context;
typedef NDIS_WORK_ITEM _workitem;
#define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS);
#define HZ 10000000
#define SEMA_UPBND (0x7FFFFFFF) //8192
__inline static _list *get_next(_list *list)
{
return list->Flink;
}
__inline static _list *get_list_head(_queue *queue)
{
return (&(queue->queue));
}
#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member)
__inline static _enter_critical(_lock *plock, _irqL *pirqL)
{
NdisAcquireSpinLock(plock);
}
__inline static _exit_critical(_lock *plock, _irqL *pirqL)
{
NdisReleaseSpinLock(plock);
}
__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL)
{
NdisDprAcquireSpinLock(plock);
}
__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL)
{
NdisDprReleaseSpinLock(plock);
}
__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL)
{
NdisDprAcquireSpinLock(plock);
}
__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL)
{
NdisDprReleaseSpinLock(plock);
}
__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL)
{
KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL);
}
__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL)
{
KeReleaseMutex(pmutex, FALSE);
}
__inline static void rtw_list_delete(_list *plist)
{
RemoveEntryList(plist);
InitializeListHead(plist);
}
__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx)
{
NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx);
}
__inline static void _set_timer(_timer *ptimer,u32 delay_time)
{
NdisMSetTimer(ptimer,delay_time);
}
__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
{
NdisMCancelTimer(ptimer,bcancelled);
}
__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)
{
NdisInitializeWorkItem(pwork, pfunc, cntx);
}
__inline static void _set_workitem(_workitem *pwork)
{
NdisScheduleWorkItem(pwork);
}
#define ATOMIC_INIT(i) { (i) }
//
// Global Mutex: can only be used at PASSIVE level.
//
#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \
{ \
while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\
{ \
NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
NdisMSleep(10000); \
} \
}
#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \
{ \
NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
}
#endif // PLATFORM_OS_XP
#ifdef PLATFORM_OS_CE
#include <osdep_ce_service.h>
#endif
#include <rtw_byteorder.h>
#ifndef BIT
#define BIT(x) ( 1 << (x))
#endif
#ifdef DBG_MEM_ALLOC
void rtw_dump_mem_stat (void);
extern u8* dbg_rtw_vmalloc(u32 sz, const char *func, int line);
extern u8* dbg_rtw_zvmalloc(u32 sz, const char *func, int line);
extern void dbg_rtw_vmfree(u8 *pbuf, u32 sz, const char *func, int line);
extern u8* dbg_rtw_malloc(u32 sz, const char *func, int line);
extern u8* dbg_rtw_zmalloc(u32 sz, const char *func, int line);
extern void dbg_rtw_mfree(u8 *pbuf, u32 sz, const char *func, int line);
#define rtw_vmalloc(sz) dbg_rtw_vmalloc((sz), __FUNCTION__, __LINE__)
#define rtw_zvmalloc(sz) dbg_rtw_zvmalloc((sz), __FUNCTION__, __LINE__)
#define rtw_vmfree(pbuf, sz) dbg_rtw_vmfree((pbuf), (sz), __FUNCTION__, __LINE__)
#define rtw_malloc(sz) dbg_rtw_malloc((sz), __FUNCTION__, __LINE__)
#define rtw_zmalloc(sz) dbg_rtw_zmalloc((sz), __FUNCTION__, __LINE__)
#define rtw_mfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), __FUNCTION__, __LINE__)
#else
extern u8* _rtw_vmalloc(u32 sz);
extern u8* _rtw_zvmalloc(u32 sz);
extern void _rtw_vmfree(u8 *pbuf, u32 sz);
extern u8* _rtw_zmalloc(u32 sz);
extern u8* _rtw_malloc(u32 sz);
extern void _rtw_mfree(u8 *pbuf, u32 sz);
#define rtw_vmalloc(sz) _rtw_vmalloc((sz))
#define rtw_zvmalloc(sz) _rtw_zvmalloc((sz))
#define rtw_vmfree(pbuf, sz) _rtw_vmfree((pbuf), (sz))
#define rtw_malloc(sz) _rtw_malloc((sz))
#define rtw_zmalloc(sz) _rtw_zmalloc((sz))
#define rtw_mfree(pbuf, sz) _rtw_mfree((pbuf), (sz))
#endif
extern void _rtw_memcpy(void* dec, void* sour, u32 sz);
extern int _rtw_memcmp(void *dst, void *src, u32 sz);
extern void _rtw_memset(void *pbuf, int c, u32 sz);
extern void _rtw_init_listhead(_list *list);
extern u32 rtw_is_list_empty(_list *phead);
extern void rtw_list_insert_tail(_list *plist, _list *phead);
extern void rtw_list_delete(_list *plist);
extern void _rtw_init_sema(_sema *sema, int init_val);
extern void _rtw_free_sema(_sema *sema);
extern void _rtw_up_sema(_sema *sema);
extern u32 _rtw_down_sema(_sema *sema);
extern void _rtw_mutex_init(_mutex *pmutex);
extern void _rtw_spinlock_init(_lock *plock);
extern void _rtw_spinlock_free(_lock *plock);
extern void _rtw_spinlock(_lock *plock);
extern void _rtw_spinunlock(_lock *plock);
extern void _rtw_spinlock_ex(_lock *plock);
extern void _rtw_spinunlock_ex(_lock *plock);
extern void _rtw_init_queue(_queue *pqueue);
extern u32 _rtw_queue_empty(_queue *pqueue);
extern u32 rtw_end_of_queue_search(_list *queue, _list *pelement);
extern u32 rtw_get_current_time(void);
extern u32 rtw_systime_to_ms(u32 systime);
extern s32 rtw_get_passing_time_ms(u32 start);
extern s32 rtw_get_time_interval_ms(u32 start, u32 end);
extern void rtw_sleep_schedulable(int ms);
extern void rtw_msleep_os(int ms);
extern void rtw_usleep_os(int us);
#ifdef DBG_DELAY_OS
#define rtw_mdelay_os(ms) _rtw_mdelay_os((ms), __FUNCTION__, __LINE__)
#define rtw_udelay_os(ms) _rtw_udelay_os((ms), __FUNCTION__, __LINE__)
extern void _rtw_mdelay_os(int ms, const char *func, const int line);
extern void _rtw_udelay_os(int us, const char *func, const int line);
#else
extern void rtw_mdelay_os(int ms);
extern void rtw_udelay_os(int us);
#endif
__inline static unsigned char _cancel_timer_ex(_timer *ptimer)
{
#ifdef PLATFORM_LINUX
return del_timer_sync(ptimer);
#endif
#ifdef PLATFORM_WINDOWS
u8 bcancelled;
_cancel_timer(ptimer, &bcancelled);
return bcancelled;
#endif
}
__inline static void thread_enter(void *context)
{
#ifdef PLATFORM_LINUX
//struct net_device *pnetdev = (struct net_device *)context;
//daemonize("%s", pnetdev->name);
daemonize("%s", "RTKTHREAD");
allow_signal(SIGTERM);
#endif
}
__inline static void flush_signals_thread(void)
{
#ifdef PLATFORM_LINUX
if (signal_pending (current))
{
flush_signals(current);
}
#endif
}
__inline static _OS_STATUS res_to_status(sint res)
{
#if defined (PLATFORM_LINUX) || defined (PLATFORM_MPIXEL)
return res;
#endif
#ifdef PLATFORM_WINDOWS
if (res == _SUCCESS)
return NDIS_STATUS_SUCCESS;
else
return NDIS_STATUS_FAILURE;
#endif
}
__inline static u32 _RND4(u32 sz)
{
u32 val;
val = ((sz >> 2) + ((sz & 3) ? 1: 0)) << 2;
return val;
}
__inline static u32 _RND8(u32 sz)
{
u32 val;
val = ((sz >> 3) + ((sz & 7) ? 1: 0)) << 3;
return val;
}
__inline static u32 _RND128(u32 sz)
{
u32 val;
val = ((sz >> 7) + ((sz & 127) ? 1: 0)) << 7;
return val;
}
__inline static u32 _RND256(u32 sz)
{
u32 val;
val = ((sz >> 8) + ((sz & 255) ? 1: 0)) << 8;
return val;
}
__inline static u32 _RND512(u32 sz)
{
u32 val;
val = ((sz >> 9) + ((sz & 511) ? 1: 0)) << 9;
return val;
}
__inline static u32 bitshift(u32 bitmask)
{
u32 i;
for (i = 0; i <= 31; i++)
if (((bitmask>>i) & 0x1) == 1) break;
return i;
}
#ifndef MAC_FMT
#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
#endif
#ifndef MAC_ARG
#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
#endif
//#ifdef __GNUC__
#ifdef PLATFORM_LINUX
#define STRUCT_PACKED __attribute__ ((packed))
#else
#define STRUCT_PACKED
#endif
// limitation of path length
#ifdef PLATFORM_LINUX
#define PATH_LENGTH_MAX PATH_MAX
#elif defined(PLATFORM_WINDOWS)
#define PATH_LENGTH_MAX MAX_PATH
#endif
// Suspend lock prevent system from going suspend
#ifdef CONFIG_WAKELOCK
#include <linux/wakelock.h>
#elif defined(CONFIG_ANDROID_POWER)
#include <linux/android_power.h>
#endif
extern void rtw_suspend_lock_init(void);
extern void rtw_suspend_lock_uninit(void);
extern void rtw_lock_suspend(void);
extern void rtw_unlock_suspend(void);
//Atomic integer operations
#ifdef PLATFORM_LINUX
#define ATOMIC_T atomic_t
#elif defined(PLATFORM_WINDOWS)
#define ATOMIC_T LONG
#endif
extern void ATOMIC_SET(ATOMIC_T *v, int i);
extern int ATOMIC_READ(ATOMIC_T *v);
extern void ATOMIC_ADD(ATOMIC_T *v, int i);
extern void ATOMIC_SUB(ATOMIC_T *v, int i);
extern void ATOMIC_INC(ATOMIC_T *v);
extern void ATOMIC_DEC(ATOMIC_T *v);
extern int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i);
extern int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i);
extern int ATOMIC_INC_RETURN(ATOMIC_T *v);
extern int ATOMIC_DEC_RETURN(ATOMIC_T *v);
//File operation APIs, just for linux now
#ifdef PLATFORM_LINUX
extern int openFile(struct file **fpp, char *path,int flag,int mode);
extern int closeFile(struct file *fp);
extern int readFile(struct file *fp,char *buf,int len);
extern int writeFile(struct file *fp,char *buf,int len);
#endif
#if 1 //#ifdef MEM_ALLOC_REFINE_ADAPTOR
struct rtw_netdev_priv_indicator {
void *priv;
u32 sizeof_priv;
};
struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv);
extern struct net_device * rtw_alloc_etherdev(int sizeof_priv);
#define rtw_netdev_priv(netdev) ( ((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv )
extern void rtw_free_netdev(struct net_device * netdev);
#else
#define rtw_alloc_etherdev(sizeof_priv) alloc_etherdev((sizeof_priv))
#define rtw_netdev_priv(netdev) netdev_priv((netdev))
#define rtw_free_netdev(netdev) free_netdev((netdev))
#endif
#ifdef PLATFORM_LINUX
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))
#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1)
#else
#define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1)
#endif
#endif //PLATFORM_LINUX
extern u64 rtw_modular64(u64 x, u64 y);
extern u64 rtw_division64(u64 x, u64 y);
/* Macros for handling unaligned memory accesses */
#define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1]))
#define RTW_PUT_BE16(a, val) \
do { \
(a)[0] = ((u16) (val)) >> 8; \
(a)[1] = ((u16) (val)) & 0xff; \
} while (0)
#define RTW_GET_LE16(a) ((u16) (((a)[1] << 8) | (a)[0]))
#define RTW_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16) (val)) >> 8; \
(a)[0] = ((u16) (val)) & 0xff; \
} while (0)
#define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \
((u32) (a)[2]))
#define RTW_PUT_BE24(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[2] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \
(((u32) (a)[2]) << 8) | ((u32) (a)[3]))
#define RTW_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \
(((u32) (a)[1]) << 8) | ((u32) (a)[0]))
#define RTW_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \
(((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \
(((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \
(((u64) (a)[6]) << 8) | ((u64) (a)[7]))
#define RTW_PUT_BE64(a, val) \
do { \
(a)[0] = (u8) (((u64) (val)) >> 56); \
(a)[1] = (u8) (((u64) (val)) >> 48); \
(a)[2] = (u8) (((u64) (val)) >> 40); \
(a)[3] = (u8) (((u64) (val)) >> 32); \
(a)[4] = (u8) (((u64) (val)) >> 24); \
(a)[5] = (u8) (((u64) (val)) >> 16); \
(a)[6] = (u8) (((u64) (val)) >> 8); \
(a)[7] = (u8) (((u64) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \
(((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \
(((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \
(((u64) (a)[1]) << 8) | ((u64) (a)[0]))
#endif

168
drivers/net/wireless/rtl8192c/include/pci_hal.h
View File

@@ -1,168 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PCI_HAL_H__
#define __PCI_HAL_H__
#define INTEL_VENDOR_ID 0x8086
#define SIS_VENDOR_ID 0x1039
#define ATI_VENDOR_ID 0x1002
#define ATI_DEVICE_ID 0x7914
#define AMD_VENDOR_ID 0x1022
#define PCI_MAX_BRIDGE_NUMBER 255
#define PCI_MAX_DEVICES 32
#define PCI_MAX_FUNCTION 8
#define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address
#define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data
#define PCI_CLASS_BRIDGE_DEV 0x06
#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04
#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10
#define U1DONTCARE 0xFF
#define U2DONTCARE 0xFFFF
#define U4DONTCARE 0xFFFFFFFF
#define PCI_VENDER_ID_REALTEK 0x10ec
#define HAL_HW_PCI_8180_DEVICE_ID 0x8180
#define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b
#define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b
#define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b
#define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190
#define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E
#define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E
#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE
#define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE
#define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab
#define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE
#define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron
#define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga
#define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga
#define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga
#define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga
#define HAL_HW_PCI_700F_DEVICE_ID 0x700F
#define HAL_HW_PCI_701F_DEVICE_ID 0x701F
#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191 //8192ce
#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178 //8192ce
#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177 //8192ce
#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176 //8192ce
#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191 //8192ce
#define HAL_HW_PCI_8192DE_DEVICE_ID 0x8193 //8192de
#define HAL_HW_PCI_002B_DEVICE_ID 0x002B //8192de, provided by HW SD
#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8192SE 0x10
#define HAL_HW_PCI_REVISION_ID_8192CE 0x1
#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8192DE 0x0
#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers
enum pci_bridge_vendor {
PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001
PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010
PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100
PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000
PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000
PCI_BRIDGE_VENDOR_MAX ,//= 0x80
} ;
struct rt_pci_capabilities_header {
u8 capability_id;
u8 next;
};
struct pci_priv{
u8 linkctrl_reg;
u8 busnumber;
u8 devnumber;
u8 funcnumber;
u8 pcibridge_busnum;
u8 pcibridge_devnum;
u8 pcibridge_funcnum;
u8 pcibridge_vendor;
u16 pcibridge_vendorid;
u16 pcibridge_deviceid;
u8 pcibridge_pciehdr_offset;
u8 pcibridge_linkctrlreg;
u8 amd_l1_patch;
};
typedef struct _RT_ISR_CONTENT
{
union{
u32 IntArray[2];
u32 IntReg4Byte;
u16 IntReg2Byte;
};
}RT_ISR_CONTENT, *PRT_ISR_CONTENT;
//#define RegAddr(addr) (addr + 0xB2000000UL)
//some platform macros will def here
static inline void NdisRawWritePortUlong(u32 port, u32 val)
{
outl(val, port);
//writel(val, (u8 *)RegAddr(port));
}
static inline void NdisRawWritePortUchar(u32 port, u8 val)
{
outb(val, port);
//writeb(val, (u8 *)RegAddr(port));
}
static inline void NdisRawReadPortUchar(u32 port, u8 *pval)
{
*pval = inb(port);
//*pval = readb((u8 *)RegAddr(port));
}
static inline void NdisRawReadPortUshort(u32 port, u16 *pval)
{
*pval = inw(port);
//*pval = readw((u8 *)RegAddr(port));
}
static inline void NdisRawReadPortUlong(u32 port, u32 *pval)
{
*pval = inl(port);
//*pval = readl((u8 *)RegAddr(port));
}
#ifdef CONFIG_RTL8192C
void rtl8192ce_set_hal_ops(_adapter * padapter);
#endif
#ifdef CONFIG_RTL8192D
void rtl8192de_set_hal_ops(_adapter * padapter);
#endif
#endif //__PCIE_HAL_H__

58
drivers/net/wireless/rtl8192c/include/pci_ops.h
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@@ -1,58 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PCI_OPS_H_
#define __PCI_OPS_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#ifdef CONFIG_RTL8192C
u32 rtl8192ce_init_desc_ring(_adapter * padapter);
u32 rtl8192ce_free_desc_ring(_adapter * padapter);
void rtl8192ce_reset_desc_ring(_adapter * padapter);
#ifdef CONFIG_64BIT_DMA
u8 PlatformEnable92CEDMA64(PADAPTER Adapter);
#endif
int rtl8192ce_interrupt(PADAPTER Adapter);
void rtl8192ce_xmit_tasklet(void *priv);
void rtl8192ce_recv_tasklet(void *priv);
void rtl8192ce_prepare_bcn_tasklet(void *priv);
void rtl8192ce_set_intf_ops(struct _io_ops *pops);
#endif
#ifdef CONFIG_RTL8192D
u32 rtl8192de_init_desc_ring(_adapter * padapter);
u32 rtl8192de_free_desc_ring(_adapter * padapter);
void rtl8192de_reset_desc_ring(_adapter * padapter);
#ifdef CONFIG_64BIT_DMA
u8 PlatformEnable92DEDMA64(PADAPTER Adapter);
#endif
int rtl8192de_interrupt(PADAPTER Adapter);
void rtl8192de_xmit_tasklet(void *priv);
void rtl8192de_recv_tasklet(void *priv);
void rtl8192de_prepare_bcn_tasklet(void *priv);
void rtl8192de_set_intf_ops(struct _io_ops *pops);
u32 MpReadPCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u8 Direct);
void MpWritePCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u32 Value, IN u8 Direct);
#endif
#endif

33
drivers/net/wireless/rtl8192c/include/pci_osintf.h
View File

@@ -1,33 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PCI_OSINTF_H
#define __PCI_OSINTF_H
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
void rtw_pci_disable_aspm(_adapter *padapter);
void rtw_pci_enable_aspm(_adapter *padapter);
#endif

58
drivers/net/wireless/rtl8192c/include/recv_osdep.h
View File

@@ -1,58 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RECV_OSDEP_H_
#define __RECV_OSDEP_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
extern sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter);
extern void _rtw_free_recv_priv (struct recv_priv *precvpriv);
extern s32 rtw_recv_entry(union recv_frame *precv_frame);
extern int rtw_recv_indicatepkt(_adapter *adapter, union recv_frame *precv_frame);
extern void rtw_recv_returnpacket(IN _nic_hdl cnxt, IN _pkt *preturnedpkt);
extern void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame);
extern void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup);
int rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter);
void rtw_free_recv_priv (struct recv_priv *precvpriv);
int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter);
int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe);
void rtw_os_recv_resource_free(struct recv_priv *precvpriv);
int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf);
int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf);
void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf);
void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl);
#endif //

98
drivers/net/wireless/rtl8192c/include/rtl8192c_cmd.h
View File

@@ -1,98 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192C_CMD_H_
#define __RTL8192C_CMD_H_
enum cmd_msg_element_id
{
NONE_CMDMSG_EID,
AP_OFFLOAD_EID=0,
SET_PWRMODE_EID=1,
JOINBSS_RPT_EID=2,
RSVD_PAGE_EID=3,
RSSI_4_EID = 4,
RSSI_SETTING_EID=5,
MACID_CONFIG_EID=6,
MACID_PS_MODE_EID=7,
P2P_PS_OFFLOAD_EID=8,
SELECTIVE_SUSPEND_ROF_CMD=9,
P2P_PS_CTW_CMD_EID=32,
MAX_CMDMSG_EID
};
struct cmd_msg_parm {
u8 eid; //element id
u8 sz; // sz
u8 buf[6];
};
typedef struct _SETPWRMODE_PARM{
u8 Mode;
u8 SmartPS;
u8 BcnPassTime; // unit: 100ms
}SETPWRMODE_PARM, *PSETPWRMODE_PARM;
struct H2C_SS_RFOFF_PARAM{
u8 ROFOn; // 1: on, 0:off
u16 gpio_period; // unit: 1024 us
}__attribute__ ((packed));
typedef struct JOINBSSRPT_PARM{
u8 OpMode; // RT_MEDIA_STATUS
}JOINBSSRPT_PARM, *PJOINBSSRPT_PARM;
typedef struct _RSVDPAGE_LOC{
u8 LocProbeRsp;
u8 LocPsPoll;
u8 LocNullData;
}RSVDPAGE_LOC, *PRSVDPAGE_LOC;
struct P2P_PS_Offload_t {
unsigned char Offload_En:1;
unsigned char role:1; // 1: Owner, 0: Client
unsigned char CTWindow_En:1;
unsigned char NoA0_En:1;
unsigned char NoA1_En:1;
unsigned char AllStaSleep:1; // Only valid in Owner
unsigned char discovery:1;
unsigned char rsvd:1;
};
struct P2P_PS_CTWPeriod_t {
unsigned char CTWPeriod; //TU
};
// host message to firmware cmd
void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode);
void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus);
u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param);
u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg);
void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg);
u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter*padapter,u8 bfwpoll, u16 period);
#ifdef CONFIG_P2P
void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state);
#endif //CONFIG_P2P
#endif

608
drivers/net/wireless/rtl8192c/include/rtl8192c_dm.h
View File

@@ -1,608 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192C_DM_H__
#define __RTL8192C_DM_H__
//============================================================
// Description:
//
// This file is for 92CE/92CU dynamic mechanism only
//
//
//============================================================
#define RSSI_CCK 0
#define RSSI_OFDM 1
#define OFDM_TABLE_SIZE 37
#define CCK_TABLE_SIZE 33
static u32 OFDMSwingTable[OFDM_TABLE_SIZE] = {
0x7f8001fe, // 0, +6.0dB
0x788001e2, // 1, +5.5dB
0x71c001c7, // 2, +5.0dB
0x6b8001ae, // 3, +4.5dB
0x65400195, // 4, +4.0dB
0x5fc0017f, // 5, +3.5dB
0x5a400169, // 6, +3.0dB
0x55400155, // 7, +2.5dB
0x50800142, // 8, +2.0dB
0x4c000130, // 9, +1.5dB
0x47c0011f, // 10, +1.0dB
0x43c0010f, // 11, +0.5dB
0x40000100, // 12, +0dB
0x3c8000f2, // 13, -0.5dB
0x390000e4, // 14, -1.0dB
0x35c000d7, // 15, -1.5dB
0x32c000cb, // 16, -2.0dB
0x300000c0, // 17, -2.5dB
0x2d4000b5, // 18, -3.0dB
0x2ac000ab, // 19, -3.5dB
0x288000a2, // 20, -4.0dB
0x26000098, // 21, -4.5dB
0x24000090, // 22, -5.0dB
0x22000088, // 23, -5.5dB
0x20000080, // 24, -6.0dB
0x1e400079, // 25, -6.5dB
0x1c800072, // 26, -7.0dB
0x1b00006c, // 27. -7.5dB
0x19800066, // 28, -8.0dB
0x18000060, // 29, -8.5dB
0x16c0005b, // 30, -9.0dB
0x15800056, // 31, -9.5dB
0x14400051, // 32, -10.0dB
0x1300004c, // 33, -10.5dB
0x12000048, // 34, -11.0dB
0x11000044, // 35, -11.5dB
0x10000040, // 36, -12.0dB
};
static u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB
};
static u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB
};
//============================================================
// structure and define
//============================================================
typedef struct _FALSE_ALARM_STATISTICS{
u32 Cnt_Parity_Fail;
u32 Cnt_Rate_Illegal;
u32 Cnt_Crc8_fail;
u32 Cnt_Mcs_fail;
u32 Cnt_Ofdm_fail;
u32 Cnt_Cck_fail;
u32 Cnt_all;
u32 Cnt_Fast_Fsync;
u32 Cnt_SB_Search_fail;
}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
typedef struct _Dynamic_Power_Saving_
{
u8 PreCCAState;
u8 CurCCAState;
u8 PreRFState;
u8 CurRFState;
s32 Rssi_val_min;
}PS_T;
typedef struct _Dynamic_Initial_Gain_Threshold_
{
u8 Dig_Enable_Flag;
u8 Dig_Ext_Port_Stage;
int RssiLowThresh;
int RssiHighThresh;
u32 FALowThresh;
u32 FAHighThresh;
u8 CurSTAConnectState;
u8 PreSTAConnectState;
u8 CurMultiSTAConnectState;
u8 PreIGValue;
u8 CurIGValue;
char BackoffVal;
char BackoffVal_range_max;
char BackoffVal_range_min;
u8 rx_gain_range_max;
u8 rx_gain_range_min;
u8 Rssi_val_min;
u8 PreCCKPDState;
u8 CurCCKPDState;
u8 PreCCKFAState;
u8 CurCCKFAState;
u8 PreCCAState;
u8 CurCCAState;
u8 LargeFAHit;
u8 ForbiddenIGI;
u32 Recover_cnt;
}DIG_T;
typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition
{
DIG_TYPE_THRESH_HIGH = 0,
DIG_TYPE_THRESH_LOW = 1,
DIG_TYPE_BACKOFF = 2,
DIG_TYPE_RX_GAIN_MIN = 3,
DIG_TYPE_RX_GAIN_MAX = 4,
DIG_TYPE_ENABLE = 5,
DIG_TYPE_DISABLE = 6,
DIG_OP_TYPE_MAX
}DM_DIG_OP_E;
typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition
{
CCK_PD_STAGE_LowRssi = 0,
CCK_PD_STAGE_HighRssi = 1,
CCK_PD_STAGE_MAX = 3,
}DM_CCK_PDTH_E;
typedef enum tag_1R_CCA_Type_Definition
{
CCA_1R =0,
CCA_2R = 1,
CCA_MAX = 2,
}DM_1R_CCA_E;
typedef enum tag_RF_Type_Definition
{
RF_Save =0,
RF_Normal = 1,
RF_MAX = 2,
}DM_RF_E;
typedef enum tag_DIG_EXT_PORT_ALGO_Definition
{
DIG_EXT_PORT_STAGE_0 = 0,
DIG_EXT_PORT_STAGE_1 = 1,
DIG_EXT_PORT_STAGE_2 = 2,
DIG_EXT_PORT_STAGE_3 = 3,
DIG_EXT_PORT_STAGE_MAX = 4,
}DM_DIG_EXT_PORT_ALG_E;
typedef enum tag_DIG_Connect_Definition
{
DIG_STA_DISCONNECT = 0,
DIG_STA_CONNECT = 1,
DIG_STA_BEFORE_CONNECT = 2,
DIG_MultiSTA_DISCONNECT = 3,
DIG_MultiSTA_CONNECT = 4,
DIG_CONNECT_MAX
}DM_DIG_CONNECT_E;
typedef enum _BT_Ant_NUM{
Ant_x2 = 0,
Ant_x1 = 1
} BT_Ant_NUM, *PBT_Ant_NUM;
typedef enum _BT_CoType{
BT_2Wire = 0,
BT_ISSC_3Wire = 1,
BT_Accel = 2,
BT_CSR_BC4 = 3,
BT_CSR_BC8 = 4,
BT_RTL8756 = 5,
} BT_CoType, *PBT_CoType;
typedef enum _BT_CurState{
BT_OFF = 0,
BT_ON = 1,
} BT_CurState, *PBT_CurState;
typedef enum _BT_ServiceType{
BT_SCO = 0,
BT_A2DP = 1,
BT_HID = 2,
BT_HID_Idle = 3,
BT_Scan = 4,
BT_Idle = 5,
BT_OtherAction = 6,
BT_Busy = 7,
BT_OtherBusy = 8,
BT_PAN = 9,
} BT_ServiceType, *PBT_ServiceType;
typedef enum _BT_RadioShared{
BT_Radio_Shared = 0,
BT_Radio_Individual = 1,
} BT_RadioShared, *PBT_RadioShared;
struct btcoexist_priv {
u8 BT_Coexist;
u8 BT_Ant_Num;
u8 BT_CoexistType;
u8 BT_State;
u8 BT_CUR_State; //0:on, 1:off
u8 BT_Ant_isolation; //0:good, 1:bad
u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic
u8 BT_Service;
u8 BT_Ampdu; // 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU.
u8 BT_RadioSharedType;
u32 Ratio_Tx;
u32 Ratio_PRI;
u8 BtRfRegOrigin1E;
u8 BtRfRegOrigin1F;
u8 BtRssiState;
u32 BtEdcaUL;
u32 BtEdcaDL;
u32 BT_EDCA[2];
u8 bCOBT;
u8 bInitSet;
u8 bBTBusyTraffic;
u8 bBTTrafficModeSet;
u8 bBTNonTrafficModeSet;
//BTTraffic BT21TrafficStatistics;
u32 CurrentState;
u32 PreviousState;
u8 BtPreRssiState;
u8 bFWCoexistAllOff;
u8 bSWCoexistAllOff;
};
#define BW_AUTO_SWITCH_HIGH_LOW 25
#define BW_AUTO_SWITCH_LOW_HIGH 30
#define DM_DIG_THRESH_HIGH 40
#define DM_DIG_THRESH_LOW 35
#define DM_FALSEALARM_THRESH_LOW 400
#define DM_FALSEALARM_THRESH_HIGH 1000
#define DM_DIG_MAX 0x3e
#define DM_DIG_MIN 0x1e //0x22//0x1c
#define DM_DIG_FA_UPPER 0x32
#define DM_DIG_FA_LOWER 0x20
#define DM_DIG_FA_TH0 0x20
#define DM_DIG_FA_TH1 0x100
#define DM_DIG_FA_TH2 0x200
#define DM_DIG_BACKOFF_MAX 12
#define DM_DIG_BACKOFF_MIN (-4)
#define DM_DIG_BACKOFF_DEFAULT 10
#define RxPathSelection_SS_TH_low 30
#define RxPathSelection_diff_TH 18
#define DM_RATR_STA_INIT 0
#define DM_RATR_STA_HIGH 1
#define DM_RATR_STA_MIDDLE 2
#define DM_RATR_STA_LOW 3
#define CTSToSelfTHVal 30
#define RegC38_TH 20
#define WAIotTHVal 25
//Dynamic Tx Power Control Threshold
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
#define TxHighPwrLevel_Normal 0
#define TxHighPwrLevel_Level1 1
#define TxHighPwrLevel_Level2 2
#define TxHighPwrLevel_BT1 3
#define TxHighPwrLevel_BT2 4
#define DM_Type_ByFW 0
#define DM_Type_ByDriver 1
typedef struct _RATE_ADAPTIVE
{
u8 RateAdaptiveDisabled;
u8 RATRState;
u16 reserve;
u32 HighRSSIThreshForRA;
u32 High2LowRSSIThreshForRA;
u8 Low2HighRSSIThreshForRA40M;
u32 LowRSSIThreshForRA40M;
u8 Low2HighRSSIThreshForRA20M;
u32 LowRSSIThreshForRA20M;
u32 UpperRSSIThresholdRATR;
u32 MiddleRSSIThresholdRATR;
u32 LowRSSIThresholdRATR;
u32 LowRSSIThresholdRATR40M;
u32 LowRSSIThresholdRATR20M;
u8 PingRSSIEnable; //cosa add for Netcore long range ping issue
u32 PingRSSIRATR; //cosa add for Netcore long range ping issue
u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue
u32 LastRATR;
u8 PreRATRState;
} RATE_ADAPTIVE, *PRATE_ADAPTIVE;
typedef enum tag_SW_Antenna_Switch_Definition
{
Antenna_B = 1,
Antenna_A = 2,
Antenna_MAX = 3,
}DM_SWAS_E;
#ifdef CONFIG_ANTENNA_DIVERSITY
// This indicates two different the steps.
// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air.
// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK
// with original RSSI to determine if it is necessary to switch antenna.
#define SWAW_STEP_PEAK 0
#define SWAW_STEP_DETERMINE 1
#define TP_MODE 0
#define RSSI_MODE 1
#define TRAFFIC_LOW 0
#define TRAFFIC_HIGH 1
typedef struct _SW_Antenna_Switch_
{
u8 try_flag;
s32 PreRSSI;
u8 CurAntenna;
u8 PreAntenna;
u8 RSSI_Trying;
u8 TestMode;
u8 bTriggerAntennaSwitch;
u8 SelectAntennaMap;
// Before link Antenna Switch check
u8 SWAS_NoLink_State;
}SWAT_T;
#endif
struct dm_priv
{
u8 DM_Type;
u8 DMFlag, DMFlag_tmp;
//for DIG
u8 bDMInitialGainEnable;
u8 binitialized; // for dm_initial_gain_Multi_STA use.
DIG_T DM_DigTable;
PS_T DM_PSTable;
FALSE_ALARM_STATISTICS FalseAlmCnt;
//for rate adaptive, in fact, 88c/92c fw will handle this
u8 bUseRAMask;
RATE_ADAPTIVE RateAdaptive;
//* Upper and Lower Signal threshold for Rate Adaptive*/
int UndecoratedSmoothedPWDB;
int UndecoratedSmoothedCCK;
int EntryMinUndecoratedSmoothedPWDB;
int EntryMaxUndecoratedSmoothedPWDB;
//for High Power
u8 bDynamicTxPowerEnable;
u8 LastDTPLvl;
u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06
//for tx power tracking
//u8 bTXPowerTracking;
u8 TXPowercount;
u8 bTXPowerTrackingInit;
u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default
u8 TM_Trigger;
u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
u8 ThermalValue;
u8 ThermalValue_LCK;
u8 ThermalValue_IQK;
u8 ThermalValue_DPK;
u8 bRfPiEnable;
//for APK
u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a
u8 bAPKdone;
u8 bAPKThermalMeterIgnore;
u8 bDPdone;
u8 bDPPathAOK;
u8 bDPPathBOK;
//for IQK
u32 RegC04;
u32 Reg874;
u32 RegC08;
u32 RegB68;
u32 RegB6C;
u32 Reg870;
u32 Reg860;
u32 Reg864;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
u8 PowerIndex_backup[6];
u8 bCCKinCH14;
char CCK_index;
char OFDM_index[2];
BOOLEAN bDoneTxpower;
char CCK_index_HP;
char OFDM_index_HP[2];
u8 ThermalValue_HP[HP_THERMAL_NUM];
u8 ThermalValue_HP_index;
//for TxPwrTracking
int RegE94;
int RegE9C;
int RegEB4;
int RegEBC;
u32 TXPowerTrackingCallbackCnt; //cosa add for debug
u32 prv_traffic_idx; // edca turbo
// for dm_RF_Saving
u8 initialize;
u32 rf_saving_Reg874;
u32 rf_saving_RegC70;
u32 rf_saving_Reg85C;
u32 rf_saving_RegA74;
//for Antenna diversity
#ifdef CONFIG_ANTENNA_DIVERSITY
SWAT_T DM_SWAT_Table;
#endif
#ifdef CONFIG_SW_ANTENNA_DIVERSITY
_timer SwAntennaSwitchTimer;
u64 lastTxOkCnt;
u64 lastRxOkCnt;
u64 TXByteCnt_A;
u64 TXByteCnt_B;
u64 RXByteCnt_A;
u64 RXByteCnt_B;
u8 DoubleComfirm;
u8 TrafficLoad;
#endif
s32 OFDM_Pkt_Cnt;
u8 RSSI_Select;
u8 DIG_Dynamic_MIN ;
// Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas
u8 INIDATA_RATE[32];
};
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}
//============================================================
// function prototype
//============================================================
void rtl8192c_init_dm_priv(IN PADAPTER Adapter);
void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter);
void rtl8192c_InitHalDm(IN PADAPTER Adapter);
void rtl8192c_HalDmWatchDog(IN PADAPTER Adapter);
VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter);
void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal);
#ifdef CONFIG_BT_COEXIST
void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart);
void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir);
#endif
#ifdef CONFIG_SW_ANTENNA_DIVERSITY
void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll);
void SwAntDivRestAfterLink8192C(IN PADAPTER Adapter);
#endif
#ifdef CONFIG_ANTENNA_DIVERSITY
void SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter);
#endif
#endif //__HAL8190PCIDM_H__

29
drivers/net/wireless/rtl8192c/include/rtl8192c_event.h
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@@ -1,29 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL8192C_EVENT_H_
#define _RTL8192C_EVENT_H_
#endif

879
drivers/net/wireless/rtl8192c/include/rtl8192c_hal.h
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@@ -1,879 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192C_HAL_H__
#define __RTL8192C_HAL_H__
#include "rtl8192c_spec.h"
#include "Hal8192CPhyReg.h"
#include "Hal8192CPhyCfg.h"
#include "rtl8192c_rf.h"
#include "rtl8192c_dm.h"
#include "rtl8192c_recv.h"
#include "rtl8192c_xmit.h"
#include "rtl8192c_cmd.h"
#ifdef SILENT_RESET_FOR_SPECIFIC_PLATFOM
#include "rtl8192c_sreset.h"
#endif
#ifdef CONFIG_PCI_HCI
#include "Hal8192CEHWImg.h"
#define RTL819X_DEFAULT_RF_TYPE RF_2T2R
//#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
#define RTL819X_TOTAL_RF_PATH 2
//2TODO: The following need to check!!
#define RTL8192C_FW_TSMC_IMG "rtl8192CE\\rtl8192cfwT.bin"
#define RTL8192C_FW_UMC_IMG "rtl8192CE\\rtl8192cfwU.bin"
#define RTL8192C_FW_UMC_B_IMG "rtl8192CE\\rtl8192cfwU_B.bin"
#define RTL8188C_PHY_REG "rtl8192CE\\PHY_REG_1T.txt"
#define RTL8188C_PHY_RADIO_A "rtl8192CE\\radio_a_1T.txt"
#define RTL8188C_PHY_RADIO_B "rtl8192CE\\radio_b_1T.txt"
#define RTL8188C_AGC_TAB "rtl8192CE\\AGC_TAB_1T.txt"
#define RTL8188C_PHY_MACREG "rtl8192CE\\MACREG_1T.txt"
#define RTL8192C_PHY_REG "rtl8192CE\\PHY_REG_2T.txt"
#define RTL8192C_PHY_RADIO_A "rtl8192CE\\radio_a_2T.txt"
#define RTL8192C_PHY_RADIO_B "rtl8192CE\\radio_b_2T.txt"
#define RTL8192C_AGC_TAB "rtl8192CE\\AGC_TAB_2T.txt"
#define RTL8192C_PHY_MACREG "rtl8192CE\\MACREG_2T.txt"
#define RTL819X_PHY_MACPHY_REG "rtl8192CE\\MACPHY_reg.txt"
#define RTL819X_PHY_MACPHY_REG_PG "rtl8192CE\\MACPHY_reg_PG.txt"
#define RTL819X_PHY_MACREG "rtl8192CE\\MAC_REG.txt"
#define RTL819X_PHY_REG "rtl8192CE\\PHY_REG.txt"
#define RTL819X_PHY_REG_1T2R "rtl8192CE\\PHY_REG_1T2R.txt"
#define RTL819X_PHY_REG_to1T1R "rtl8192CE\\phy_to1T1R_a.txt"
#define RTL819X_PHY_REG_to1T2R "rtl8192CE\\phy_to1T2R.txt"
#define RTL819X_PHY_REG_to2T2R "rtl8192CE\\phy_to2T2R.txt"
#define RTL819X_PHY_REG_PG "rtl8192CE\\PHY_REG_PG.txt"
#define RTL819X_AGC_TAB "rtl8192CE\\AGC_TAB.txt"
#define RTL819X_PHY_RADIO_A "rtl8192CE\\radio_a.txt"
#define RTL819X_PHY_RADIO_A_1T "rtl8192CE\\radio_a_1t.txt"
#define RTL819X_PHY_RADIO_A_2T "rtl8192CE\\radio_a_2t.txt"
#define RTL819X_PHY_RADIO_B "rtl8192CE\\radio_b.txt"
#define RTL819X_PHY_RADIO_B_GM "rtl8192CE\\radio_b_gm.txt"
#define RTL819X_PHY_RADIO_C "rtl8192CE\\radio_c.txt"
#define RTL819X_PHY_RADIO_D "rtl8192CE\\radio_d.txt"
#define RTL819X_EEPROM_MAP "rtl8192CE\\8192ce.map"
#define RTL819X_EFUSE_MAP "rtl8192CE\\8192ce.map"
//---------------------------------------------------------------------
// RTL8723E From file
//---------------------------------------------------------------------
#define RTL8723_FW_UMC_IMG "rtl8723E\\rtl8723fw.bin"
#define RTL8723_PHY_REG "rtl8723E\\PHY_REG_1T.txt"
#define RTL8723_PHY_RADIO_A "rtl8723E\\radio_a_1T.txt"
#define RTL8723_PHY_RADIO_B "rtl8723E\\radio_b_1T.txt"
#define RTL8723_AGC_TAB "rtl8723E\\AGC_TAB_1T.txt"
#define RTL8723_PHY_MACREG "rtl8723E\\MAC_REG.txt"
#define RTL8723_PHY_MACREG "rtl8723E\\MAC_REG.txt"
#define RTL8723_PHY_REG_PG "rtl8723E\\PHY_REG_PG.txt"
#define RTL8723_PHY_REG_MP "rtl8723E\\PHY_REG_MP.txt"
// The file name "_2T" is for 92CE, "_1T" is for 88CE. Modified by tynli. 2009.11.24.
#define Rtl819XFwTSMCImageArray Rtl8192CEFwTSMCImgArray
#define Rtl819XFwUMCACutImageArray Rtl8192CEFwUMCACutImgArray
#define Rtl819XFwUMCBCutImageArray Rtl8192CEFwUMCBCutImgArray
#define Rtl8723FwUMCImageArray Rtl8192CEFwUMC8723ImgArray
#define Rtl819XMAC_Array Rtl8192CEMAC_2T_Array
#define Rtl819XAGCTAB_2TArray Rtl8192CEAGCTAB_2TArray
#define Rtl819XAGCTAB_1TArray Rtl8192CEAGCTAB_1TArray
#define Rtl819XPHY_REG_2TArray Rtl8192CEPHY_REG_2TArray
#define Rtl819XPHY_REG_1TArray Rtl8192CEPHY_REG_1TArray
#define Rtl819XRadioA_2TArray Rtl8192CERadioA_2TArray
#define Rtl819XRadioA_1TArray Rtl8192CERadioA_1TArray
#define Rtl819XRadioB_2TArray Rtl8192CERadioB_2TArray
#define Rtl819XRadioB_1TArray Rtl8192CERadioB_1TArray
#define Rtl819XPHY_REG_Array_PG Rtl8192CEPHY_REG_Array_PG
#define Rtl819XPHY_REG_Array_MP Rtl8192CEPHY_REG_Array_MP
#elif defined(CONFIG_USB_HCI)
#include "Hal8192CUHWImg.h"
//2TODO: We should define 8192S firmware related macro settings here!!
#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
#define RTL819X_TOTAL_RF_PATH 2
//TODO: The following need to check!!
#define RTL8192C_FW_TSMC_IMG "rtl8192CU\\rtl8192cfwT.bin"
#define RTL8192C_FW_UMC_IMG "rtl8192CU\\rtl8192cfwU.bin"
#define RTL8192C_FW_UMC_B_IMG "rtl8192CU\\rtl8192cfwU_B.bin"
//#define RTL819X_FW_BOOT_IMG "rtl8192CU\\boot.img"
//#define RTL819X_FW_MAIN_IMG "rtl8192CU\\main.img"
//#define RTL819X_FW_DATA_IMG "rtl8192CU\\data.img"
#define RTL8188C_PHY_REG "rtl8188CU\\PHY_REG.txt"
#define RTL8188C_PHY_RADIO_A "rtl8188CU\\radio_a.txt"
#define RTL8188C_PHY_RADIO_B "rtl8188CU\\radio_b.txt"
#define RTL8188C_PHY_RADIO_A_mCard "rtl8192CU\\radio_a_1T_mCard.txt"
#define RTL8188C_PHY_RADIO_B_mCard "rtl8192CU\\radio_b_1T_mCard.txt"
#define RTL8188C_PHY_RADIO_A_HP "rtl8192CU\\radio_a_1T_HP.txt"
#define RTL8188C_AGC_TAB "rtl8188CU\\AGC_TAB.txt"
#define RTL8188C_PHY_MACREG "rtl8188CU\\MACREG.txt"
#define RTL8192C_PHY_REG "rtl8192CU\\PHY_REG.txt"
#define RTL8192C_PHY_RADIO_A "rtl8192CU\\radio_a.txt"
#define RTL8192C_PHY_RADIO_B "rtl8192CU\\radio_b.txt"
#define RTL8192C_AGC_TAB "rtl8192CU\\AGC_TAB.txt"
#define RTL8192C_PHY_MACREG "rtl8192CU\\MACREG.txt"
#define RTL819X_PHY_REG_PG "rtl8192CU\\PHY_REG_PG.txt"
//---------------------------------------------------------------------
// RTL8723U From file
//---------------------------------------------------------------------
#define RTL8723_FW_UMC_IMG "rtl8723U\\rtl8723fw.bin"
#define RTL8723_PHY_REG "rtl8723U\\PHY_REG_1T.txt"
#define RTL8723_PHY_RADIO_A "rtl8723U\\radio_a_1T.txt"
#define RTL8723_PHY_RADIO_B "rtl8723U\\radio_b_1T.txt"
#define RTL8723_AGC_TAB "rtl8723U\\AGC_TAB_1T.txt"
#define RTL8723_PHY_MACREG "rtl8723U\\MAC_REG.txt"
#define RTL8723_PHY_MACREG "rtl8723U\\MAC_REG.txt"
#define RTL8723_PHY_REG_PG "rtl8723U\\PHY_REG_PG.txt"
#define RTL8723_PHY_REG_MP "rtl8723U\\PHY_REG_MP.txt"
// The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24.
#define Rtl819XFwImageArray Rtl8192CUFwTSMCImgArray
#define Rtl819XFwTSMCImageArray Rtl8192CUFwTSMCImgArray
#define Rtl819XFwUMCACutImageArray Rtl8192CUFwUMCACutImgArray
#define Rtl819XFwUMCBCutImageArray Rtl8192CUFwUMCBCutImgArray
#define Rtl819XMAC_Array Rtl8192CUMAC_2T_Array
#define Rtl819XAGCTAB_2TArray Rtl8192CUAGCTAB_2TArray
#define Rtl819XAGCTAB_1TArray Rtl8192CUAGCTAB_1TArray
#define Rtl819XAGCTAB_1T_HPArray Rtl8192CUAGCTAB_1T_HPArray
#define Rtl819XPHY_REG_2TArray Rtl8192CUPHY_REG_2TArray
#define Rtl819XPHY_REG_1TArray Rtl8192CUPHY_REG_1TArray
#define Rtl819XPHY_REG_1T_mCardArray Rtl8192CUPHY_REG_1T_mCardArray
#define Rtl819XPHY_REG_2T_mCardArray Rtl8192CUPHY_REG_2T_mCardArray
#define Rtl819XPHY_REG_1T_HPArray Rtl8192CUPHY_REG_1T_HPArray
#define Rtl819XRadioA_2TArray Rtl8192CURadioA_2TArray
#define Rtl819XRadioA_1TArray Rtl8192CURadioA_1TArray
#define Rtl819XRadioA_1T_mCardArray Rtl8192CURadioA_1T_mCardArray
#define Rtl819XRadioB_2TArray Rtl8192CURadioB_2TArray
#define Rtl819XRadioB_1TArray Rtl8192CURadioB_1TArray
#define Rtl819XRadioB_1T_mCardArray Rtl8192CURadioB_1T_mCardArray
#define Rtl819XRadioA_1T_HPArray Rtl8192CURadioA_1T_HPArray
#define Rtl819XPHY_REG_Array_PG Rtl8192CUPHY_REG_Array_PG
#define Rtl819XPHY_REG_Array_PG_mCard Rtl8192CUPHY_REG_Array_PG_mCard
#define Rtl819XPHY_REG_Array_PG_HP Rtl8192CUPHY_REG_Array_PG_HP
#define Rtl819XPHY_REG_Array_MP Rtl8192CUPHY_REG_Array_MP
#endif
#define DRVINFO_SZ 4 // unit is 8bytes
#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
#define FW_8192C_SIZE 16384+32//16k
#define FW_8192C_START_ADDRESS 0x1000
#define FW_8192C_END_ADDRESS 0x3FFF
#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes
#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300)
typedef enum _FIRMWARE_SOURCE{
FW_SOURCE_IMG_FILE = 0,
FW_SOURCE_HEADER_FILE = 1, //from header file
}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
typedef struct _RT_FIRMWARE{
FIRMWARE_SOURCE eFWSource;
#ifdef CONFIG_EMBEDDED_FWIMG
u8* szFwBuffer;
#else
u8 szFwBuffer[FW_8192C_SIZE];
#endif
u32 ulFwLength;
}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92C, *PRT_FIRMWARE_92C;
//
// This structure must be cared byte-ordering
//
// Added by tynli. 2009.12.04.
typedef struct _RT_8192C_FIRMWARE_HDR {//8-byte alinment required
//--- LONG WORD 0 ----
u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
u8 Category; // AP/NIC and USB/PCI
u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
u16 Version; // FW Version
u8 Subversion; // FW Subversion, default 0x00
u16 Rsvd1;
//--- LONG WORD 1 ----
u8 Month; // Release time Month field
u8 Date; // Release time Date field
u8 Hour; // Release time Hour field
u8 Minute; // Release time Minute field
u16 RamCodeSize; // The size of RAM code
u16 Rsvd2;
//--- LONG WORD 2 ----
u32 SvnIdx; // The SVN entry index
u32 Rsvd3;
//--- LONG WORD 3 ----
u32 Rsvd4;
u32 Rsvd5;
}RT_8192C_FIRMWARE_HDR, *PRT_8192C_FIRMWARE_HDR;
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
#ifdef CONFIG_USB_RX_AGGREGATION
typedef enum _USB_RX_AGG_MODE{
USB_RX_AGG_DISABLE,
USB_RX_AGG_DMA,
USB_RX_AGG_USB,
USB_RX_AGG_MIX
}USB_RX_AGG_MODE;
#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer
#endif
#define TX_SELE_HQ BIT(0) // High Queue
#define TX_SELE_LQ BIT(1) // Low Queue
#define TX_SELE_NQ BIT(2) // Normal Queue
// Note: We will divide number of page equally for each queue other than public queue!
#define TX_TOTAL_PAGE_NUMBER 0xF8
#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1)
// For Normal Chip Setting
// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
#define NORMAL_PAGE_NUM_PUBQ 0xE7
#define NORMAL_PAGE_NUM_HPQ 0x0C
#define NORMAL_PAGE_NUM_LPQ 0x02
#define NORMAL_PAGE_NUM_NPQ 0x02
// For Test Chip Setting
// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
#define TEST_PAGE_NUM_PUBQ 0x7E
// For Test Chip Setting
#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5
#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
#define WMM_TEST_PAGE_NUM_PUBQ 0xA3
#define WMM_TEST_PAGE_NUM_HPQ 0x29
#define WMM_TEST_PAGE_NUM_LPQ 0x29
//Note: For Normal Chip Setting ,modify later
#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5
#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
#define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0
#define WMM_NORMAL_PAGE_NUM_HPQ 0x29
#define WMM_NORMAL_PAGE_NUM_LPQ 0x1C
#define WMM_NORMAL_PAGE_NUM_NPQ 0x1C
//-------------------------------------------------------------------------
// Chip specific
//-------------------------------------------------------------------------
#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
#define CHIP_BONDING_92C_1T2R 0x1
#define CHIP_BONDING_88C_USB_MCARD 0x2
#define CHIP_BONDING_88C_USB_HP 0x1
//
// 2011.01.06. Define new structure of chip version for RTL8723 and so on. Added by tynli.
//
/*
| BIT15:12 | BIT11:8 | BIT 7 | BIT6:4 | BIT3 | BIT2:0 |
|-------------+-----------+-----------+-------+-----------+-------|
| IC version(CUT) | ROM version | Manufacturer | RF type | Chip type | IC Type |
| | | TSMC/UMC | | TEST/NORMAL| |
*/
// [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3
// [7] Manufacturer: TSMC=0, UMC=1
// [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2
// [3] Chip type: TEST=0, NORMAL=1
// [2:0] IC type: 81xxC=0, 8723=1, 92D=2
#define CHIP_8723 BIT(0)
#define CHIP_92D BIT(1)
#define NORMAL_CHIP BIT(3)
#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6)))
#define RF_TYPE_1T2R BIT(4)
#define RF_TYPE_2T2R BIT(5)
#define CHIP_VENDOR_UMC BIT(7)
#define B_CUT_VERSION BIT(12)
#define C_CUT_VERSION BIT(13)
#define D_CUT_VERSION ((BIT(13)|BIT(14)))
// MASK
#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2))
#define CHIP_TYPE_MASK BIT(3)
#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6))
#define MANUFACTUER_MASK BIT(7)
#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8))
#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12))
// Get element
#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK)
#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK)
#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK)
#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK)
#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK)
#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK)
#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0)? _TRUE : _FALSE)
#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723)? _TRUE : _FALSE)
#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_92D)? _TRUE : _FALSE)
#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version))? _FALSE : _TRUE)
#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? _TRUE : _FALSE)
#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? _TRUE : _FALSE)
#define IS_NORMAL_CHIP(version) ((GET_CVID_CHIP_TYPE(version))? _TRUE: _FALSE)
#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version))? _TRUE: _FALSE)
#define IS_81XXC_TEST_CHIP(version) ((IS_81XXC(version) && (!IS_NORMAL_CHIP(version)))? _TRUE: _FALSE)
#define IS_92D_TEST_CHIP(version) ((IS_92D(version) && (!IS_NORMAL_CHIP(version)))? _TRUE: _FALSE)
#define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? _TRUE : _FALSE)
#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE)
#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE)
// <tynli_Note> 88/92C UMC B-cut vendor is set to TSMC so we need to check CHIP_VENDOR_UMC bit is not 1.
#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? _TRUE : _FALSE):_FALSE)
#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? _TRUE: _FALSE) : _FALSE)
#define IS_92D_C_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == 0x2) ? _TRUE : _FALSE) : _FALSE)
#define IS_92D_D_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == 0x3) ? _TRUE : _FALSE) : _FALSE)
typedef enum _VERSION_8192C{
VERSION_TEST_CHIP_88C = 0x0000,
VERSION_TEST_CHIP_92C = 0x0020,
VERSION_TEST_UMC_CHIP_8723 = 0x0081,
VERSION_NORMAL_TSMC_CHIP_88C = 0x0008,
VERSION_NORMAL_TSMC_CHIP_92C = 0x0028,
VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018,
VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088,
VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8,
VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098,
VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089,
VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089,
VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088,
VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8,
VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090,
VERSION_TEST_CHIP_92D_SINGLEPHY= 0x0022,
VERSION_TEST_CHIP_92D_DUALPHY = 0x0002,
VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x002a,
VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a,
VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a,
VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a,
VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a,
VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a,
}VERSION_8192C,*PVERSION_8192C;
//-------------------------------------------------------------------------
// Channel Plan
//-------------------------------------------------------------------------
enum ChannelPlan{
CHPL_FCC = 0,
CHPL_IC = 1,
CHPL_ETSI = 2,
CHPL_SPAIN = 3,
CHPL_FRANCE = 4,
CHPL_MKK = 5,
CHPL_MKK1 = 6,
CHPL_ISRAEL = 7,
CHPL_TELEC = 8,
CHPL_GLOBAL = 9,
CHPL_WORLD = 10,
};
typedef struct _TxPowerInfo{
u8 CCKIndex[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT40_1SIndex[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT40_2SIndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT20IndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 OFDMIndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT40MaxOffset[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT20MaxOffset[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 TSSI_A;
u8 TSSI_B;
}TxPowerInfo, *PTxPowerInfo;
#define EFUSE_REAL_CONTENT_LEN 512
#define EFUSE_MAP_LEN 128
#define EFUSE_MAX_SECTION 16
#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02.
#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN)
//
// <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
// 9bytes + 1byt + 5bytes and pre 1byte.
// For worst case:
// | 1byte|----8bytes----|1byte|--5bytes--|
// | | Reserved(14bytes) |
//
#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte.
#define EFUSE_MAP_LEN_8723 256
#define EFUSE_MAX_SECTION_8723 32
//========================================================
// EFUSE for BT definition
//========================================================
#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3
#define EFUSE_BT_MAP_LEN 1024 // 1k bytes
#define EFUSE_BT_MAX_SECTION 128 // 1024/8
#define EFUSE_PROTECT_BYTES_BANK 16
//
// <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06.
//
typedef enum _RT_MULTI_FUNC{
RT_MULTI_FUNC_NONE = 0x00,
RT_MULTI_FUNC_WIFI = 0x01,
RT_MULTI_FUNC_BT = 0x02,
RT_MULTI_FUNC_GPS = 0x04,
}RT_MULTI_FUNC,*PRT_MULTI_FUNC;
//
// <Roger_Notes> For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08.
//
typedef enum _RT_POLARITY_CTL{
RT_POLARITY_LOW_ACT = 0,
RT_POLARITY_HIGH_ACT = 1,
}RT_POLARITY_CTL,*PRT_POLARITY_CTL;
// For RTL8723 regulator mode. by tynli. 2011.01.14.
typedef enum _RT_REGULATOR_MODE{
RT_SWITCHING_REGULATOR = 0,
RT_LDO_REGULATOR = 1,
}RT_REGULATOR_MODE,*PRT_REGULATOR_MODE;
#ifdef CONFIG_PCI_HCI
struct hal_data_8192ce
{
VERSION_8192C VersionID;
RT_MULTI_FUNC MultiFunc; // For multi-function consideration.
RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control.
RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO
u16 CustomerID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
u32 IntrMask[2];
u32 IntrMaskToSet[2];
u32 DisabledFunctions;
//current WIFI_PHY values
u32 ReceiveConfig;
u32 TransmitConfig;
WIRELESS_MODE CurrentWirelessMode;
HT_CHANNEL_WIDTH CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;// Control channel sub-carrier
u16 BasicRateSet;
//rf_ctrl
_lock rf_lock;
u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
INTERFACE_SELECT_8192CPCIe InterfaceSel;
//
// EEPROM setting.
//
u16 EEPROMVID;
u16 EEPROMDID;
u16 EEPROMSVID;
u16 EEPROMSMID;
u16 EEPROMChannelPlan;
u16 EEPROMVersion;
u8 EEPROMChnlAreaTxPwrCCK[2][3];
u8 EEPROMChnlAreaTxPwrHT40_1S[2][3];
u8 EEPROMChnlAreaTxPwrHT40_2SDiff[2][3];
u8 EEPROMPwrLimitHT20[3];
u8 EEPROMPwrLimitHT40[3];
u8 bTXPowerDataReadFromEEPORM;
u8 EEPROMThermalMeter;
u8 EEPROMTSSI[2];
u8 EEPROMCustomerID;
u8 EEPROMBoardType;
u8 EEPROMRegulatory;
u8 bDefaultAntenna;
u8 bIQKInitialized;
u8 TxPwrLevelCck[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 TxPwrLevelHT40_1S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrLevelHT40_2S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrHt20Diff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
u8 TxPwrLegacyHtDiff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
// For power group
u8 PwrGroupHT20[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff
#ifdef CONFIG_BT_COEXIST
struct btcoexist_priv bt_coexist;
#endif
// Read/write are allow for following hardware information variables
u8 framesync;
u32 framesyncC34;
u8 framesyncMonitor;
u8 DefaultInitialGain[4];
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[7][16];
u32 CCKTxPowerLevelOriginalOffset;
u32 AntennaTxPath; // Antenna path Tx
u32 AntennaRxPath; // Antenna path Rx
u8 BluetoothCoexist;
u8 ExternalPA;
//u32 LedControlNum;
//u32 LedControlMode;
u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16.
//u32 TxPowerTrackControl;
u8 b1x1RecvCombine; // for 1T1R receive combining
u8 bCurrentTurboEDCA;
u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo.
//vivi, for tx power tracking, 20080407
//u16 TSSI_13dBm;
//u32 Pwr_Track;
// The current Tx Power Level
u8 CurrentCckTxPwrIdx;
u8 CurrentOfdm24GTxPwrIdx;
BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now.
u32 RfRegChnlVal[2];
u8 bCckHighPower;
//RDG enable
BOOLEAN bRDGEnable;
//for host message to fw
u8 LastHMEBoxNum;
u8 fw_ractrl;
u8 RegTxPause;
// Beacon function related global variable.
u32 RegBcnCtrlVal;
u8 RegFwHwTxQCtrl;
u8 RegReg542;
u8 CurAntenna;
u8 AntDivCfg;
#ifdef CONFIG_SW_ANTENNA_DIVERSITY
//SW Antenna Switch
s32 RSSI_sum_A;
s32 RSSI_sum_B;
s32 RSSI_cnt_A;
s32 RSSI_cnt_B;
BOOLEAN RSSI_test;
#endif
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
//Hybrid Antenna Diversity
u32 CCK_Ant1_Cnt;
u32 CCK_Ant2_Cnt;
u32 OFDM_Ant1_Cnt;
u32 OFDM_Ant2_Cnt;
#endif
struct dm_priv dmpriv;
u8 bDumpRxPkt;//for debug
#ifdef SILENT_RESET_FOR_SPECIFIC_PLATFOM
struct sreset_priv srestpriv;
#endif
u8 bInterruptMigration;
u8 bDisableTxInt;
u8 bGpioHwWpsPbc;
u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
u16 EfuseUsedBytes;
#ifdef CONFIG_P2P
struct P2P_PS_Offload_t p2p_ps_offload;
#endif //CONFIG_P2P
};
typedef struct hal_data_8192ce HAL_DATA_TYPE, *PHAL_DATA_TYPE;
//
// Function disabled.
//
#define DF_TX_BIT BIT0
#define DF_RX_BIT BIT1
#define DF_IO_BIT BIT2
#define DF_IO_D3_BIT BIT3
#define RT_DF_TYPE u32
#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits)))
#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits))))
#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE)
void InterruptRecognized8192CE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent);
VOID UpdateInterruptMask8192CE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR);
#endif
#ifdef CONFIG_USB_HCI
struct hal_data_8192cu
{
VERSION_8192C VersionID;
RT_MULTI_FUNC MultiFunc; // For multi-function consideration.
RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control.
RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO
u16 CustomerID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
//current WIFI_PHY values
u32 ReceiveConfig;
WIRELESS_MODE CurrentWirelessMode;
HT_CHANNEL_WIDTH CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;// Control channel sub-carrier
u16 BasicRateSet;
//rf_ctrl
u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
u8 BoardType;
//INTERFACE_SELECT_8192CUSB InterfaceSel;
//
// EEPROM setting.
//
u16 EEPROMVID;
u16 EEPROMPID;
u16 EEPROMSVID;
u16 EEPROMSDID;
u8 EEPROMCustomerID;
u8 EEPROMSubCustomerID;
u8 EEPROMVersion;
u8 EEPROMRegulatory;
u8 bTXPowerDataReadFromEEPORM;
u8 EEPROMThermalMeter;
u8 bIQKInitialized;
u8 TxPwrLevelCck[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 TxPwrLevelHT40_1S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrLevelHT40_2S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrHt20Diff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
u8 TxPwrLegacyHtDiff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
// For power group
u8 PwrGroupHT20[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff
// Read/write are allow for following hardware information variables
u8 framesync;
u32 framesyncC34;
u8 framesyncMonitor;
u8 DefaultInitialGain[4];
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[7][16];
u32 CCKTxPowerLevelOriginalOffset;
u32 AntennaTxPath; // Antenna path Tx
u32 AntennaRxPath; // Antenna path Rx
u8 BluetoothCoexist;
u8 ExternalPA;
u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16.
//u32 LedControlNum;
//u32 LedControlMode;
//u32 TxPowerTrackControl;
u8 b1x1RecvCombine; // for 1T1R receive combining
u8 bCurrentTurboEDCA;
u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo.
//vivi, for tx power tracking, 20080407
//u16 TSSI_13dBm;
//u32 Pwr_Track;
// The current Tx Power Level
u8 CurrentCckTxPwrIdx;
u8 CurrentOfdm24GTxPwrIdx;
BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now.
u32 RfRegChnlVal[2];
u8 bCckHighPower;
//RDG enable
BOOLEAN bRDGEnable;
//for host message to fw
u8 LastHMEBoxNum;
u8 fw_ractrl;
u8 RegTxPause;
// Beacon function related global variable.
u32 RegBcnCtrlVal;
u8 RegFwHwTxQCtrl;
u8 RegReg542;
struct dm_priv dmpriv;
#ifdef SILENT_RESET_FOR_SPECIFIC_PLATFOM
struct sreset_priv srestpriv;
#endif
#ifdef CONFIG_BT_COEXIST
struct btcoexist_priv bt_coexist;
#endif
u8 CurAntenna;
u8 AntDivCfg;
#ifdef CONFIG_SW_ANTENNA_DIVERSITY
//SW Antenna Switch
s32 RSSI_sum_A;
s32 RSSI_sum_B;
s32 RSSI_cnt_A;
s32 RSSI_cnt_B;
BOOLEAN RSSI_test;
#endif
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
//Hybrid Antenna Diversity
u32 CCK_Ant1_Cnt;
u32 CCK_Ant2_Cnt;
u32 OFDM_Ant1_Cnt;
u32 OFDM_Ant2_Cnt;
#endif
u8 bDumpRxPkt;//for debug
u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
// 2010/08/09 MH Add CU power down mode.
BOOLEAN pwrdown;
// For 92C USB endpoint setting
//
u32 UsbBulkOutSize;
int RtBulkOutPipe[3];
int RtBulkInPipe;
int RtIntInPipe;
// Add for dual MAC 0--Mac0 1--Mac1
u32 interfaceIndex;
u8 OutEpQueueSel;
u8 OutEpNumber;
u8 Queue2EPNum[8];//for out endpoint number mapping
#ifdef CONFIG_USB_TX_AGGREGATION
u8 UsbTxAggMode;
u8 UsbTxAggDescNum;
#endif
#ifdef CONFIG_USB_RX_AGGREGATION
u16 HwRxPageSize; // Hardware setting
u32 MaxUsbRxAggBlock;
USB_RX_AGG_MODE UsbRxAggMode;
u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed
u8 UsbRxAggBlockTimeout;
u8 UsbRxAggPageCount; // 8192C DMA page count
u8 UsbRxAggPageTimeout;
#endif
// 2010/12/10 MH Add for USB aggreation mode dynamic shceme.
BOOLEAN UsbRxHighSpeedMode;
// 2010/11/22 MH Add for slim combo debug mode selective.
// This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock.
BOOLEAN SlimComboDbg;
u16 EfuseUsedBytes;
#ifdef CONFIG_P2P
struct P2P_PS_Offload_t p2p_ps_offload;
#endif //CONFIG_P2P
};
typedef struct hal_data_8192cu HAL_DATA_TYPE, *PHAL_DATA_TYPE;
#endif
#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData))
#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type)
#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
VOID rtl8192c_FirmwareSelfReset(IN PADAPTER Adapter);
int FirmwareDownload92C(IN PADAPTER Adapter);
VOID InitializeFirmwareVars92C(PADAPTER Adapter);
u8 GetEEPROMSize8192C(PADAPTER Adapter);
RT_CHANNEL_DOMAIN _HalMapChannelPlan8192C(PADAPTER Adapter, u8 HalChannelPlan);
VERSION_8192C rtl8192c_ReadChipVersion(IN PADAPTER Adapter);
void rtl8192c_ReadBluetoothCoexistInfo(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
void rtl8192c_HalSetBrateCfg(PADAPTER Adapter, u8 *mBratesOS, u16 *pBrateCfg);
//void rtl8192c_free_hal_data(_adapter * padapter);
VOID rtl8192c_EfuseParseIDCode(PADAPTER pAdapter, u8 *hwinfo);
void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc);
#endif

43
drivers/net/wireless/rtl8192c/include/rtl8192c_led.h
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@@ -1,43 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192C_LED_H_
#define __RTL8192C_LED_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
//================================================================================
// Interface to manipulate LED objects.
//================================================================================
#ifdef CONFIG_USB_HCI
void rtl8192cu_InitSwLeds(_adapter *padapter);
void rtl8192cu_DeInitSwLeds(_adapter *padapter);
#endif
#ifdef CONFIG_PCI_HCI
void rtl8192ce_gen_RefreshLedState(PADAPTER Adapter);
void rtl8192ce_InitSwLeds(_adapter *padapter);
void rtl8192ce_DeInitSwLeds(_adapter *padapter);
#endif
#endif

182
drivers/net/wireless/rtl8192c/include/rtl8192c_recv.h
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@@ -1,182 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL8192C_RECV_H_
#define _RTL8192C_RECV_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#ifdef PLATFORM_OS_XP
#define NR_RECVBUFF (16)
#elif defined(PLATFORM_OS_CE)
#define NR_RECVBUFF (4)
#else
#ifdef CONFIG_SPECIFIC_URB_NUM
#define NR_RECVBUFF (1)
#else
#define NR_RECVBUFF (4)
#endif
#define NR_PREALLOC_RECV_SKB (8)
#endif
#define RECV_BLK_SZ 512
#define RECV_BLK_CNT 16
#define RECV_BLK_TH RECV_BLK_CNT
#if defined(CONFIG_USB_HCI)
#ifdef PLATFORM_OS_CE
#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k
#else
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
//#define MAX_RECVBUF_SZ (32768) // 32k
//#define MAX_RECVBUF_SZ (16384) //16K
//#define MAX_RECVBUF_SZ (10240) //10K
#define MAX_RECVBUF_SZ (15360) // 15k < 16k
//#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k
#else
#define MAX_RECVBUF_SZ (4000) // about 4K
#endif
#endif
#elif defined(CONFIG_PCI_HCI)
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#define MAX_RECVBUF_SZ (9100)
#else
#define MAX_RECVBUF_SZ (4000) // about 4K
#endif
#define RX_MPDU_QUEUE 0
#define RX_CMD_QUEUE 1
#define RX_MAX_QUEUE 2
#endif
#define RECV_BULK_IN_ADDR 0x80
#define RECV_INT_IN_ADDR 0x81
#define PHY_RSSI_SLID_WIN_MAX 100
#define PHY_LINKQUALITY_SLID_WIN_MAX 20
struct phy_stat
{
unsigned int phydw0;
unsigned int phydw1;
unsigned int phydw2;
unsigned int phydw3;
unsigned int phydw4;
unsigned int phydw5;
unsigned int phydw6;
unsigned int phydw7;
};
typedef struct _Phy_OFDM_Rx_Status_Report_8192cd
{
unsigned char trsw_gain_X[4];
unsigned char pwdb_all;
unsigned char cfosho_X[4];
unsigned char cfotail_X[4];
unsigned char rxevm_X[2];
unsigned char rxsnr_X[4];
unsigned char pdsnr_X[2];
unsigned char csi_current_X[2];
unsigned char csi_target_X[2];
unsigned char sigevm;
unsigned char max_ex_pwr;
//#ifdef RTL8192SE
#ifdef CONFIG_LITTLE_ENDIAN
unsigned char ex_intf_flg:1;
unsigned char sgi_en:1;
unsigned char rxsc:2;
//unsigned char rsvd:4;
unsigned char idle_long:1;
unsigned char r_ant_train_en:1;
unsigned char ANTSELB:1;
unsigned char ANTSEL:1;
#else // _BIG_ENDIAN_
//unsigned char rsvd:4;
unsigned char ANTSEL:1;
unsigned char ANTSELB:1;
unsigned char r_ant_train_en:1;
unsigned char idle_long:1;
unsigned char rxsc:2;
unsigned char sgi_en:1;
unsigned char ex_intf_flg:1;
#endif
//#else // RTL8190, RTL8192E
// unsigned char sgi_en;
// unsigned char rxsc_sgien_exflg;
//#endif
} __attribute__ ((packed))PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD;
typedef struct _Phy_CCK_Rx_Status_Report_8192cd
{
/* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend
0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */
u8 adc_pwdb_X[4];
u8 SQ_rpt;
u8 cck_agc_rpt;
} PHY_STS_CCK_8192CD_T;
// Rx smooth factor
#define Rx_Smooth_Factor (20)
#ifdef CONFIG_USB_HCI
typedef struct _INTERRUPT_MSG_FORMAT_EX{
unsigned int C2H_MSG0;
unsigned int C2H_MSG1;
unsigned int C2H_MSG2;
unsigned int C2H_MSG3;
unsigned int HISR; // from HISR Reg0x124, read to clear
unsigned int HISRE;// from HISRE Reg0x12c, read to clear
unsigned int MSG_EX;
}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX;
void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
int rtl8192cu_init_recv_priv(_adapter * padapter);
void rtl8192cu_free_recv_priv(_adapter * padapter);
void rtl8192cu_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat);
#endif
#ifdef CONFIG_PCI_HCI
int rtl8192ce_init_recv_priv(_adapter * padapter);
void rtl8192ce_free_recv_priv(_adapter * padapter);
void rtl8192ce_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat);
#endif
void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat);
void rtl8192c_process_phy_info(_adapter *padapter, void *prframe);
#endif

93
drivers/net/wireless/rtl8192c/include/rtl8192c_rf.h
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@@ -1,93 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/******************************************************************************
*
*
* Module: rtl8192c_rf.h ( Header File)
*
* Note: Collect every HAL RF type exter API or constant.
*
* Function:
*
* Export:
*
* Abbrev:
*
* History:
* Data Who Remark
*
* 09/25/2008 MHC Create initial version.
*
*
******************************************************************************/
#ifndef _RTL8192C_RF_H_
#define _RTL8192C_RF_H_
/* Check to see if the file has been included already. */
/*--------------------------Define Parameters-------------------------------*/
//
// For RF 6052 Series
//
#define RF6052_MAX_TX_PWR 0x3F
#define RF6052_MAX_REG 0x3F
#define RF6052_MAX_PATH 2
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*--------------------------Exported Function prototype---------------------*/
//
// RF RL6052 Series API
//
void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter,
IN u16 DataRate);
void rtl8192c_PHY_RF6052SetBandwidth(
IN PADAPTER Adapter,
IN HT_CHANNEL_WIDTH Bandwidth);
VOID rtl8192c_PHY_RF6052SetCckTxPower(
IN PADAPTER Adapter,
IN u8* pPowerlevel);
VOID rtl8192c_PHY_RF6052SetOFDMTxPower(
IN PADAPTER Adapter,
IN u8* pPowerLevel,
IN u8 Channel);
int PHY_RF6052_Config8192C( IN PADAPTER Adapter );
/*--------------------------Exported Function prototype---------------------*/
#endif/* End of HalRf.h */

1898
drivers/net/wireless/rtl8192c/include/rtl8192c_spec.h
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54
drivers/net/wireless/rtl8192c/include/rtl8192c_sreset.h
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@@ -1,54 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL8192C_SRESET_C_
#define _RTL8192C_SRESET_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#ifdef SILENT_RESET_FOR_SPECIFIC_PLATFOM
#define WIFI_STATUS_SUCCESS 0
#define USB_VEN_REQ_CMD_FAIL BIT0
#define USB_READ_PORT_FAIL BIT1
#define USB_WRITE_PORT_FAIL BIT2
#define WIFI_MAC_TXDMA_ERROR BIT3
#define WIFI_TX_HANG BIT4
#define WIFI_RX_HANG BIT5
#define WIFI_IF_NOT_EXIST BIT6
struct sreset_priv {
_mutex silentreset_mutex;
u8 silent_reset_inprogress;
u8 Wifi_Error_Status;
unsigned long last_tx_time;
unsigned long last_tx_complete_time;
};
extern void rtl8192c_sreset_init_value(_adapter *padapter);
extern void rtl8192c_sreset_reset_value(_adapter *padapter);
extern void rtl8192c_silentreset_for_specific_platform(_adapter *padapter);
extern void rtl8192c_sreset_xmit_status_check(_adapter *padapter);
extern void rtl8192c_sreset_linked_status_check(_adapter *padapter);
extern u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter);
#endif
#endif

91
drivers/net/wireless/rtl8192c/include/rtl8192c_xmit.h
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@@ -1,91 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL8192C_XMIT_H_
#define _RTL8192C_XMIT_H_
#define VO_QUEUE_INX 0
#define VI_QUEUE_INX 1
#define BE_QUEUE_INX 2
#define BK_QUEUE_INX 3
#define BCN_QUEUE_INX 4
#define MGT_QUEUE_INX 5
#define HIGH_QUEUE_INX 6
#define TXCMD_QUEUE_INX 7
#define HW_QUEUE_ENTRY 8
//
// Queue Select Value in TxDesc
//
#define QSLT_BK 0x2//0x01
#define QSLT_BE 0x0
#define QSLT_VI 0x5//0x4
#define QSLT_VO 0x7//0x6
#define QSLT_BEACON 0x10
#define QSLT_HIGH 0x11
#define QSLT_MGNT 0x12
#define QSLT_CMD 0x13
#ifdef CONFIG_USB_HCI
#ifdef CONFIG_USB_TX_AGGREGATION
#define MAX_TX_AGG_PACKET_NUMBER 0xFF
#endif
s32 rtl8192cu_init_xmit_priv(_adapter * padapter);
void rtl8192cu_free_xmit_priv(_adapter * padapter);
void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc);
s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
void rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
#ifdef CONFIG_HOSTAPD_MLME
s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
#endif
#endif
#ifdef CONFIG_PCI_HCI
s32 rtl8192ce_init_xmit_priv(_adapter * padapter);
void rtl8192ce_free_xmit_priv(_adapter * padapter);
s32 rtl8192ce_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf);
struct xmit_buf *rtl8192ce_dequeue_xmitbuf(struct rtw_tx_ring *ring);
void rtl8192ce_xmitframe_resume(_adapter *padapter);
void rtl8192ce_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
s32 rtl8192ce_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
#ifdef CONFIG_HOSTAPD_MLME
s32 rtl8192ce_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
#endif
#endif
#endif

103
drivers/net/wireless/rtl8192c/include/rtl8192d_cmd.h
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@@ -1,103 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192D_CMD_H_
#define __RTL8192D_CMD_H_
//--------------------------------------------
//3 Host Message Box
//--------------------------------------------
// User Define Message [31:8]
//_SETPWRMODE_PARM
#define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
//JOINBSSRPT_PARM
#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
//_RSVDPAGE_LOC
#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
//P2P_PS_OFFLOAD
struct P2P_PS_Offload_t {
unsigned char Offload_En:1;
unsigned char role:1; // 1: Owner, 0: Client
unsigned char CTWindow_En:1;
unsigned char NoA0_En:1;
unsigned char NoA1_En:1;
unsigned char AllStaSleep:1; // Only valid in Owner
unsigned char discovery:1;
unsigned char rsvd:1;
};
#define SET_H2CCMD_P2P_PS_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_CTW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value)
// Description: Determine the types of H2C commands that are the same in driver and Fw.
// Fisrt constructed by tynli. 2009.10.09.
typedef enum _RTL8192D_H2C_CMD
{
H2C_AP_OFFLOAD = 0, /*0*/
H2C_SETPWRMODE = 1, /*1*/
H2C_JOINBSSRPT = 2, /*2*/
H2C_RSVDPAGE = 3,
H2C_RSSI_REPORT = 5,
H2C_RA_MASK = 6,
H2C_P2P_PS_OFFLOAD = 8,
H2C_MAC_MODE_SEL = 9,
H2C_PWRM=15,
H2C_P2P_PS_CTW_CMD = 24,
H2C_CMD_MAX
}RTL8192D_H2C_CMD;
struct cmd_msg_parm {
u8 eid; //element id
u8 sz; // sz
u8 buf[6];
};
void FillH2CCmd92D(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer);
// host message to firmware cmd
void rtl8192d_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode);
void rtl8192d_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus);
u8 rtl8192d_set_rssi_cmd(_adapter*padapter, u8 *param);
u8 rtl8192d_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg);
void rtl8192d_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg);
#ifdef CONFIG_P2P
void rtl8192d_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state);
#endif //CONFIG_P2P
#endif

471
drivers/net/wireless/rtl8192c/include/rtl8192d_dm.h
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@@ -1,471 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192D_DM_H__
#define __RTL8192D_DM_H__
//============================================================
// Description:
//
// This file is for 92CE/92CU dynamic mechanism only
//
//
//============================================================
//============================================================
// Global var
//============================================================
static u32 EDCAParam[maxAP][3] =
{ // UL DL
{0x5ea322, 0x00a630, 0x00a44f}, //atheros AP
{0x5ea32b, 0x5ea42b, 0x5e4322}, //broadcom AP
{0x5ea430, 0x5ea630, 0xa430}, //cisco AP
{0x5ea44f, 0x00a44f, 0x5ea42b}, //marvell AP
{0x5ea422, 0x00a44f, 0x00a44f}, //ralink AP
//{0x5ea44f, 0x5ea44f, 0x5ea44f}, //realtek AP
{0xa44f, 0x5ea44f, 0x5e431c}, //realtek AP
{0x5ea42b, 0xa630, 0x5e431c}, //airgocap AP
{0x5ea42b, 0x5ea42b, 0x5ea42b}, //unknown AP
// {0x5e4322, 0x00a44f, 0x5ea44f}, //unknown AP
};
#define OFDM_TABLE_SIZE 37
#define OFDM_TABLE_SIZE_92D 43
#define CCK_TABLE_SIZE 33
static u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
0x7f8001fe, // 0, +6.0dB
0x788001e2, // 1, +5.5dB
0x71c001c7, // 2, +5.0dB
0x6b8001ae, // 3, +4.5dB
0x65400195, // 4, +4.0dB
0x5fc0017f, // 5, +3.5dB
0x5a400169, // 6, +3.0dB
0x55400155, // 7, +2.5dB
0x50800142, // 8, +2.0dB
0x4c000130, // 9, +1.5dB
0x47c0011f, // 10, +1.0dB
0x43c0010f, // 11, +0.5dB
0x40000100, // 12, +0dB
0x3c8000f2, // 13, -0.5dB
0x390000e4, // 14, -1.0dB
0x35c000d7, // 15, -1.5dB
0x32c000cb, // 16, -2.0dB
0x300000c0, // 17, -2.5dB
0x2d4000b5, // 18, -3.0dB
0x2ac000ab, // 19, -3.5dB
0x288000a2, // 20, -4.0dB
0x26000098, // 21, -4.5dB
0x24000090, // 22, -5.0dB
0x22000088, // 23, -5.5dB
0x20000080, // 24, -6.0dB
0x1e400079, // 25, -6.5dB
0x1c800072, // 26, -7.0dB
0x1b00006c, // 27. -7.5dB
0x19800066, // 28, -8.0dB
0x18000060, // 29, -8.5dB
0x16c0005b, // 30, -9.0dB
0x15800056, // 31, -9.5dB
0x14400051, // 32, -10.0dB
0x1300004c, // 33, -10.5dB
0x12000048, // 34, -11.0dB
0x11000044, // 35, -11.5dB
0x10000040, // 36, -12.0dB
0x0f00003c,// 37, -12.5dB
0x0e400039,// 38, -13.0dB
0x0d800036,// 39, -13.5dB
0x0cc00033,// 40, -14.0dB
0x0c000030,// 41, -14.5dB
0x0b40002d,// 42, -15.0dB
};
static u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB
};
static u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB
};
//============================================================
// structure and define
//============================================================
typedef struct _FALSE_ALARM_STATISTICS{
u32 Cnt_Parity_Fail;
u32 Cnt_Rate_Illegal;
u32 Cnt_Crc8_fail;
u32 Cnt_Mcs_fail;
u32 Cnt_Fast_Fsync_fail;
u32 Cnt_SB_Search_fail;
u32 Cnt_Ofdm_fail;
u32 Cnt_Cck_fail;
u32 Cnt_all;
}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
typedef struct _Dynamic_Power_Saving_
{
u8 PreCCAState;
u8 CurCCAState;
u8 PreRFState;
u8 CurRFState;
//int Rssi_val_min;
}PS_T,*pPS_T;
typedef struct _Dynamic_Initial_Gain_Threshold_
{
u8 Dig_Enable_Flag;
u8 Dig_Ext_Port_Stage;
int RssiLowThresh;
int RssiHighThresh;
u32 FALowThresh;
u32 FAHighThresh;
u8 CurSTAConnectState;
u8 PreSTAConnectState;
u8 CurMultiSTAConnectState;
u8 PreIGValue;
u8 CurIGValue;
char BackoffVal;
char BackoffVal_range_max;
char BackoffVal_range_min;
u8 rx_gain_range_max;
u8 rx_gain_range_min;
u8 Rssi_val_min;
u8 PreCCKPDState;
u8 CurCCKPDState;
u8 LargeFAHit;
u8 ForbiddenIGI;
u32 Recover_cnt;
//u8 PreCCAState;
//u8 CurCCAState;
}DIG_T;
typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition
{
DIG_TYPE_THRESH_HIGH = 0,
DIG_TYPE_THRESH_LOW = 1,
DIG_TYPE_BACKOFF = 2,
DIG_TYPE_RX_GAIN_MIN = 3,
DIG_TYPE_RX_GAIN_MAX = 4,
DIG_TYPE_ENABLE = 5,
DIG_TYPE_DISABLE = 6,
DIG_OP_TYPE_MAX
}DM_DIG_OP_E;
typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition
{
CCK_PD_STAGE_LowRssi = 0,
CCK_PD_STAGE_HighRssi = 1,
CCK_PD_STAGE_MAX = 2,
}DM_CCK_PDTH_E;
typedef enum tag_1R_CCA_Type_Definition
{
CCA_MIN = 0,
CCA_1R =1,
CCA_2R = 2,
CCA_MAX = 3,
}DM_1R_CCA_E;
typedef enum tag_RF_Type_Definition
{
RF_Save =0,
RF_Normal = 1,
RF_MAX = 2,
}DM_RF_E;
typedef enum tag_DIG_EXT_PORT_ALGO_Definition
{
DIG_EXT_PORT_STAGE_0 = 0,
DIG_EXT_PORT_STAGE_1 = 1,
DIG_EXT_PORT_STAGE_2 = 2,
DIG_EXT_PORT_STAGE_3 = 3,
DIG_EXT_PORT_STAGE_MAX = 4,
}DM_DIG_EXT_PORT_ALG_E;
typedef enum tag_DIG_Connect_Definition
{
DIG_STA_DISCONNECT = 0,
DIG_STA_CONNECT = 1,
DIG_STA_BEFORE_CONNECT = 2,
DIG_MultiSTA_DISCONNECT = 3,
DIG_MultiSTA_CONNECT = 4,
DIG_CONNECT_MAX
}DM_DIG_CONNECT_E;
#define BW_AUTO_SWITCH_HIGH_LOW 25
#define BW_AUTO_SWITCH_LOW_HIGH 30
#define DM_DIG_THRESH_HIGH 40
#define DM_DIG_THRESH_LOW 35
#define DM_FALSEALARM_THRESH_LOW 400
#define DM_FALSEALARM_THRESH_HIGH 1000
#define DM_DIG_MAX 0x3e
#define DM_DIG_MIN 0x1c
#define DM_DIG_FA_UPPER 0x32
#define DM_DIG_FA_LOWER 0x20
#define DM_DIG_FA_TH0 0x100//0x20
#define DM_DIG_FA_TH1 0x400//0x100
#define DM_DIG_FA_TH2 0x600//0x200
#define DM_DIG_BACKOFF_MAX 12
#define DM_DIG_BACKOFF_MIN (-4)
#define DM_DIG_BACKOFF_DEFAULT 10
#define RxPathSelection_SS_TH_low 30
#define RxPathSelection_diff_TH 18
#define DM_RATR_STA_INIT 0
#define DM_RATR_STA_HIGH 1
#define DM_RATR_STA_MIDDLE 2
#define DM_RATR_STA_LOW 3
#define CTSToSelfTHVal 30
#define RegC38_TH 20
#define WAIotTHVal 25
//Dynamic Tx Power Control Threshold
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
#define TxHighPwrLevel_Normal 0
#define TxHighPwrLevel_Level1 1
#define TxHighPwrLevel_Level2 2
#define DM_Type_ByFW 0
#define DM_Type_ByDriver 1
typedef struct _RATE_ADAPTIVE
{
u8 RateAdaptiveDisabled;
u8 RATRState;
u16 reserve;
u32 HighRSSIThreshForRA;
u32 High2LowRSSIThreshForRA;
u8 Low2HighRSSIThreshForRA40M;
u32 LowRSSIThreshForRA40M;
u8 Low2HighRSSIThreshForRA20M;
u32 LowRSSIThreshForRA20M;
u32 UpperRSSIThresholdRATR;
u32 MiddleRSSIThresholdRATR;
u32 LowRSSIThresholdRATR;
u32 LowRSSIThresholdRATR40M;
u32 LowRSSIThresholdRATR20M;
u8 PingRSSIEnable; //cosa add for Netcore long range ping issue
u32 PingRSSIRATR; //cosa add for Netcore long range ping issue
u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue
u32 LastRATR;
u8 PreRATRState;
} RATE_ADAPTIVE, *PRATE_ADAPTIVE;
struct dm_priv
{
u8 DM_Type;
u8 DMFlag, DMFlag_tmp;
//for DIG
u8 bDMInitialGainEnable;
//u8 binitialized; // for dm_initial_gain_Multi_STA use.
DIG_T DM_DigTable;
PS_T DM_PSTable;
FALSE_ALARM_STATISTICS FalseAlmCnt;
//for rate adaptive, in fact, 88c/92c fw will handle this
u8 bUseRAMask;
RATE_ADAPTIVE RateAdaptive;
//* Upper and Lower Signal threshold for Rate Adaptive*/
int UndecoratedSmoothedPWDB;
int EntryMinUndecoratedSmoothedPWDB;
int EntryMaxUndecoratedSmoothedPWDB;
int MinUndecoratedPWDBForDM;
int LastMinUndecoratedPWDBForDM;
//for High Power
u8 bDynamicTxPowerEnable;
u8 LastDTPLvl;
u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06
//for tx power tracking
u8 bTXPowerTracking;
u8 TXPowercount;
u8 bTXPowerTrackingInit;
u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default
u8 TM_Trigger;
u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
u8 ThermalValue;
u8 ThermalValue_LCK;
u8 ThermalValue_IQK;
u8 ThermalValue_AVG[AVG_THERMAL_NUM];
u8 ThermalValue_AVG_index;
u8 ThermalValue_RxGain;
u8 ThermalValue_Crystal;
u8 Delta_IQK;
u8 Delta_LCK;
u8 bRfPiEnable;
u8 bReloadtxpowerindex;
u8 bDoneTxpower;
//for APK
u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a
u8 bAPKdone;
u8 bAPKThermalMeterIgnore;
//for IQK
u32 Reg874;
u32 RegC08;
u32 Reg88C;
u8 Reg522;
u8 Reg550;
u8 Reg551;
u32 Reg870;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
u8 bCCKinCH14;
char CCK_index;
//u8 Record_CCK_20Mindex;
//u8 Record_CCK_40Mindex;
char OFDM_index[2];
//for TxPwrTracking
int RegE94;
int RegE9C;
int RegEB4;
int RegEBC;
#if MP_DRIVER == 1
u8 RegC04_MP;
u32 RegD04_MP;
#endif
u32 TXPowerTrackingCallbackCnt; //cosa add for debug
u32 prv_traffic_idx; // edca turbo
u32 RegRF3C[2]; //pathA / pathB
// Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas
u8 INIDATA_RATE[32];
};
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}
//============================================================
// function prototype
//============================================================
void rtl8192d_init_dm_priv(IN PADAPTER Adapter);
void rtl8192d_deinit_dm_priv(IN PADAPTER Adapter);
void rtl8192d_InitHalDm(IN PADAPTER Adapter);
void rtl8192d_HalDmWatchDog(IN PADAPTER Adapter);
VOID rtl8192d_dm_CheckTXPowerTracking(IN PADAPTER Adapter);
#endif //__HAL8190PCIDM_H__

857
drivers/net/wireless/rtl8192c/include/rtl8192d_hal.h
View File

@@ -1,857 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192D_HAL_H__
#define __RTL8192D_HAL_H__
#include "rtl8192d_spec.h"
#include "Hal8192DPhyReg.h"
#include "Hal8192DPhyCfg.h"
#include "rtl8192d_rf.h"
#include "rtl8192d_dm.h"
#include "rtl8192d_recv.h"
#include "rtl8192d_xmit.h"
#include "rtl8192d_cmd.h"
#ifdef CONFIG_PCI_HCI
#include <pci_ops.h>
#include "Hal8192DEHWImg.h"
#include "Hal8192DETestHWImg.h"
#define RTL819X_DEFAULT_RF_TYPE RF_2T2R
//#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
#define RTL819X_TOTAL_RF_PATH 2
//2TODO: The following need to check!!
#define RTL8192D_FW_IMG "rtl8192DE\\rtl8192dfw.bin"
//For 92DE
#define RTL8192D_PHY_REG "rtl8192DE\\PHY_REG.txt"
#define RTL8192D_PHY_REG_PG "rtl8192DE\\PHY_REG_PG.txt"
#define RTL8192D_PHY_REG_MP "rtl8192DE\\PHY_REG_MP.txt"
#define RTL8192D_AGC_TAB "rtl8192DE\\AGC_TAB.txt"
#define RTL8192D_AGC_TAB_2G "rtl8192DE\\AGC_TAB_2G.txt"
#define RTL8192D_AGC_TAB_5G "rtl8192DE\\AGC_TAB_5G.txt"
#define RTL8192D_PHY_RADIO_A "rtl8192DE\\radio_a.txt"
#define RTL8192D_PHY_RADIO_B "rtl8192DE\\radio_b.txt"
#define RTL8192D_PHY_MACREG "rtl8192DE\\MAC_REG.txt"
#define RTL8192D_PHY_RADIO_A_intPA "rtl8192DE\\radio_a_intPA.txt"
#define RTL8192D_PHY_RADIO_B_intPA "rtl8192DE\\radio_b_intPA.txt"
#define RTL8192D_TEST_FW_IMG_FILE "rtl8192DE\\rtl8192dfw_test.bin"
#define RTL8192D_TEST_PHY_REG_PG_FILE "rtl8192DE\\PHY_REG_PG_test.txt"
#define RTL8192D_TEST_PHY_REG_FILE "rtl8192DE\\PHY_REG_test.txt"
#define RTL8192D_TEST_PHY_RADIO_A_FILE "rtl8192DE\\radio_a_test.txt"
#define RTL8192D_TEST_PHY_RADIO_B_FILE "rtl8192DE\\radio_b_test.txt"
#define RTL8192D_TEST_AGC_TAB_2G "rtl8192DE\\AGC_TAB_2G_test.txt"
#define RTL8192D_TEST_AGC_TAB_5G "rtl8192DE\\AGC_TAB_5G_test.txt"
#define RTL8192D_TEST_MAC_REG_FILE "rtl8192DE\\MAC_REG_test.txt"
// The file name "_2T" is for 92CE, "_1T" is for 88CE. Modified by tynli. 2009.11.24.
#define Rtl819XFwImageArray Rtl8192DEFwImgArray
#define Rtl819XMAC_Array Rtl8192DEMAC_2TArray
#define Rtl819XAGCTAB_Array Rtl8192DEAGCTAB_Array
#define Rtl819XAGCTAB_5GArray Rtl8192DEAGCTAB_5GArray
#define Rtl819XAGCTAB_2GArray Rtl8192DEAGCTAB_2GArray
#define Rtl819XPHY_REG_2TArray Rtl8192DEPHY_REG_2TArray
#define Rtl819XPHY_REG_1TArray Rtl8192DEPHY_REG_1TArray
#define Rtl819XRadioA_2TArray Rtl8192DERadioA_2TArray
#define Rtl819XRadioA_1TArray Rtl8192DERadioA_1TArray
#define Rtl819XRadioA_2T_intPAArray Rtl8192DERadioA_2T_intPAArray
#define Rtl819XRadioB_2TArray Rtl8192DERadioB_2TArray
#define Rtl819XRadioB_1TArray Rtl8192DERadioB_1TArray
#define Rtl819XRadioB_2T_intPAArray Rtl8192DERadioB_2T_intPAArray
#define Rtl819XPHY_REG_Array_PG Rtl8192DEPHY_REG_Array_PG
#define Rtl819XPHY_REG_Array_MP Rtl8192DEPHY_REG_Array_MP
#define Rtl819XAGCTAB_2TArray Rtl8192DEAGCTAB_2TArray
#define Rtl819XAGCTAB_1TArray Rtl8192DEAGCTAB_1TArray
#elif defined(CONFIG_USB_HCI)
#include "Hal8192DUHWImg.h"
#include "Hal8192DUTestHWImg.h"
//2TODO: We should define 8192S firmware related macro settings here!!
#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
#define RTL819X_TOTAL_RF_PATH 2
//2TODO: The following need to check!!
#define RTL8192D_FW_IMG "rtl8192DU\\rtl8192dfw.bin"
//For 92DU
#define RTL8192D_PHY_REG "rtl8192DU\\PHY_REG.txt"
#define RTL8192D_PHY_REG_PG "rtl8192DU\\PHY_REG_PG.txt"
#define RTL8192D_PHY_REG_MP "rtl8192DU\\PHY_REG_MP.txt"
#define RTL8192D_AGC_TAB "rtl8192DU\\AGC_TAB.txt"
#define RTL8192D_AGC_TAB_2G "rtl8192DU\\AGC_TAB_2G.txt"
#define RTL8192D_AGC_TAB_5G "rtl8192DU\\AGC_TAB_5G.txt"
#define RTL8192D_PHY_RADIO_A "rtl8192DU\\radio_a.txt"
#define RTL8192D_PHY_RADIO_B "rtl8192DU\\radio_b.txt"
#define RTL8192D_PHY_RADIO_A_intPA "rtl8192DU\\radio_a_intPA.txt"
#define RTL8192D_PHY_RADIO_B_intPA "rtl8192DU\\radio_b_intPA.txt"
#define RTL8192D_PHY_MACREG "rtl8192DU\\MAC_REG.txt"
#define RTL8192D_TEST_FW_IMG_FILE "rtl8192DU\\rtl8192dfw_test.bin"
#define RTL8192D_TEST_PHY_REG_PG_FILE "rtl8192DU\\PHY_REG_PG_test.txt"
#define RTL8192D_TEST_PHY_REG_FILE "rtl8192DU\\PHY_REG_test.txt"
#define RTL8192D_TEST_PHY_RADIO_A_FILE "rtl8192DU\\radio_a_test.txt"
#define RTL8192D_TEST_PHY_RADIO_B_FILE "rtl8192DU\\radio_b_test.txt"
#define RTL8192D_TEST_AGC_TAB_2G "rtl8192DU\\AGC_TAB_2G_test.txt"
#define RTL8192D_TEST_AGC_TAB_5G "rtl8192DU\\AGC_TAB_5G_test.txt"
#define RTL8192D_TEST_MAC_REG_FILE "rtl8192DU\\MAC_REG_test.txt"
// The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24.
#define Rtl819XFwImageArray Rtl8192DUFwImgArray
#define Rtl819XMAC_Array Rtl8192DUMAC_2TArray
#define Rtl819XAGCTAB_Array Rtl8192DUAGCTAB_Array
#define Rtl819XAGCTAB_5GArray Rtl8192DUAGCTAB_5GArray
#define Rtl819XAGCTAB_2GArray Rtl8192DUAGCTAB_2GArray
#define Rtl819XPHY_REG_2TArray Rtl8192DUPHY_REG_2TArray
#define Rtl819XPHY_REG_1TArray Rtl8192DUPHY_REG_1TArray
#define Rtl819XRadioA_2TArray Rtl8192DURadioA_2TArray
#define Rtl819XRadioA_1TArray Rtl8192DURadioA_1TArray
#define Rtl819XRadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray
#define Rtl819XRadioB_2TArray Rtl8192DURadioB_2TArray
#define Rtl819XRadioB_1TArray Rtl8192DURadioB_1TArray
#define Rtl819XRadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray
#define Rtl819XPHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG
#define Rtl819XPHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP
#define Rtl819XAGCTAB_2TArray Rtl8192DUAGCTAB_2TArray
#define Rtl819XAGCTAB_1TArray Rtl8192DUAGCTAB_1TArray
#endif
#define DRVINFO_SZ 4 // unit is 8bytes
#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
//
// Check if FW header exists. We do not consider the lower 4 bits in this case.
// By tynli. 2009.12.04.
//
#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D1 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D2 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D3 )
#define FW_8192D_SIZE 0x8000
#define FW_8192D_START_ADDRESS 0x1000
#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes
typedef enum _FIRMWARE_SOURCE{
FW_SOURCE_IMG_FILE = 0,
FW_SOURCE_HEADER_FILE = 1, //from header file
}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
typedef struct _RT_FIRMWARE{
FIRMWARE_SOURCE eFWSource;
#ifdef CONFIG_EMBEDDED_FWIMG
u8* szFwBuffer;
#else
u8 szFwBuffer[FW_8192D_SIZE];
#endif
u32 ulFwLength;
}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92D, *PRT_FIRMWARE_92D;
//
// This structure must be cared byte-ordering
//
// Added by tynli. 2009.12.04.
typedef struct _RT_8192D_FIRMWARE_HDR {//8-byte alinment required
//--- LONG WORD 0 ----
u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
u8 Category; // AP/NIC and USB/PCI
u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
u16 Version; // FW Version
u8 Subversion; // FW Subversion, default 0x00
u8 Rsvd1;
//--- LONG WORD 1 ----
u8 Month; // Release time Month field
u8 Date; // Release time Date field
u8 Hour; // Release time Hour field
u8 Minute; // Release time Minute field
u16 RamCodeSize; // The size of RAM code
u16 Rsvd2;
//--- LONG WORD 2 ----
u32 SvnIdx; // The SVN entry index
u32 Rsvd3;
//--- LONG WORD 3 ----
u32 Rsvd4;
u32 Rsvd5;
}RT_8192D_FIRMWARE_HDR, *PRT_8192D_FIRMWARE_HDR;
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
typedef enum _BT_CoType{
BT_2Wire = 0,
BT_ISSC_3Wire = 1,
BT_Accel = 2,
BT_CSR = 3,
BT_CSR_ENHAN = 4,
BT_RTL8756 = 5,
} BT_CoType, *PBT_CoType;
typedef enum _BT_CurState{
BT_OFF = 0,
BT_ON = 1,
} BT_CurState, *PBT_CurState;
typedef enum _BT_ServiceType{
BT_SCO = 0,
BT_A2DP = 1,
BT_HID = 2,
BT_HID_Idle = 3,
BT_Scan = 4,
BT_Idle = 5,
BT_OtherAction = 6,
BT_Busy = 7,
BT_OtherBusy = 8,
} BT_ServiceType, *PBT_ServiceType;
typedef enum _BT_RadioShared{
BT_Radio_Shared = 0,
BT_Radio_Individual = 1,
} BT_RadioShared, *PBT_RadioShared;
typedef struct _BT_COEXIST_STR{
u8 BluetoothCoexist;
u8 BT_Ant_Num;
u8 BT_CoexistType;
u8 BT_State;
u8 BT_CUR_State; //0:on, 1:off
u8 BT_Ant_isolation; //0:good, 1:bad
u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic
u8 BT_Service;
u8 BT_RadioSharedType;
u8 Ratio_Tx;
u8 Ratio_PRI;
}BT_COEXIST_STR, *PBT_COEXIST_STR;
//Added for 92D IQK setting.
typedef struct _IQK_MATRIX_REGS_SETTING{
BOOLEAN bIQKDone;
#if 1
int Value[1][IQK_Matrix_REG_NUM];
#else
u32 Mark[IQK_Matrix_REG_NUM];
u32 Value[IQK_Matrix_REG_NUM];
#endif
}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING;
#ifdef CONFIG_USB_RX_AGGREGATION
typedef enum _USB_RX_AGG_MODE{
USB_RX_AGG_DISABLE,
USB_RX_AGG_DMA,
USB_RX_AGG_USB,
USB_RX_AGG_DMA_USB
}USB_RX_AGG_MODE;
#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer
#endif
#define TX_SELE_HQ BIT(0) // High Queue
#define TX_SELE_LQ BIT(1) // Low Queue
#define TX_SELE_NQ BIT(2) // Normal Queue
// Note: We will divide number of page equally for each queue other than public queue!
#define TX_TOTAL_PAGE_NUMBER 0xF8
#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1)
// For Normal Chip Setting
// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
#define NORMAL_PAGE_NUM_PUBQ 0x56
// For Test Chip Setting
// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
#define TEST_PAGE_NUM_PUBQ 0x89
#define TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC 0x7A
#define NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC 0x5A
#define NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC 0x10
#define NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC 0x10
#define NORMAL_PAGE_NUM_NORMALQ_92D_DUAL_MAC 0
#define TX_PAGE_BOUNDARY_DUAL_MAC (TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC + 1)
// For Test Chip Setting
#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5
#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
#define WMM_TEST_PAGE_NUM_PUBQ 0xA3
#define WMM_TEST_PAGE_NUM_HPQ 0x29
#define WMM_TEST_PAGE_NUM_LPQ 0x29
//Note: For Normal Chip Setting ,modify later
#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5
#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
#define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0
#define WMM_NORMAL_PAGE_NUM_HPQ 0x29
#define WMM_NORMAL_PAGE_NUM_LPQ 0x1C
#define WMM_NORMAL_PAGE_NUM_NPQ 0x1C
#define WMM_NORMAL_PAGE_NUM_PUBQ_92D 0X65//0x82
#define WMM_NORMAL_PAGE_NUM_HPQ_92D 0X30//0x29
#define WMM_NORMAL_PAGE_NUM_LPQ_92D 0X30
#define WMM_NORMAL_PAGE_NUM_NPQ_92D 0X30
//-------------------------------------------------------------------------
// Chip specific
//-------------------------------------------------------------------------
#define CHIP_92C BIT(0)
#define CHIP_92C_1T2R BIT(1)
#define CHIP_8723 BIT(2) // RTL8723 With BT feature
#define CHIP_8723_DRV_REV BIT(3) // RTL8723 Driver Revised
#define NORMAL_CHIP BIT(4)
#define CHIP_VENDOR_UMC BIT(5)
#define CHIP_VENDOR_UMC_B_CUT BIT(6) // Chip version for ECO
//for 92D
#define CHIP_92D BIT(8)
#define CHIP_92D_SINGLEPHY BIT(9)
#define CHIP_92D_C_CUT BIT(10)
#define CHIP_92D_D_CUT BIT(11)
#define CHIP_92D_E_CUT BIT(12)
#define IS_NORMAL_CHIP(version) (((version) & NORMAL_CHIP) ? _TRUE : _FALSE)
#define IS_92C_SERIAL(version) (((version) & CHIP_92C) ? _TRUE : _FALSE)
#define IS_8723_SERIES(version) (((version) & CHIP_8723) ? _TRUE : _FALSE)
#define IS_92C_1T2R(version) (((version) & CHIP_92C) && ((version) & CHIP_92C_1T2R))
#define IS_VENDOR_UMC(version) (((version) & CHIP_VENDOR_UMC) ? _TRUE : _FALSE)
#define IS_VENDOR_UMC_A_CUT(version) (((version) & CHIP_VENDOR_UMC) ? (((version) & (BIT6|BIT7)) ? _FALSE : _TRUE) : _FALSE)
#define IS_VENDOR_8723_A_CUT(version) (((version) & CHIP_VENDOR_UMC) ? (((version) & (BIT6)) ? _FALSE : _TRUE) : _FALSE)
#define IS_92D_SINGLEPHY(version) ((version & CHIP_92D_SINGLEPHY) ? _TRUE : _FALSE)
#define IS_92D_C_CUT(version) ((version & CHIP_92D_C_CUT) ? _TRUE : _FALSE)
#define IS_92D_D_CUT(version) ((version & CHIP_92D_D_CUT) ? _TRUE : _FALSE)
#define IS_92D_E_CUT(version) ((version & CHIP_92D_E_CUT) ? _TRUE : _FALSE)
// 20100707 Joseph: Add vendor information into chip version definition.
// 20100902 Roger: Add UMC B-Cut and RTL8723 chip info definition.
/*
| BIT 7 | BIT6 | BIT 5 | BIT 4 | BIT 3 | BIT 2 | BIT 1 | BIT 0 |
+--------+---------+---------------------- +------------ +----------- +------ +-----------------+
|Reserved | UMC BCut |Manufacturer(TSMC/UMC) | TEST/NORMAL | 8723 Version | 8723? | 1T2R? | 88C/92C |
*/
/*
92D chip ver:
BIT8: IS 92D
BIT9: single phy
BIT10: C-cut
BIT11: D-cut
BIT12: E-cut
*/
typedef enum _VERSION_8192D{
VERSION_TEST_CHIP_88C = 0x00,
VERSION_TEST_CHIP_92C = 0x01,
VERSION_NORMAL_TSMC_CHIP_88C = 0x10,
VERSION_NORMAL_TSMC_CHIP_92C = 0x11,
VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x13,
VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x30,
VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x31,
VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x33,
VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x34,
VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x3c,
VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x70,
VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x71,
VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x73,
VERSION_TEST_CHIP_92D_SINGLEPHY= 0x300,
VERSION_TEST_CHIP_92D_DUALPHY = 0x100,
VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x310,
VERSION_NORMAL_CHIP_92D_DUALPHY = 0x110,
VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x710,
VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x510,
VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0xB10,
VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x910,
VERSION_NORMAL_CHIP_92D_E_CUT_SINGLEPHY = 0x1310,
VERSION_NORMAL_CHIP_92D_E_CUT_DUALPHY = 0x1110,
}VERSION_8192D,*PVERSION_8192D;
//-------------------------------------------------------------------------
// Channel Plan
//-------------------------------------------------------------------------
enum ChannelPlan{
CHPL_FCC = 0,
CHPL_IC = 1,
CHPL_ETSI = 2,
CHPL_SPAIN = 3,
CHPL_FRANCE = 4,
CHPL_MKK = 5,
CHPL_MKK1 = 6,
CHPL_ISRAEL = 7,
CHPL_TELEC = 8,
CHPL_GLOBAL = 9,
CHPL_WORLD = 10,
};
typedef struct _TxPowerInfo{
u8 CCKIndex[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT40_1SIndex[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT40_2SIndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT20IndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 OFDMIndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT40MaxOffset[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT20MaxOffset[RF90_PATH_MAX][CHANNEL_GROUP_MAX];
u8 TSSI_A[3];
u8 TSSI_B[3];
}TxPowerInfo, *PTxPowerInfo;
#define EFUSE_REAL_CONTENT_LEN 1024
#define EFUSE_MAP_LEN 256
#define EFUSE_MAX_SECTION 32
#define EFUSE_MAX_SECTION_BASE 16
// <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
// 9bytes + 1byt + 5bytes and pre 1byte.
// For worst case:
// | 2byte|----8bytes----|1byte|--7bytes--| //92D
#define EFUSE_OOB_PROTECT_BYTES 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte.
#ifdef CONFIG_PCI_HCI
struct hal_data_8192de
{
VERSION_8192D VersionID;
// add for 92D Phy mode/mac/Band mode
MACPHY_MODE_8192D MacPhyMode92D;
BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G
BAND_TYPE BandSet92D;
BOOLEAN bIsVS;
BOOLEAN bSupportRemoteWakeUp;
u8 AutoLoadStatusFor8192D;
u16 CustomerID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
u32 IntrMask[2];
u32 IntrMaskToSet[2];
u32 DisabledFunctions;
//current WIFI_PHY values
u32 ReceiveConfig;
u32 TransmitConfig;
WIRELESS_MODE CurrentWirelessMode;
HT_CHANNEL_WIDTH CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;// Control channel sub-carrier
u16 BasicRateSet;
//rf_ctrl
u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
//
// EEPROM setting.
//
u16 EEPROMVID;
u16 EEPROMDID;
u16 EEPROMSVID;
u16 EEPROMSMID;
u16 EEPROMChannelPlan;
u16 EEPROMVersion;
u8 EEPROMCustomerID;
u8 EEPROMBoardType;
u8 EEPROMRegulatory;
u8 EEPROMThermalMeter;
u8 EEPROMC9;
u8 EEPROMCC;
u8 TxPwrLevelCck[RF90_PATH_MAX][CHANNEL_MAX_NUMBER_2G];
u8 TxPwrLevelHT40_1S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrLevelHT40_2S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrHt20Diff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
u8 TxPwrLegacyHtDiff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
// For power group
u8 PwrGroupHT20[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff
u8 CrystalCap; // CrystalCap.
#ifdef CONFIG_BT_COEXIST
struct btcoexist_priv bt_coexist;
#endif
// Read/write are allow for following hardware information variables
u8 framesync;
u32 framesyncC34;
u8 framesyncMonitor;
u8 DefaultInitialGain[4];
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
u32 CCKTxPowerLevelOriginalOffset;
u32 AntennaTxPath; // Antenna path Tx
u32 AntennaRxPath; // Antenna path Rx
u8 BluetoothCoexist;
u8 ExternalPA;
u8 InternalPA5G[2]; //pathA / pathB
//u32 LedControlNum;
//u32 LedControlMode;
//u32 TxPowerTrackControl;
u8 b1x1RecvCombine; // for 1T1R receive combining
u8 bCurrentTurboEDCA;
u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo.
//vivi, for tx power tracking, 20080407
//u16 TSSI_13dBm;
//u32 Pwr_Track;
// The current Tx Power Level
u8 CurrentCckTxPwrIdx;
u8 CurrentOfdm24GTxPwrIdx;
BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now.
u32 RfRegChnlVal[2];
u8 bCckHighPower;
BOOLEAN bPhyValueInitReady;
BOOLEAN bTXPowerDataReadFromEEPORM;
BOOLEAN bInSetPower;
//RDG enable
BOOLEAN bRDGEnable;
BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress
BOOLEAN bNeedIQK;
BOOLEAN bLCKInProgress;
BOOLEAN bEarlyModeEnable;
#if 1
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
#else
//regc80<38><30>regc94<39><34>regc4c<34><63>regc88<38><38>regc9c<39><63>regc14<31><34>regca0<61><30>regc1c<31><63>regc78
u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM];
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel.
#endif
//for host message to fw
u8 LastHMEBoxNum;
u8 fw_ractrl;
u8 RegTxPause;
// Beacon function related global variable.
u32 RegBcnCtrlVal;
u8 RegFwHwTxQCtrl;
u8 RegReg542;
struct dm_priv dmpriv;
u8 bInterruptMigration;
u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
// Add for dual MAC 0--Mac0 1--Mac1
u32 interfaceIndex;
u16 RegRRSR;
u16 EfuseUsedBytes;
u8 RTSInitRate; // 2010.11.24.by tynli.
#ifdef CONFIG_P2P
struct P2P_PS_Offload_t p2p_ps_offload;
#endif //CONFIG_P2P
};
typedef struct hal_data_8192de HAL_DATA_TYPE, *PHAL_DATA_TYPE;
//
// Function disabled.
//
#define DF_TX_BIT BIT0
#define DF_RX_BIT BIT1
#define DF_IO_BIT BIT2
#define DF_IO_D3_BIT BIT3
#define RT_DF_TYPE u32
#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits)))
#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits))))
#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
void InterruptRecognized8192DE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent);
VOID UpdateInterruptMask8192DE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR);
#endif
#ifdef CONFIG_USB_HCI
//should be renamed and moved to another file
typedef enum _INTERFACE_SELECT_8192DUSB{
INTF_SEL0_USB = 0, // USB
INTF_SEL1_MINICARD = 1, // Minicard
INTF_SEL2_EKB_PRO = 2, // Eee keyboard proprietary
INTF_SEL3_PRO = 3, // Customized proprietary
} INTERFACE_SELECT_8192DUSB, *PINTERFACE_SELECT_8192DUSB;
typedef INTERFACE_SELECT_8192DUSB INTERFACE_SELECT_USB;
struct hal_data_8192du
{
VERSION_8192D VersionID;
// add for 92D Phy mode/mac/Band mode
MACPHY_MODE_8192D MacPhyMode92D;
BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G
BAND_TYPE BandSet92D;
BOOLEAN bIsVS;
BOOLEAN bSupportRemoteWakeUp;
#if (RTL8192D_DUAL_MAC_MODE_SWITCH == 1)
BOOLEAN bMasterOfDMSP;
BOOLEAN bSlaveOfDMSP;
PADAPTER BuddyAdapter;
#endif
u16 CustomerID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
//current WIFI_PHY values
u32 ReceiveConfig;
WIRELESS_MODE CurrentWirelessMode;
HT_CHANNEL_WIDTH CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;// Control channel sub-carrier
u16 BasicRateSet;
INTERFACE_SELECT_8192DUSB InterfaceSel;
//rf_ctrl
u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
//
// EEPROM setting.
//
u8 EEPROMVersion;
u16 EEPROMVID;
u16 EEPROMPID;
u16 EEPROMSVID;
u16 EEPROMSDID;
u8 EEPROMCustomerID;
u8 EEPROMSubCustomerID;
u8 EEPROMRegulatory;
u8 EEPROMThermalMeter;
u8 EEPROMC9;
u8 EEPROMCC;
u8 TxPwrLevelCck[RF90_PATH_MAX][CHANNEL_MAX_NUMBER_2G];
u8 TxPwrLevelHT40_1S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrLevelHT40_2S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrHt20Diff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
u8 TxPwrLegacyHtDiff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
// For power group
u8 PwrGroupHT20[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff
u8 CrystalCap; // CrystalCap.
#ifdef CONFIG_BT_COEXIST
struct btcoexist_priv bt_coexist;
#endif
// Read/write are allow for following hardware information variables
u8 framesync;
u32 framesyncC34;
u8 framesyncMonitor;
u8 DefaultInitialGain[4];
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
u32 CCKTxPowerLevelOriginalOffset;
u32 AntennaTxPath; // Antenna path Tx
u32 AntennaRxPath; // Antenna path Rx
u8 BluetoothCoexist;
u8 ExternalPA;
u8 InternalPA5G[2]; //pathA / pathB
//u32 LedControlNum;
//u32 LedControlMode;
//u32 TxPowerTrackControl;
u8 b1x1RecvCombine; // for 1T1R receive combining
u8 bCurrentTurboEDCA;
u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo.
//vivi, for tx power tracking, 20080407
//u16 TSSI_13dBm;
//u32 Pwr_Track;
// The current Tx Power Level
u8 CurrentCckTxPwrIdx;
u8 CurrentOfdm24GTxPwrIdx;
BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now.
u32 RfRegChnlVal[2];
u8 bCckHighPower;
BOOLEAN bPhyValueInitReady;
BOOLEAN bTXPowerDataReadFromEEPORM;
BOOLEAN bInSetPower;
//RDG enable
BOOLEAN bRDGEnable;
BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress
BOOLEAN bNeedIQK;
BOOLEAN bLCKInProgress;
BOOLEAN bEarlyModeEnable;
#if 1
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
#else
//regc80<38><30>regc94<39><34>regc4c<34><63>regc88<38><38>regc9c<39><63>regc14<31><34>regca0<61><30>regc1c<31><63>regc78
u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM];
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel.
#endif
//for host message to fw
u8 LastHMEBoxNum;
u8 fw_ractrl;
u8 RegTxPause;
// Beacon function related global variable.
u32 RegBcnCtrlVal;
u8 RegFwHwTxQCtrl;
u8 RegReg542;
struct dm_priv dmpriv;
u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
//Query RF by FW
BOOLEAN bReadRFbyFW;
// For 92C USB endpoint setting
//
u32 UsbBulkOutSize;
int RtBulkOutPipe[3];
int RtBulkInPipe;
int RtIntInPipe;
// Add for dual MAC 0--Mac0 1--Mac1
u32 interfaceIndex;
u8 OutEpQueueSel;
u8 OutEpNumber;
u8 Queue2EPNum[8];//for out endpoint number mapping
#ifdef CONFIG_USB_TX_AGGREGATION
u8 UsbTxAggMode;
u8 UsbTxAggDescNum;
#endif
#ifdef CONFIG_USB_RX_AGGREGATION
u16 HwRxPageSize; // Hardware setting
u32 MaxUsbRxAggBlock;
USB_RX_AGG_MODE UsbRxAggMode;
u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed
u8 UsbRxAggBlockTimeout;
u8 UsbRxAggPageCount; // 8192C DMA page count
u8 UsbRxAggPageTimeout;
#endif
u16 RegRRSR;
u16 EfuseUsedBytes;
u8 RTSInitRate; // 2010.11.24.by tynli.
#ifdef CONFIG_P2P
struct P2P_PS_Offload_t p2p_ps_offload;
#endif //CONFIG_P2P
};
typedef struct hal_data_8192du HAL_DATA_TYPE, *PHAL_DATA_TYPE;
#endif
#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData))
#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type)
int FirmwareDownload92D(IN PADAPTER Adapter);
VOID rtl8192d_FirmwareSelfReset(IN PADAPTER Adapter);
void rtl8192d_ReadChipVersion(IN PADAPTER Adapter);
VOID rtl8192d_ReadChannelPlan(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail);
VOID rtl8192d_ReadTxPowerInfo(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail);
VOID rtl8192d_ResetDualMacSwitchVariables(IN PADAPTER Adapter);
u8 GetEEPROMSize8192D(PADAPTER Adapter);
void rtl8192d_HalSetBrateCfg(PADAPTER Adapter, u8 *mBratesOS, u16 *pBrateCfg);
BOOLEAN PHY_CheckPowerOffFor8192D(PADAPTER Adapter);
VOID PHY_SetPowerOnFor8192D(PADAPTER Adapter);
void PHY_ConfigMacPhyMode92D(PADAPTER Adapter);
void rtl8192d_free_hal_data(_adapter * padapter);
void rtl8192d_set_hal_ops(struct hal_ops *pHalFunc);
#endif

44
drivers/net/wireless/rtl8192c/include/rtl8192d_led.h
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@@ -1,44 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192D_LED_H_
#define __RTL8192D_LED_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
//================================================================================
// Interface to manipulate LED objects.
//================================================================================
#ifdef CONFIG_USB_HCI
void rtl8192du_InitSwLeds(_adapter *padapter);
void rtl8192du_DeInitSwLeds(_adapter *padapter);
#endif
#ifdef CONFIG_PCI_HCI
void rtl8192de_gen_RefreshLedState(PADAPTER Adapter);
void rtl8192de_InitSwLeds(_adapter *padapter);
void rtl8192de_DeInitSwLeds(_adapter *padapter);
#endif
#endif

182
drivers/net/wireless/rtl8192c/include/rtl8192d_recv.h
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@@ -1,182 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL8192D_RECV_H_
#define _RTL8192D_RECV_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#ifdef PLATFORM_OS_XP
#ifdef CONFIG_SDIO_HCI
#define NR_RECVBUFF 1024//512//128
#else
#define NR_RECVBUFF (16)
#endif
#elif defined(PLATFORM_OS_CE)
#ifdef CONFIG_SDIO_HCI
#define NR_RECVBUFF (128)
#else
#define NR_RECVBUFF (4)
#endif
#else
#define NR_RECVBUFF (4)
#define NR_PREALLOC_RECV_SKB (8)
#endif
#define RECV_BLK_SZ 512
#define RECV_BLK_CNT 16
#define RECV_BLK_TH RECV_BLK_CNT
#if defined(CONFIG_USB_HCI)
#ifdef PLATFORM_OS_CE
#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k
#else
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
//#define MAX_RECVBUF_SZ (32768) // 32k
//#define MAX_RECVBUF_SZ (16384) //16K
//#define MAX_RECVBUF_SZ (10240) //10K
#define MAX_RECVBUF_SZ (15360) // 15k < 16k
#else
#define MAX_RECVBUF_SZ (4000) // about 4K
#endif
#endif
#elif defined(CONFIG_PCI_HCI)
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#define MAX_RECVBUF_SZ (9100)
#else
#define MAX_RECVBUF_SZ (4000) // about 4K
#endif
#define RX_MPDU_QUEUE 0
#define RX_CMD_QUEUE 1
#define RX_MAX_QUEUE 2
#endif
#define RECV_BULK_IN_ADDR 0x80
#define RECV_INT_IN_ADDR 0x81
#define PHY_RSSI_SLID_WIN_MAX 100
#define PHY_LINKQUALITY_SLID_WIN_MAX 20
struct phy_stat
{
unsigned int phydw0;
unsigned int phydw1;
unsigned int phydw2;
unsigned int phydw3;
unsigned int phydw4;
unsigned int phydw5;
unsigned int phydw6;
unsigned int phydw7;
};
typedef struct _Phy_OFDM_Rx_Status_Report_8192cd
{
unsigned char trsw_gain_X[4];
unsigned char pwdb_all;
unsigned char cfosho_X[4];
unsigned char cfotail_X[4];
unsigned char rxevm_X[2];
unsigned char rxsnr_X[4];
unsigned char pdsnr_X[2];
unsigned char csi_current_X[2];
unsigned char csi_target_X[2];
unsigned char sigevm;
unsigned char max_ex_pwr;
//#ifdef RTL8192SE
#ifdef CONFIG_LITTLE_ENDIAN
unsigned char ex_intf_flg:1;
unsigned char sgi_en:1;
unsigned char rxsc:2;
//unsigned char rsvd:4;
unsigned char idle_long:1;
unsigned char r_ant_train_en:1;
unsigned char ANTSELB:1;
unsigned char ANTSEL:1;
#else // _BIG_ENDIAN_
//unsigned char rsvd:4;
unsigned char ANTSEL:1;
unsigned char ANTSELB:1;
unsigned char r_ant_train_en:1;
unsigned char idle_long:1;
unsigned char rxsc:2;
unsigned char sgi_en:1;
unsigned char ex_intf_flg:1;
#endif
//#else // RTL8190, RTL8192E
// unsigned char sgi_en;
// unsigned char rxsc_sgien_exflg;
//#endif
}__attribute__ ((packed)) PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD;
typedef struct _Phy_CCK_Rx_Status_Report_8192cd
{
/* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend
0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */
u8 adc_pwdb_X[4];
u8 SQ_rpt;
u8 cck_agc_rpt;
} PHY_STS_CCK_8192CD_T;
// Rx smooth factor
#define Rx_Smooth_Factor (20)
#ifdef CONFIG_USB_HCI
typedef struct _INTERRUPT_MSG_FORMAT_EX{
unsigned int C2H_MSG0;
unsigned int C2H_MSG1;
unsigned int C2H_MSG2;
unsigned int C2H_MSG3;
unsigned int HISR; // from HISR Reg0x124, read to clear
unsigned int HISRE;// from HISRE Reg0x12c, read to clear
unsigned int MSG_EX;
}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX;
void rtl8192du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
int rtl8192du_init_recv_priv(_adapter * padapter);
void rtl8192du_free_recv_priv(_adapter * padapter);
void rtl8192du_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat);
#endif
#ifdef CONFIG_PCI_HCI
int rtl8192de_init_recv_priv(_adapter * padapter);
void rtl8192de_free_recv_priv(_adapter * padapter);
void rtl8192de_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat);
#endif
void rtl8192d_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat, BOOLEAN bPacketMatchBSSID);
void rtl8192d_process_phy_info(_adapter *padapter, void *prframe);
#endif

98
drivers/net/wireless/rtl8192c/include/rtl8192d_rf.h
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@@ -1,98 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/******************************************************************************
*
*
* Module: rtl8192d_rf.h ( Header File)
*
* Note: Collect every HAL RF type exter API or constant.
*
* Function:
*
* Export:
*
* Abbrev:
*
* History:
* Data Who Remark
*
* 09/25/2008 MHC Create initial version.
*
*
******************************************************************************/
#ifndef _RTL8192D_RF_H_
#define _RTL8192D_RF_H_
/* Check to see if the file has been included already. */
/*--------------------------Define Parameters-------------------------------*/
//
// For RF 6052 Series
//
#define RF6052_MAX_TX_PWR 0x3F
#define RF6052_MAX_REG 0x3F
#define RF6052_MAX_PATH 2
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*--------------------------Exported Function prototype---------------------*/
//
// RF RL6052 Series API
//
void rtl8192d_RF_ChangeTxPath( IN PADAPTER Adapter,
IN u16 DataRate);
void rtl8192d_PHY_RF6052SetBandwidth(
IN PADAPTER Adapter,
IN HT_CHANNEL_WIDTH Bandwidth);
VOID rtl8192d_PHY_RF6052SetCckTxPower(
IN PADAPTER Adapter,
IN u8* pPowerlevel);
VOID rtl8192d_PHY_RF6052SetOFDMTxPower(
IN PADAPTER Adapter,
IN u8* pPowerLevel,
IN u8 Channel);
int PHY_RF6052_Config8192D( IN PADAPTER Adapter );
BOOLEAN rtl8192d_PHY_EnableAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0);
void rtl8192d_PHY_PowerDownAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0);
/*--------------------------Exported Function prototype---------------------*/
#endif/* End of HalRf.h */

1859
drivers/net/wireless/rtl8192c/include/rtl8192d_spec.h
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File diff suppressed because it is too large Load Diff

106
drivers/net/wireless/rtl8192c/include/rtl8192d_xmit.h
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@@ -1,106 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL8192D_XMIT_H_
#define _RTL8192D_XMIT_H_
#define VO_QUEUE_INX 0
#define VI_QUEUE_INX 1
#define BE_QUEUE_INX 2
#define BK_QUEUE_INX 3
#define BCN_QUEUE_INX 4
#define MGT_QUEUE_INX 5
#define HIGH_QUEUE_INX 6
#define TXCMD_QUEUE_INX 7
#define HW_QUEUE_ENTRY 8
//
// Queue Select Value in TxDesc
//
#define QSLT_BK 0x2//0x01
#define QSLT_BE 0x0
#define QSLT_VI 0x5//0x4
#define QSLT_VO 0x7//0x6
#define QSLT_BEACON 0x10
#define QSLT_HIGH 0x11
#define QSLT_MGNT 0x12
#define QSLT_CMD 0x13
//Because we open EM for normal case, we just always insert 2*8 bytes.by wl
#define USB_92D_DUMMY_OFFSET 2
#define USB_92D_DUMMY_LENGTH (USB_92D_DUMMY_OFFSET * PACKET_OFFSET_SZ)
#define USB_HWDESC_HEADER_LEN (TXDESC_SIZE + USB_92D_DUMMY_LENGTH)
//For 92D early mode
#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value)
#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value)
#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value)
#ifdef CONFIG_USB_HCI
#ifdef CONFIG_USB_TX_AGGREGATION
#define MAX_TX_AGG_PACKET_NUMBER 0xFF
#endif
s32 rtl8192du_init_xmit_priv(_adapter * padapter);
void rtl8192du_free_xmit_priv(_adapter * padapter);
void rtl8192du_cal_txdesc_chksum(struct tx_desc *ptxdesc);
s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
void rtl8192du_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
s32 rtl8192du_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
#ifdef CONFIG_HOSTAPD_MLME
s32 rtl8192du_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
#endif
#endif
#ifdef CONFIG_PCI_HCI
s32 rtl8192de_init_xmit_priv(_adapter * padapter);
void rtl8192de_free_xmit_priv(_adapter * padapter);
s32 rtl8192de_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf);
struct xmit_buf *rtl8192de_dequeue_xmitbuf(struct rtw_tx_ring *ring);
void rtl8192de_xmitframe_resume(_adapter *padapter);
void rtl8192de_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe);
s32 rtl8192de_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe);
#ifdef CONFIG_HOSTAPD_MLME
s32 rtl8192de_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt);
#endif
#endif
#endif

41
drivers/net/wireless/rtl8192c/include/rtw_byteorder.h
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@@ -1,41 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL871X_BYTEORDER_H_
#define _RTL871X_BYTEORDER_H_
#include <drv_conf.h>
#if defined (CONFIG_LITTLE_ENDIAN) && defined (CONFIG_BIG_ENDIAN)
#error "Shall be CONFIG_LITTLE_ENDIAN or CONFIG_BIG_ENDIAN, but not both!\n"
#endif
#if defined (CONFIG_LITTLE_ENDIAN)
#ifndef CONFIG_PLATFORM_MSTAR389
# include <byteorder/little_endian.h>
#endif
#elif defined (CONFIG_BIG_ENDIAN)
# include <byteorder/big_endian.h>
#else
# error "Must be LITTLE/BIG Endian Host"
#endif
#endif /* _RTL871X_BYTEORDER_H_ */

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