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hdmirx: clean phy setting for tl1 [1/1]
PD#172587 Problem: 1.clean phy setting Solution: 1.put the phy data into a table 2.modify phy setting for low voltage tmds clk Verify: tl1 Change-Id: I8cad5d0639f72b17b90196f6143784f7b91dcdbc Signed-off-by: Yong Qin <yong.qin@amlogic.com>
This commit is contained in:
@@ -46,7 +46,7 @@
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*
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*
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*/
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#define RX_VER2 "ver.2018/11/21"
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#define RX_VER2 "ver.2018/11/22"
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/*print type*/
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#define LOG_EN 0x01
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@@ -3205,214 +3205,118 @@ uint32_t aml_cable_clk_band(uint32_t cableclk,
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return bw;
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}
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/*
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* phy data table
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* CNTL:0 1 2 3
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* DCHA:0 1 2
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* DCHD:0 2 1
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*/
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uint32_t phy_data[][10] = {
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{/*phy_frq_band_0*/
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0x30037078, 0x00000080, 0x02218000, 0x00000010,
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0x00000182, 0x2800c202, 0x010088a2,
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0x002c714a, 0x00018000, 0x1e013130
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},
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{/*phy_frq_band_1*/
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0x30037078, 0x00000080, 0x02218000, 0x00000010,
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0x000002a2, 0x4800c202, 0x01009126,
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0x002c714a, 0x00028000, 0x1e062620
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},
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{/*phy_frq_band_2 1.5G*/
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0x30037078, 0x00000080, 0x02218000, 0x00000010,
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0x000002a2, 0x4800c202, 0x01009126,
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0x002c714a, 0x00018000, 0x1e062620
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},
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{/*phy_frq_band_3 3G*/
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0x30037078, 0x00000080, 0x02218000, 0x00000010,
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0x000002a2, 0x0800c202, 0x0100fc31,
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0x002c714a, 0x00028000, 0x1e062620
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},
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{/*phy_frq_band_4 6G*/
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0x30037078, 0x007f0080, 0x02218000, 0x00000010,
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0x351842a2, 0x0700003c, 0x1d00cc31,
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0x002c715a, 0x00018000, 0x1e064640
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},
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};
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void aml_phy_init(uint32_t bw)
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{
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uint32_t idx = bw;
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uint32_t data32;
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uint32_t term_value = 0x7;/*all terminal on*/
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/* hdmirx_rd_top(TOP_HPD_PWR5V);*/
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rx_pr("init phy port %d, bw:%d\n", rx.port, bw);
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if (bw == phy_frq_null) {
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return;
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} else if (bw <= phy_frq_band_0) {
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/* enable terminal connect */
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data32 = 0x30034078|(term_value & 0x7);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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/* data channel and common block reset */
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data32 |= 0xf << 7;
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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rx_pr("MISC_CNTL0=0x%x\n", data32);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL1, 0x00000080);/*360*/
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL2, 0x02200000);/*380*/
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/* reset and select data port */
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data32 = 0x00000010;
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data32 |= ((1 << rx.port) << 6);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);
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/* release reset */
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data32 |= (1 << 11);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);
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rx_pr("MISC_CNTL3=0x%x\n", data32);
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udelay(5);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL0, 0x00000182);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL1, 0x2800c202);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL2, 0x010088a2);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL0, 0x002c714a);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00018000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e013130);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e413130);
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} else if (bw <= phy_frq_band_1) {
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/* enable terminal connect */
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data32 = 0x30034078|(term_value & 0x7);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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/* data channel and common block reset */
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data32 |= 0xf << 7;
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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rx_pr("MISC_CNTL0=0x%x\n", data32);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL1, 0x00000080);/*360*/
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL2, 0x02200000);/*380*/
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/* reset and select data port */
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data32 = 0x00000010;
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data32 |= ((1 << rx.port) << 6);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);/*384*/
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/* release reset */
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data32 |= (1 << 11);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);/*384*/
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rx_pr("MISC_CNTL3=0x%x\n", data32);
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udelay(5);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL0, 0x000002a2);/*388*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL1, 0x4800c202);/*38c*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL2, 0x01009126);/*390*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL0, 0x002c714a);/*394*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00028000);/*39c*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e062620);/*398*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e462620);/*398*/
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} else if (bw <= phy_frq_band_2) {
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/* enable terminal connect */
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data32 = 0x30034078|(term_value & 0x7);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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/* data channel and common block reset */
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data32 |= 0xf << 7;
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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rx_pr("MISC_CNTL0=0x%x\n", data32);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL1, 0x00000080);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL2, 0x02218000);
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/* reset and select data port */
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data32 = 0x00000010;
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data32 |= ((1 << rx.port) << 6);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);/*384*/
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/* release reset */
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data32 |= (1 << 11);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);/*384*/
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udelay(5);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL0, 0x000002a2);/*388*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL1, 0x4800c202);/*38c*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL2, 0x01009126);/*390*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL0, 0x002c714a);/*394*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00018000);/*39c*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e062620);/*398*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e462620);/*398*/
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} else if (bw <= phy_frq_band_3) {
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/* 3G */
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/* enable terminal connect */
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data32 = 0x30034078|(term_value & 0x7);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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/* data channel and common block reset */
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data32 |= 0xf << 7;
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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rx_pr("MISC_CNTL0=0x%x\n", data32);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL1, 0x00000080);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL2, 0x02218000);
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/* reset and select data port */
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data32 = 0x00000010;
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data32 |= ((1 << rx.port) << 6);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);/*384*/
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/* release reset */
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data32 |= (1 << 11);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);/*384*/
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udelay(5);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL0, 0x000002a2);/*388*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL1, 0x0800c202);/*38c*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL2, 0x0100fc31);/*390*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL0, 0x002c714a);/*394*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00028000);/*39c*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e062620);/*398*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e462620);/*398*/
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} else {
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/*6G*/
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/* enable terminal connect */
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data32 = 0x30034078|(term_value & 0x7);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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/* data channel and common block reset */
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data32 |= 0xf << 7;
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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rx_pr("MISC_CNTL0=0x%x\n", data32);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL1, 0x007f0080);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL2, 0x02200000);
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/* reset and select data port */
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data32 = 0x00000010;
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data32 |= ((1 << rx.port) << 6);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);/*384*/
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/* release reset */
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data32 |= (1 << 11);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);/*384*/
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udelay(5);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL0, 0x351842a2);/*388*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL1, 0x0700003c);/*38c*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL2, 0x1d00cc31);/*390*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL0, 0x002c714a);/*394*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00018000);/*39c*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e064640);/*398*/
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udelay(5);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e464640);/*398*/
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if (bw > phy_frq_band_4) {
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rx_pr("err phy frq band\n");
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idx = phy_frq_band_2;
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}
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/* enable terminal connect */
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data32 = phy_data[idx][0]|(term_value & 0x7);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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/* data channel and common block reset */
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data32 |= 0xf << 7;
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, data32);/*35c*/
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udelay(2);
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/*rx_pr("MISC_CNTL0=0x%x\n", data32);*/
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL1, phy_data[idx][1]);/*360*/
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL2, phy_data[idx][2]);/*380*/
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/* reset and select data port */
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data32 = phy_data[idx][3];
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data32 |= ((1 << rx.port) << 6);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);
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/* release reset */
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data32 |= (1 << 11);
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wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, data32);
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/*rx_pr("MISC_CNTL3=0x%x\n", data32);*/
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udelay(5);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL0, phy_data[idx][4]);/*388*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL1, phy_data[idx][5]);/*38c*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL2, phy_data[idx][6]);/*390*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL0, phy_data[idx][7]);/*394*/
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, phy_data[idx][8]);/*39c*/
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data32 = phy_data[idx][9];
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, data32);/*398*/
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udelay(5);
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data32 |= 0x00400000;
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, data32);/*398*/
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}
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uint32_t eq_data[][4] = {
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/*DCHD_CNTL gp0:2, 1 gp1:2, 1*/
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{0x00028000, 0x1e022220, 0x00028000, 0x1e062620},/*bw0*/
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{0x00028000, 0x1e022220, 0x00028000, 0x1e062620},/*bw1*/
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{0x00028000, 0x1e022220, 0x00018000, 0x1e062620},/*bw2*/
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{0x00028000, 0x1e022220, 0x00028000, 0x1e062620},/*bw3*/
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{0x00018000, 0x1e064640, 0x00018000, 0x1e064640},/*bw4*/
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};
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void aml_eq_setting(uint32_t bw)
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{
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static uint32_t cnt;
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uint32_t data;
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uint32_t idx = bw;
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if (bw == phy_frq_null) {
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return;
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} else if (bw <= phy_frq_band_0) {
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#if 0
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00018000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e013130);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e413130);
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#else
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if (cnt & 0x1) {
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00028000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e022220);
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udelay(1);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e422220);
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} else {
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00028000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e062620);
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udelay(1);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e462620);
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}
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#endif
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} else if (bw <= phy_frq_band_1) {
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if (cnt & 0x1) {
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00028000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e022220);
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udelay(1);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e422220);
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} else {
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00028000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e062620);
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udelay(1);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e462620);
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}
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} else if (bw <= phy_frq_band_2) {
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if (cnt & 0x1) {
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00028000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e022220);
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udelay(1);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e422220);
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} else {
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00018000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e062620);
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udelay(1);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e462620);
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}
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} else if (bw <= phy_frq_band_3) {
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if (cnt & 0x1) {
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00028000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e022220);
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udelay(1);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e422220);
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} else {
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00028000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e062620);
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udelay(1);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e462620);
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}
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} else {
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/* 6G */
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, 0x00018000);
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wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e064640);
|
||||
if (bw > phy_frq_band_4) {
|
||||
rx_pr("err phy frq band\n");
|
||||
idx = phy_frq_band_2;
|
||||
}
|
||||
|
||||
if (cnt & 0x01) {
|
||||
wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, eq_data[idx][0]);
|
||||
wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, eq_data[idx][1]);
|
||||
udelay(1);
|
||||
wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x1e464640);
|
||||
data = eq_data[idx][1] | 0x00400000;
|
||||
wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, data);
|
||||
} else {
|
||||
wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL2, eq_data[idx][2]);
|
||||
wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, eq_data[idx][3]);
|
||||
udelay(1);
|
||||
data = eq_data[idx][3] | 0x00400000;
|
||||
wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, data);
|
||||
}
|
||||
cnt++;
|
||||
}
|
||||
@@ -3506,10 +3410,7 @@ void aml_phy_pll_setting(uint32_t cable_clk, uint32_t clkrate)
|
||||
rd_reg_hhi(HHI_HDMIRX_APLL_CNTL0);
|
||||
udelay(50);
|
||||
wr_reg_hhi(HHI_HDMIRX_APLL_CNTL1, 0x00000000);
|
||||
if (bw <= pll_frq_band_1)
|
||||
wr_reg_hhi(HHI_HDMIRX_APLL_CNTL2, 0x0000110e);
|
||||
else
|
||||
wr_reg_hhi(HHI_HDMIRX_APLL_CNTL2, 0x00001108);
|
||||
wr_reg_hhi(HHI_HDMIRX_APLL_CNTL2, 0x00001118);
|
||||
data2 = 0x10058f30|od2;
|
||||
wr_reg_hhi(HHI_HDMIRX_APLL_CNTL3, data2);
|
||||
|
||||
@@ -3528,10 +3429,7 @@ void aml_phy_pll_setting(uint32_t cable_clk, uint32_t clkrate)
|
||||
/*rx_pr("APLL_CNTL0:0x%x\n", rd_reg_hhi(HHI_HDMIRX_APLL_CNTL0));*/
|
||||
rd_reg_hhi(HHI_HDMIRX_APLL_CNTL0);
|
||||
udelay(60);
|
||||
if (bw <= pll_frq_band_1)
|
||||
wr_reg_hhi(HHI_HDMIRX_APLL_CNTL2, 0x0000300e);
|
||||
else
|
||||
wr_reg_hhi(HHI_HDMIRX_APLL_CNTL2, 0x00003008);
|
||||
wr_reg_hhi(HHI_HDMIRX_APLL_CNTL2, 0x00003018);
|
||||
/* common block release reset */
|
||||
data = rd_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0);
|
||||
data &= ~(0x7 << 7);
|
||||
|
||||
Reference in New Issue
Block a user