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Merge commit 'ecf409630c9bb4b64460a95e7763ecb73281a715'

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* commit 'ecf409630c9bb4b64460a95e7763ecb73281a715':
  media: i2c: add sc3336p sensor driver
  dt-bindings: soc: rockchip-amp: remove CPU_GET_AFFINITY() to dtsi file
  ARM: dts: rockchip: add rv1106g-evb2-v12-spi-nand-tb.dts
  arm64: dts: rockchip: rk3562-amp: define CPU_GET_AFFINITY
  arm64: dts: rockchip: rk3308-amp: define CPU_GET_AFFINITY
  soc: rockchip: amp: support init gpio group irqs for amp
  irqchip/gicv3: support config amp os irqs
  media: rockchip: isp: version v2.5.0

Change-Id: I2e5beffb8875efbbc3736fc3d38770340faabefd
This commit is contained in:
Tao Huang
2024-02-29 18:26:53 +08:00
parent fe33d5d60d ecf409630c
commit 7f72922db0
12 changed files with 2201 additions and 54 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@@ -1162,6 +1162,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rv1106g-evb2-v12-nofastae-emmc.dtb \
rv1106g-evb2-v12-nofastae-spi-nand.dtb \
rv1106g-evb2-v12-nofastae-spi-nor.dtb \
rv1106g-evb2-v12-spi-nand-tb.dtb \
rv1106g-evb2-v12-wakeup.dtb \
rv1106g-smart-door-lock-rmsl-v10.dtb \
rv1106g-smart-door-lock-rmsl-v12.dtb \

40
arch/arm/boot/dts/rv1106g-evb2-v12-spi-nand-tb.dts Normal file
View File

@@ -0,0 +1,40 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1106g-evb2-v10.dts"
/ {
model = "Rockchip RV1106G EVB2 V12 Board On Spi Nand";
compatible = "rockchip,rv1106g-evb2-v12", "rockchip,rv1106";
chosen {
bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
};
};
/delete-node/ &thunder_boot_spi_nor;
&emmc {
status = "disabled";
};
&rkisp_thunderboot {
/* reg's offset MUST match with RTOS */
/*
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
* e.g. 2304x1296: 0xf30000
*/
reg = <0x00860000 0xf30000>;
};
&ramdisk_r {
reg = <0x1790000 (20 * 0x00100000)>;
};
&ramdisk_c {
reg = <0x2b90000 (10 * 0x00100000)>;
};

2
arch/arm64/boot/dts/rockchip/rk3308b-amp.dtsi
View File

@@ -5,6 +5,8 @@
#include <dt-bindings/soc/rockchip-amp.h>
#define CPU_GET_AFFINITY(cpu, cluster) ((cpu) << 0 | ((cluster) << 8))
/ {
rockchip_amp: rockchip-amp {
compatible = "rockchip,amp";

2
arch/arm64/boot/dts/rockchip/rk3562-amp.dtsi
View File

@@ -5,6 +5,8 @@
#include <dt-bindings/soc/rockchip-amp.h>
#define CPU_GET_AFFINITY(cpu, cluster) ((cpu) << 0 | ((cluster) << 8))
/ {
rockchip_amp: rockchip-amp {
compatible = "rockchip,amp";

35
drivers/irqchip/irq-gic-v3.c
View File

@@ -34,6 +34,10 @@
#include "irq-gic-common.h"
#ifdef CONFIG_ROCKCHIP_AMP
#include <soc/rockchip/rockchip_amp.h>
#endif
#define GICD_INT_NMI_PRI (GICD_INT_DEF_PRI & ~0x80)
#define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0)
@@ -410,6 +414,10 @@ static void gic_poke_irq(struct irq_data *d, u32 offset)
static void gic_mask_irq(struct irq_data *d)
{
#ifdef CONFIG_ROCKCHIP_AMP
if (rockchip_amp_check_amp_irq(gic_irq(d)))
return;
#endif
gic_poke_irq(d, GICD_ICENABLER);
if (gic_irq_in_rdist(d))
gic_redist_wait_for_rwp();
@@ -434,6 +442,10 @@ static void gic_eoimode1_mask_irq(struct irq_data *d)
static void gic_unmask_irq(struct irq_data *d)
{
#ifdef CONFIG_ROCKCHIP_AMP
if (rockchip_amp_check_amp_irq(gic_irq(d)))
return;
#endif
gic_poke_irq(d, GICD_ISENABLER);
}
@@ -601,6 +613,10 @@ static void gic_irq_nmi_teardown(struct irq_data *d)
static void gic_eoi_irq(struct irq_data *d)
{
#ifdef CONFIG_ROCKCHIP_AMP
if (rockchip_amp_check_amp_irq(gic_irq(d)))
return;
#endif
write_gicreg(gic_irq(d), ICC_EOIR1_EL1);
isb();
}
@@ -923,8 +939,18 @@ static void __init gic_dist_init(void)
* enabled.
*/
affinity = gic_mpidr_to_affinity(cpu_logical_map(smp_processor_id()));
for (i = 32; i < GIC_LINE_NR; i++)
for (i = 32; i < GIC_LINE_NR; i++) {
#ifdef CONFIG_ROCKCHIP_AMP
u64 affinity_amp;
if (rockchip_amp_need_init_amp_irq(i)) {
affinity_amp = rockchip_amp_get_irq_aff(i);
gic_write_irouter(affinity_amp, base + GICD_IROUTER + i * 8);
continue;
}
#endif
gic_write_irouter(affinity, base + GICD_IROUTER + i * 8);
}
for (i = 0; i < GIC_ESPI_NR; i++)
gic_write_irouter(affinity, base + GICD_IROUTERnE + i * 8);
@@ -1369,6 +1395,10 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
int enabled;
u64 val;
#ifdef CONFIG_ROCKCHIP_AMP
if (rockchip_amp_check_amp_irq(gic_irq(d)))
return -EINVAL;
#endif
if (force)
cpu = cpumask_first(mask_val);
else
@@ -1992,6 +2022,9 @@ static int __init gic_init_bases(phys_addr_t dist_phys_base,
gic_update_rdist_properties();
#ifdef CONFIG_ROCKCHIP_AMP
rockchip_amp_get_gic_info(GIC_LINE_NR, GIC_V3);
#endif
gic_dist_init();
gic_cpu_init();
gic_smp_init();

10
drivers/media/i2c/Kconfig
View File

@@ -1842,6 +1842,16 @@ config VIDEO_SC3336
This is a Video4Linux2 sensor driver for the SmartSens
SC3336 camera.
config VIDEO_SC3336P
tristate "SmartSens SC3336P sensor support"
depends on I2C && VIDEO_DEV
select MEDIA_CONTROLLER
select VIDEO_V4L2_SUBDEV_API
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the SmartSens
SC3336P camera.
config VIDEO_SC3338
tristate "SmartSens SC3338 sensor support"
depends on I2C && VIDEO_DEV

1
drivers/media/i2c/Makefile
View File

@@ -234,6 +234,7 @@ obj-$(CONFIG_VIDEO_SC2336) += sc2336.o
obj-$(CONFIG_VIDEO_SC2355) += sc2355.o
obj-$(CONFIG_VIDEO_SC301IOT) += sc301iot.o
obj-$(CONFIG_VIDEO_SC3336) += sc3336.o
obj-$(CONFIG_VIDEO_SC3336P) += sc3336p.o
obj-$(CONFIG_VIDEO_SC3338) += sc3338.o
obj-$(CONFIG_VIDEO_SC401AI) += sc401ai.o
obj-$(CONFIG_VIDEO_SC4210) += sc4210.o

1921
drivers/media/i2c/sc3336p.c Normal file
View File

File diff suppressed because it is too large Load Diff

21
drivers/media/platform/rockchip/isp/version.h
View File

@@ -483,6 +483,27 @@
* 20.more time to wait isp end
* 21.add mode for rv1106 suspend without rtt
* 22.fix is_on false cause pm isp die
*
* v2.5.0 (AIQ v5.5.0)
* 1.wrap mode first done don't send event
* 2.fix 4k and dual_sensor pm oneframe error
* 3.isp32 using ktime_get_boottime_ns
* 4.fix wait timeout with thunderboot
* 5.add buf cnt info to procfs
* 6.sync irq_ends
* 7.fix resume mi no enable
* 8.fix isp32 lost buf
* 9.frame start to check and config next buf
* 10.fix isp stop to enable isp ctrl
* 11.fix isp32 buf no update to hw
* 12.add rkisp_buf_dbg
* 13.fix isp stop to read stats buf
* 14.support multiple wrap
* 15.dvbm buf support from rockit
* 16.add RKISP_CMD_SET_TB_HEAD_V32 API
* 17.add ioctl to get bay3d buf
* 18.fix isp32 lite frame buffer data read
* 19.support 8k for isp32 lite
*/
#define RKISP_DRIVER_VERSION RKISP_API_VERSION

219
drivers/soc/rockchip/rockchip_amp.c
View File

@@ -26,6 +26,7 @@
#define GPIO_GROUP_PRIO_MAX 3
#define MAX_GIC_SPI_NUM (1020)
#define AMP_GIC_INFO_DUMP 0
#define AMP_GIC_DBG(fmt, arg...) do { if (0) { pr_warn(fmt, ##arg); } } while (0)
enum amp_cpu_ctrl_status {
@@ -39,6 +40,12 @@ enum amp_cpu_ctrl_status {
#define AMP_FLAG_CPU_EL2_HYP BIT(2)
#define AMP_FLAG_CPU_ARM32_T BIT(3)
enum {
GPIO_IRQ_GROUP_DISABLE = 0x0,
GPIO_IRQ_GROUP_EN_BANK_TYPE = 0x1,
GPIO_IRQ_GROUP_EN_GROUP_TYPE = 0x2,
};
struct rkamp_device {
struct device *dev;
struct clk_bulk_data *clks;
@@ -54,14 +61,27 @@ static struct {
u64 cpu_id;
} cpu_boot_info[CONFIG_NR_CPUS];
struct amp_gpio_group_s {
u32 bank_id;
struct amp_gpio_group_prio_group_info {
u32 prio;
u64 irq_aff[AMP_AFF_MAX_CPU];
u32 irq_id[AMP_AFF_MAX_CPU];
u32 en[AMP_AFF_MAX_CPU];
};
struct amp_gpio_group_bank_type_info {
u32 hw_irq;
u32 prio;
u64 aff;
};
struct amp_gpio_group_info_t {
u32 group_en;
u32 bank_id;
struct amp_gpio_group_bank_type_info bank_type_info;
struct amp_gpio_group_prio_group_info prio_group[GPIO_GROUP_PRIO_MAX];
};
struct amp_irq_cfg_s {
u64 aff;
u32 prio;
@@ -78,7 +98,7 @@ static struct amp_gic_ctrl_s {
u32 flag;
} aff_to_cpumask[AMP_AFF_MAX_CLUSTER][AMP_AFF_MAX_CPU];
struct amp_irq_cfg_s irqs_cfg[MAX_GIC_SPI_NUM];
struct amp_gpio_group_s gpio_grp[GPIO_BANK_NUM][GPIO_GROUP_PRIO_MAX];
struct amp_gpio_group_info_t gpio_grp[GPIO_BANK_NUM];
u32 gpio_banks;
} amp_ctrl;
@@ -304,60 +324,103 @@ u64 rockchip_amp_get_irq_aff(u32 irq)
return amp_ctrl.irqs_cfg[irq].aff;
}
static int gic_amp_get_gpio_prio_group_info(struct device_node *np,
struct amp_gic_ctrl_s *amp_ctrl,
int prio_id)
static int amp_gic_get_gpio_group_bank_type_config(struct device_node *np,
struct amp_gic_ctrl_s *amp_ctrl,
struct amp_gpio_group_info_t *gpio_grp)
{
u32 gpio_bank, prio, irq_id;
u32 prio, irq;
u64 irq_aff;
int i, count0, count1;
struct amp_gpio_group_s *gpio_grp;
struct amp_gpio_group_bank_type_info *bank_type_info;
struct amp_irq_cfg_s *irqs_cfg;
if (prio_id >= GPIO_GROUP_PRIO_MAX)
bank_type_info = &gpio_grp->bank_type_info;
if (of_property_read_u32_array(np, "hw-irq", &irq, 1))
return -EINVAL;
if (of_property_read_u32_array(np, "gpio-bank", &gpio_bank, 1))
if (of_property_read_u64_array(np, "hw-irq-cpu-aff", &irq_aff, 1))
return -EINVAL;
if (gpio_bank >= amp_ctrl->gpio_banks)
return -EINVAL;
gpio_grp = &amp_ctrl->gpio_grp[gpio_bank][prio_id];
if (of_property_read_u32_array(np, "prio", &prio, 1))
return -EINVAL;
if (gpio_bank >= GPIO_BANK_NUM)
bank_type_info->aff = irq_aff;
bank_type_info->hw_irq = irq;
bank_type_info->prio = prio;
irqs_cfg = &amp_ctrl->irqs_cfg[irq];
irqs_cfg->prio = prio;
irqs_cfg->aff = irq_aff;
if (amp_ctrl->gic_version == GIC_V2) {
irqs_cfg->cpumask = amp_get_cpumask_bit(irq_aff);
if (!irqs_cfg->cpumask) {
pr_err(" %s: get cpumask error\n", __func__);
return -EINVAL;
}
}
irqs_cfg->amp_flag = 1;
AMP_GIC_DBG(" %s bank-%d: hw-irq-%d aff-%llx(%x) prio-%x flag-%d\n",
__func__, gpio_grp->bank_id, irq, irqs_cfg->aff,
irqs_cfg->cpumask, irqs_cfg->prio, irqs_cfg->amp_flag);
return 0;
}
static int gic_amp_get_gpio_prio_group_config(struct device_node *np,
struct amp_gic_ctrl_s *amp_ctrl,
struct amp_gpio_group_info_t *gpio_grp,
int prio_id)
{
u32 prio, irq_id;
u64 irq_aff;
int i, count0, count1, count2;
struct amp_irq_cfg_s *irqs_cfg;
struct amp_gpio_group_prio_group_info *prio_grp;
if (prio_id >= GPIO_GROUP_PRIO_MAX)
return -EINVAL;
AMP_GIC_DBG("%s: gpio-%d, group prio:%d-%x\n",
__func__, gpio_bank, prio_id, prio);
count0 = of_property_count_u32_elems(np, "girq-id");
count1 = of_property_count_u64_elems(np, "girq-aff");
if (count0 != count1)
if (of_property_read_u32_array(np, "group-prio", &prio, 1))
return -EINVAL;
gpio_grp->prio = prio;
prio_grp = &gpio_grp->prio_group[prio_id];
prio_grp->prio = prio;
count0 = of_property_count_u32_elems(np, "group-irq-id");
count1 = of_property_count_u64_elems(np, "group-irq-aff");
count2 = of_property_count_u32_elems(np, "group-irq-en");
AMP_GIC_DBG(" %s: bank-%d, group prio [%d]=0x%x\n",
__func__, gpio_grp->bank_id, prio_id, prio);
if (!(count0 == count1 && count0 == count2 && count0)) {
pr_err("%s: group-irq count is error(%d %d %d)\n",
__func__, count0, count1, count2);
return -EINVAL;
}
if (count0 >= AMP_AFF_MAX_CPU)
pr_err("%s: prio group is overflow\n", __func__);
for (i = 0; i < count0; i++) {
of_property_read_u32_index(np, "girq-id", i, &irq_id);
gpio_grp->irq_id[i] = irq_id;
of_property_read_u64_index(np, "girq-aff", i, &irq_aff);
of_property_read_u32_index(np, "group-irq-id", i, &irq_id);
prio_grp->irq_id[i] = irq_id;
gpio_grp->irq_aff[i] = irq_aff;
of_property_read_u64_index(np, "group-irq-aff", i, &irq_aff);
prio_grp->irq_aff[i] = irq_aff;
of_property_read_u32_index(np, "girq-en", i, &gpio_grp->en[i]);
of_property_read_u32_index(np, "group-irq-en", i, &prio_grp->en[i]);
irqs_cfg = &amp_ctrl->irqs_cfg[irq_id];
AMP_GIC_DBG(" %s: group cpu-%d, irq-%d: prio-%x, aff-%llx en-%d\n",
__func__, i, gpio_grp->irq_id[i], gpio_grp->prio,
gpio_grp->irq_aff[i], gpio_grp->en[i]);
AMP_GIC_DBG(" %s: cpu_idx-%d irq-%d: prio-%x aff-%llx grp_en-%d\n",
__func__, i, prio_grp->irq_id[i], prio_grp->prio,
prio_grp->irq_aff[i], prio_grp->en[i]);
if (gpio_grp->en[i]) {
irqs_cfg->prio = gpio_grp->prio;
if (prio_grp->en[i]) {
irqs_cfg->prio = prio_grp->prio;
irqs_cfg->aff = irq_aff;
if (amp_ctrl->gic_version == GIC_V2) {
irqs_cfg->cpumask = amp_get_cpumask_bit(irq_aff);
@@ -369,17 +432,17 @@ static int gic_amp_get_gpio_prio_group_info(struct device_node *np,
irqs_cfg->amp_flag = 1;
}
AMP_GIC_DBG(" %s: prio-%x aff-%llx cpumaks-%x flag-%d\n",
__func__, irqs_cfg->prio, irqs_cfg->aff,
irqs_cfg->cpumask, irqs_cfg->amp_flag);
AMP_GIC_DBG(" %s irq-%d: prio-%x aff-%llx(%x) flag-%d\n",
__func__, prio_grp->irq_id[i], irqs_cfg->prio,
irqs_cfg->aff, irqs_cfg->cpumask, irqs_cfg->amp_flag);
}
return 0;
}
static int gic_amp_gpio_group_get_info(struct device_node *group_node,
struct amp_gic_ctrl_s *amp_ctrl,
int idx)
static int amp_gic_get_gpio_group_type_config(struct device_node *group_node,
struct amp_gic_ctrl_s *amp_ctrl,
struct amp_gpio_group_info_t *gpio_grp)
{
int i = 0;
struct device_node *node;
@@ -388,8 +451,8 @@ static int gic_amp_gpio_group_get_info(struct device_node *group_node,
for_each_available_child_of_node(group_node, node) {
if (i >= GPIO_GROUP_PRIO_MAX)
break;
if (!gic_amp_get_gpio_prio_group_info(node, amp_ctrl,
i)) {
if (!gic_amp_get_gpio_prio_group_config(node, amp_ctrl,
gpio_grp, i)) {
i++;
}
}
@@ -397,27 +460,64 @@ static int gic_amp_gpio_group_get_info(struct device_node *group_node,
return 0;
}
static void gic_of_get_gpio_group(struct device_node *np,
struct amp_gic_ctrl_s *amp_ctrl)
static void amp_gic_get_gpio_group_config(struct device_node *node,
struct amp_gic_ctrl_s *amp_ctrl)
{
struct device_node *bank_node;
struct amp_gpio_group_info_t *gpio_grp;
u32 gpio_bank, group_en;
if (of_property_read_u32_array(node, "gpio-bank-id", &gpio_bank, 1))
return;
if (gpio_bank >= amp_ctrl->gpio_banks)
return;
if (of_property_read_u32_array(node, "group-irq-en", &group_en, 1))
return;
gpio_grp = &amp_ctrl->gpio_grp[gpio_bank];
gpio_grp->bank_id = gpio_bank;
gpio_grp->group_en = group_en;
AMP_GIC_DBG("%s: bank-%d group-en-%d\n", __func__, gpio_bank, group_en);
if (group_en == GPIO_IRQ_GROUP_EN_BANK_TYPE) {
bank_node = of_get_child_by_name(node, "bank-type-cfg");
if (!bank_node) {
pr_err("%s: group_irq_en from dtsi is error\n", __func__);
return;
}
amp_gic_get_gpio_group_bank_type_config(bank_node, amp_ctrl, gpio_grp);
of_node_put(bank_node);
} else if (group_en == GPIO_IRQ_GROUP_EN_GROUP_TYPE) {
amp_gic_get_gpio_group_type_config(node, amp_ctrl, gpio_grp);
}
}
static void amp_gic_get_gpios_group_config(struct device_node *np,
struct amp_gic_ctrl_s *amp_ctrl)
{
struct device_node *gpio_group_node, *node;
int i = 0;
if (of_property_read_u32_array(np, "gpio-group-banks",
&amp_ctrl->gpio_banks, 1))
return;
if (amp_ctrl->gpio_banks >= GPIO_BANK_NUM) {
pr_err("%s: gpio_banks is overflow\n", __func__);
return;
}
gpio_group_node = of_get_child_by_name(np, "gpio-group");
if (gpio_group_node) {
for_each_available_child_of_node(gpio_group_node, node) {
if (i >= amp_ctrl->gpio_banks)
break;
if (!gic_amp_gpio_group_get_info(node, amp_ctrl, i))
i++;
amp_gic_get_gpio_group_config(node, amp_ctrl);
}
of_node_put(gpio_group_node);
}
of_node_put(gpio_group_node);
}
static int amp_gic_get_cpumask(struct device_node *np, struct amp_gic_ctrl_s *amp_ctrl)
@@ -518,6 +618,22 @@ static void amp_gic_get_irqs_config(struct device_node *np,
}
}
static void amp_gic_irqs_config_dump(struct amp_gic_ctrl_s *amp_ctrl)
{
int irq;
struct amp_irq_cfg_s *irqs_cfg;
#if !AMP_GIC_INFO_DUMP
return;
#endif
irqs_cfg = amp_ctrl->irqs_cfg;
for (irq = 32; irq < MAX_GIC_SPI_NUM; irq++) {
AMP_GIC_DBG(" %s: irq-%d aff-%llx(%x) prio-%x flag-%d\n",
__func__, irq, irqs_cfg[irq].aff, irqs_cfg[irq].cpumask,
irqs_cfg[irq].prio, irqs_cfg[irq].amp_flag);
}
}
void rockchip_amp_get_gic_info(u32 spis_num, enum gic_type gic_version)
{
struct device_node *np;
@@ -534,8 +650,9 @@ void rockchip_amp_get_gic_info(u32 spis_num, enum gic_type gic_version)
goto exit;
}
gic_of_get_gpio_group(np, &amp_ctrl);
amp_gic_get_gpios_group_config(np, &amp_ctrl);
amp_gic_get_irqs_config(np, &amp_ctrl);
amp_gic_irqs_config_dump(&amp_ctrl);
exit:
of_node_put(np);

1
include/dt-bindings/soc/rockchip-amp.h
View File

@@ -2,6 +2,5 @@
#ifndef _DT_BINDINGS_SOC_ROCKCHIP_AMP_H
#define _DT_BINDINGS_SOC_ROCKCHIP_AMP_H
#define CPU_GET_AFFINITY(cpu, cluster) ((cpu) << 0 | ((cluster) << 8))
#define GIC_AMP_IRQ_CFG_ROUTE(_irq, _prio, _aff) (_irq) (_prio) (_aff)
#endif

2
include/uapi/linux/rk-isp2-config.h
View File

@@ -11,7 +11,7 @@
#include <linux/types.h>
#include <linux/v4l2-controls.h>
#define RKISP_API_VERSION KERNEL_VERSION(2, 4, 0)
#define RKISP_API_VERSION KERNEL_VERSION(2, 5, 0)
/****************ISP SUBDEV IOCTL*****************************/