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Merge commit 'f5432bfa9da048aba80d4c3654ce4d2ef7e67060'

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* commit 'f5432bfa9da048aba80d4c3654ce4d2ef7e67060':
  arm64: dts: rockchip: rk3576: fix apb clk to PCLK_HDPTX_APB for hdmi
  clk: rockchip: rk3576: export pclk_hdptx_apb
  media: rockchip: isp: fix ldcv irq handle

Change-Id: Id25a9f2e75fe02df9a4374a580c4dd3c6e28c577
This commit is contained in:
Tao Huang
2024-06-11 18:19:30 +08:00
parent c27e83d0f4 f5432bfa9d
commit 80c44f69af
5 changed files with 13 additions and 2 deletions
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2
arch/arm64/boot/dts/rockchip/rk3576.dtsi
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@@ -5199,7 +5199,7 @@
hdptxphy_hdmi: hdmiphy@2b000000 {
compatible = "rockchip,rk3576-hdptx-phy-hdmi", "rockchip,rk3588-hdptx-phy-hdmi";
reg = <0x0 0x2b000000 0x0 0x2000>;
clocks = <&cru CLK_PHY_REF_SRC>, <&cru PCLK_PMUPHY_ROOT>;
clocks = <&cru CLK_PHY_REF_SRC>, <&cru PCLK_HDPTX_APB>;
clock-names = "ref", "apb";
clock-output-names = "clk_hdmiphy_pixel0";
#clock-cells = <0>;

2
drivers/clk/rockchip/clk-rk3576.c
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@@ -1594,6 +1594,8 @@ static struct rockchip_clk_branch rk3576_clk_branches[] __initdata = {
RK3576_PMU_CLKGATE_CON(4), 2, GFLAGS),
GATE(PCLK_PMUPHY_ROOT, "pclk_pmuphy_root", "pclk_pmu1_root", CLK_IS_CRITICAL,
RK3576_PMU_CLKGATE_CON(5), 0, GFLAGS),
GATE(PCLK_HDPTX_APB, "pclk_hdptx_apb", "pclk_pmuphy_root", 0,
RK3576_PMU_CLKGATE_CON(0), 1, GFLAGS),
GATE(PCLK_MIPI_DCPHY, "pclk_mipi_dcphy", "pclk_pmuphy_root", 0,
RK3576_PMU_CLKGATE_CON(0), 2, GFLAGS),
GATE(PCLK_CSIDPHY, "pclk_csidphy", "pclk_pmuphy_root", 0,

8
drivers/media/platform/rockchip/isp/capture_v39.c
View File

@@ -1814,7 +1814,13 @@ end:
void rkisp_stream_ldc_end_v39(struct rkisp_device *dev)
{
struct rkisp_stream *stream = &dev->cap_dev.stream[RKISP_STREAM_LDC];
u32 val = rkisp_read(dev, ISP39_LDCV_CTRL, true);
/* ldcv_irq: ldcv enable is frame end other frame input */
if (val & ISP39_LDCV_MAP_ERROR) {
v4l2_err(&dev->v4l2_dev, "ldcv map data error\n");
return;
}
if (stream->stopping) {
if (!dev->hw_dev->is_single) {
stream->stopping = false;
@@ -1826,7 +1832,7 @@ void rkisp_stream_ldc_end_v39(struct rkisp_device *dev)
stream->streaming = false;
wake_up(&stream->done);
}
} else {
} else if (stream->streaming) {
mi_frame_end(stream, FRAME_IRQ);
}
rkisp_check_idle(dev, ISP_FRAME_LDC);

2
drivers/media/platform/rockchip/isp/regs_v3x.h
View File

@@ -2533,6 +2533,8 @@
#define ISP39_LDCV_UV_SWAP BIT(4)
#define ISP39_LDCV_LUT_MODE(x) ((x & 0x3) << 24)
#define ISP39_LDCV_FORCE_UPD BIT(26)
#define ISP39_LDCV_MAP_ERROR BIT(28)
#define ISP39_LDCV_WORKING BIT(30)
#define ISP39_LDCV_EN_SHD BIT(31)
/* mi interrupt */

1
include/dt-bindings/clock/rockchip,rk3576-cru.h
View File

@@ -557,6 +557,7 @@
#define CLK_AUDIO_FRAC_1_SRC 555
#define CLK_AUDIO_FRAC_2_SRC 556
#define CLK_AUDIO_FRAC_3_SRC 557
#define PCLK_HDPTX_APB 558
/* secure clk */
#define CLK_STIMER0_ROOT 600