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clk: rockchip: half-divider: Fix error value when bestdiv is zero

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Zero is a valid value for half-divider.

Change-Id: I23aa8afcd391da95396e5d808c3c424f993c66e3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Finley Xiao
2018-06-25 17:46:47 +08:00
committed by Tao Huang
parent c9ff2db8ab
commit 81b4efc31c
1 changed files with 3 additions and 1 deletions
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4
drivers/clk/rockchip/clk-half-divider.c
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@@ -38,6 +38,7 @@ static int clk_half_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
unsigned int i, bestdiv = 0;
unsigned long parent_rate, best = 0, now, maxdiv;
unsigned long parent_rate_saved = *best_parent_rate;
bool is_bestdiv = false;
if (!rate)
rate = 1;
@@ -77,13 +78,14 @@ static int clk_half_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
(i * 2 + 3));
if (_is_best_half_div(rate, now, best, flags)) {
is_bestdiv = true;
bestdiv = i;
best = now;
*best_parent_rate = parent_rate;
}
}
if (!bestdiv) {
if (!is_bestdiv) {
bestdiv = div_mask(width);
*best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), 1);
}