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video: rockchip: rga3: add support YUV444SP

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Change-Id: I56ba787ddda0956cde9da057473e9a3d84488630
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
This commit is contained in:
Yu Qiaowei
2023-11-15 14:17:56 +08:00
committed by Tao Huang
parent 51750294ae
commit 81ca573d7a
3 changed files with 61 additions and 8 deletions
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3
drivers/video/rockchip/rga3/include/rga.h
View File

@@ -215,6 +215,9 @@ enum rga_surf_format {
RGA_FORMAT_RGBA_2BPP = 0x30,
RGA_FORMAT_A8 = 0x31,
RGA_FORMAT_YCbCr_444_SP = 0x32,
RGA_FORMAT_YCrCb_444_SP = 0x33,
RGA_FORMAT_UNKNOWN = 0x100,
};

45
drivers/video/rockchip/rga3/rga2_reg_info.c
View File

@@ -253,14 +253,6 @@ static void RGA2_set_reg_src_info(u8 *base, struct rga2_req *msg)
bRGA_SRC_TR_COLOR0 = (u32 *) (base + RGA2_SRC_TR_COLOR0_OFFSET);
bRGA_SRC_TR_COLOR1 = (u32 *) (base + RGA2_SRC_TR_COLOR1_OFFSET);
if (msg->src.format == RGA_FORMAT_YCbCr_420_SP_10B ||
msg->src.format == RGA_FORMAT_YCrCb_420_SP_10B) {
if ((msg->src.act_w == msg->dst.act_w) &&
(msg->src.act_h == msg->dst.act_h) &&
(msg->rotate_mode == 0))
msg->rotate_mode = 1 << 6;
}
{
rotate_mode = msg->rotate_mode & 0x3;
@@ -570,6 +562,18 @@ static void RGA2_set_reg_src_info(u8 *base, struct rga2_req *msg)
xdiv = 1;
ydiv = 1;
break;
case RGA_FORMAT_YCbCr_444_SP:
src0_format = 0x3;
xdiv = 1;
ydiv = 1;
break;
case RGA_FORMAT_YCrCb_444_SP:
src0_format = 0x3;
xdiv = 1;
ydiv = 1;
src0_cbcr_swp = 1;
break;
};
reg =
@@ -1076,6 +1080,18 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
dst_format = 0xd;
dpw = 2;
break;
case RGA_FORMAT_YCbCr_444_SP:
dst_format = 0x3;
x_div = 1;
y_div = 1;
break;
case RGA_FORMAT_YCrCb_444_SP:
dst_format = 0x3;
x_div = 1;
y_div = 1;
dst_cbcr_swp = 1;
break;
};
reg =
@@ -2062,6 +2078,19 @@ static void rga_cmd_to_rga2_cmd(struct rga_scheduler_t *scheduler,
break;
}
if ((req->src.act_w == req->dst.act_w) &&
(req->src.act_h == req->dst.act_h) &&
(req->rotate_mode == 0)) {
if (req->src.format == RGA_FORMAT_YCbCr_420_SP_10B ||
req->src.format == RGA_FORMAT_YCrCb_420_SP_10B ||
req->src.format == RGA_FORMAT_YCbCr_444_SP ||
req->src.format == RGA_FORMAT_YCrCb_444_SP ||
req->dst.format == RGA_FORMAT_YCbCr_444_SP ||
req->dst.format == RGA_FORMAT_YCrCb_444_SP)
/* force select to tile mode */
req->rotate_mode = 1 << 6;
}
req->interp = req_rga->interp;
req->LUT_addr = req_rga->LUT_addr;
req->rop_mask_addr = req_rga->rop_mask_addr;

21
drivers/video/rockchip/rga3/rga_common.c
View File

@@ -67,6 +67,9 @@ bool rga_is_yuv_format(uint32_t format)
case RGA_FORMAT_YCrCb_420_SP_10B:
case RGA_FORMAT_YCbCr_422_SP_10B:
case RGA_FORMAT_YCrCb_422_SP_10B:
case RGA_FORMAT_YCbCr_444_SP:
case RGA_FORMAT_YCrCb_444_SP:
return true;
default:
return false;
@@ -193,6 +196,9 @@ bool rga_is_yuv8bit_format(uint32_t format)
case RGA_FORMAT_YUYV_420:
case RGA_FORMAT_UYVY_422:
case RGA_FORMAT_UYVY_420:
case RGA_FORMAT_YCbCr_444_SP:
case RGA_FORMAT_YCrCb_444_SP:
return true;
default:
return false;
@@ -339,6 +345,11 @@ const char *rga_get_format_name(uint32_t format)
case RGA_FORMAT_A8:
return "alpha-8";
case RGA_FORMAT_YCbCr_444_SP:
return "YCbCr444SP";
case RGA_FORMAT_YCrCb_444_SP:
return "YCrCb444SP";
default:
return "UNF";
}
@@ -361,6 +372,8 @@ int rga_get_format_bits(uint32_t format)
break;
case RGA_FORMAT_RGB_888:
case RGA_FORMAT_BGR_888:
case RGA_FORMAT_YCbCr_444_SP:
case RGA_FORMAT_YCrCb_444_SP:
bits = 24;
break;
case RGA_FORMAT_RGB_565:
@@ -440,6 +453,8 @@ int rga_get_pixel_stride_from_format(uint32_t format)
break;
case RGA_FORMAT_RGB_888:
case RGA_FORMAT_BGR_888:
case RGA_FORMAT_YCbCr_444_SP:
case RGA_FORMAT_YCrCb_444_SP:
pixel_stride = 24;
break;
case RGA_FORMAT_RGB_565:
@@ -714,6 +729,12 @@ int rga_image_size_cal(int w, int h, int format,
yrgb = w * h * 2;
break;
/* YUV FORMAT */
case RGA_FORMAT_YCbCr_444_SP:
case RGA_FORMAT_YCrCb_444_SP:
yrgb = w * h;
uv = w * h;
v = w * h;
break;
case RGA_FORMAT_YCbCr_422_SP:
case RGA_FORMAT_YCrCb_422_SP:
/* 10bit format stride is externally configured. */