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UPSTREAM: MIPS: Properly disable FPU in start_thread()

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start_thread() (called for execve(2)) clears the TIF_USEDFPU flag
without atomically disabling the FPU. With a preemptive kernel, an
unfortunately timed preemption after this could result in another
task (or KVM guest) being scheduled in with the FPU still enabled, since
lose_fpu_inatomic() only turns it off if TIF_USEDFPU is set.

Use lose_fpu(0) instead of the separate FPU / MSA management, which
should do the right thing (drop FPU properly and atomically without
saving state) and will be more future proof.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12302/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
(cherry picked from commit 76e5846d3b)
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
James Hogan
2016-02-01 13:50:36 +00:00
committed by Amit Pundir
parent 15a2b0c330
commit 8271dbbba9
1 changed files with 3 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
arch/mips/kernel/process.c
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@@ -64,12 +64,10 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
status |= KU_USER;
regs->cp0_status = status;
clear_used_math();
clear_fpu_owner();
init_dsp();
clear_thread_flag(TIF_USEDMSA);
lose_fpu(0);
clear_thread_flag(TIF_MSA_CTX_LIVE);
disable_msa();
clear_used_math();
init_dsp();
regs->cp0_epc = pc;
regs->regs[29] = sp;
}