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video: rockchip: rga3: solve csc register config differences on rga2 & rga3

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Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: I41466c510304bb21db9a24e51fe4b5e717c17525
This commit is contained in:
Li Huang
2021-12-13 15:08:51 +08:00
committed by Tao Huang
parent a85c852d62
commit 82db72bb71
2 changed files with 54 additions and 9 deletions
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3
drivers/video/rockchip/rga3/include/rga.h
View File

@@ -279,6 +279,9 @@ struct rga_win_info_t {
unsigned short vir_w;
unsigned short vir_h;
unsigned short y2r_mode;
unsigned short r2y_mode;
unsigned short rotate_mode;
/* RASTER or FBCD or TILE */
unsigned short rd_mode;

60
drivers/video/rockchip/rga3/rga3_reg_info.c
View File

@@ -313,10 +313,17 @@ static void RGA3_set_reg_win0_info(u8 *base, struct rga3_req *msg)
reg =
((reg & (~m_RGA3_WIN0_RD_CTRL_SW_WIN0_RD_FORMAT)) |
(s_RGA3_WIN0_RD_CTRL_SW_WIN0_RD_FORMAT(win_interleaved)));
//warning: TRM not complete
reg =
((reg & (~m_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE)) |
(s_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE(msg->yuv2rgb_mode)));
if (win_r2y == 1) {
reg =
((reg & (~m_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE)) |
(s_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE(msg->win0.r2y_mode)));
} else if (win_y2r == 1) {
reg =
((reg & (~m_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE)) |
(s_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE(msg->win0.y2r_mode)));
}
/* rotate & mirror */
if (msg->win1.yrgb_addr == 0) {
reg =
@@ -721,10 +728,17 @@ static void RGA3_set_reg_win1_info(u8 *base, struct rga3_req *msg)
reg =
((reg & (~m_RGA3_WIN1_RD_CTRL_SW_WIN1_RD_FORMAT)) |
(s_RGA3_WIN1_RD_CTRL_SW_WIN1_RD_FORMAT(win_interleaved)));
//warning: TRM not complete
reg =
((reg & (~m_RGA3_WIN1_RD_CTRL_SW_WIN1_CSC_MODE)) |
(s_RGA3_WIN1_RD_CTRL_SW_WIN1_CSC_MODE(msg->yuv2rgb_mode)));
if (win_r2y == 1) {
reg =
((reg & (~m_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE)) |
(s_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE(msg->win1.r2y_mode)));
} else if (win_y2r == 1) {
reg =
((reg & (~m_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE)) |
(s_RGA3_WIN0_RD_CTRL_SW_WIN0_CSC_MODE(msg->win1.y2r_mode)));
}
/* rotate & mirror */
reg =
((reg & (~m_RGA3_WIN1_RD_CTRL_SW_WIN1_ROT)) |
@@ -1528,7 +1542,35 @@ void rga_cmd_to_rga3_cmd(struct rga_req *req_rga, struct rga3_req *req)
req->win0_a_global_val = req_rga->alpha_global_value;
req->win1_a_global_val = req_rga->alpha_global_value;
req->yuv2rgb_mode = req_rga->yuv2rgb_mode;
/* yuv to rgb */
/* 601 limit */
if (req_rga->yuv2rgb_mode == 1) {
req->win0.y2r_mode = 0;
req->win1.y2r_mode = 0;
/* 601 full */
} else if (req_rga->yuv2rgb_mode == 2) {
req->win0.y2r_mode = 2;
req->win1.y2r_mode = 2;
/* 709 limit */
} else if (req_rga->yuv2rgb_mode == 3) {
req->win0.y2r_mode = 1;
req->win1.y2r_mode = 1;
}
/* rgb to yuv */
/* 601 limit */
if ((req_rga->yuv2rgb_mode >> 2) == 1) {
req->win0.r2y_mode = 0;
req->win1.r2y_mode = 0;
/* 601 full */
} else if ((req_rga->yuv2rgb_mode >> 2) == 2) {
req->win0.r2y_mode = 2;
req->win1.r2y_mode = 2;
/* 709 limit */
} else if ((req_rga->yuv2rgb_mode >> 2) == 3) {
req->win0.r2y_mode = 1;
req->win1.r2y_mode = 1;
}
/* color key */
req->color_key_min = req_rga->color_key_min;