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3288: update i2c dts

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wdc
2014-03-07 09:32:27 +08:00
parent 284bbb1201
commit 82e57373cb
1 changed files with 33 additions and 34 deletions
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67
arch/arm/boot/dts/rk3288.dtsi
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@@ -13,6 +13,7 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
};
cpus {
@@ -120,10 +121,8 @@
//pinctrl-1 = <&i2c1_gpio>;
//gpios = <&gpio8 GPIO_A4 GPIO_ACTIVE_LOW>, <&gpio8 GPIO_A5 GPIO_ACTIVE_LOW>;
//clocks = <&clk_gates8 5>;
rockchip,check-idle = <1>;
status = "disabled";
rockchip,check-idle = <1>;
status = "disabled";
};
i2c2: i2c@ff660000 {
@@ -148,10 +147,10 @@
#address-cells = <1>;
#size-cells = <0>;
//pinctrl-names = "default", "gpio";
//pinctrl-0 = <&i2c2_sda &i2c2_scl>;
//pinctrl-1 = <&i2c2_gpio>;
//pinctrl-0 = <&i2c3_sda &i2c3_scl>;
//pinctrl-1 = <&i2c3_gpio>;
//gpios = <&gpio2 GPIO_C1 GPIO_ACTIVE_LOW>, <&gpio2 GPIO_C0 GPIO_ACTIVE_LOW>;
//clocks = <&clk_gates8 6>;
//clocks = <&clk_gates8 7>;
rockchip,check-idle = <1>;
status = "disabled";
};
@@ -163,28 +162,28 @@
#address-cells = <1>;
#size-cells = <0>;
//pinctrl-names = "default", "gpio";
//pinctrl-0 = <&i2c3_sda &i2c3_scl>;
//pinctrl-1 = <&i2c3_gpio>;
//pinctrl-0 = <&i2c4_sda &i2c4_scl>;
//pinctrl-1 = <&i2c4_gpio>;
//gpios = <&gpio7 GPIO_C1 GPIO_ACTIVE_LOW>, <&gpio7 GPIO_C2 GPIO_ACTIVE_LOW>;
//clocks = <&clk_gates8 7>;
//clocks = <&clk_gates8 8>;
rockchip,check-idle = <1>;
status = "disabled";
};
i2c5: i2c@ff170000 {
compatible = "rockchip,rk30-i2c";
reg = <0xff170000 0x1000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
//pinctrl-names = "default", "gpio";
//pinctrl-0 = <&i2c4_sda &i2c4_scl>;
//pinctrl-1 = <&i2c4_gpio>;
//gpios = <&gpio7 GPIO_C3 GPIO_ACTIVE_LOW>, <&gpio7 GPIO_C4 GPIO_ACTIVE_LOW>;
//clocks = <&clk_gates8 8>;
rockchip,check-idle = <1>;
status = "disabled";
i2c5: i2c@ff170000 {
compatible = "rockchip,rk30-i2c";
reg = <0xff170000 0x1000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
//pinctrl-names = "default", "gpio";
//pinctrl-0 = <&i2c5_sda &i2c5_scl>;
//pinctrl-1 = <&i2c5_gpio>;
//gpios = <&gpio7 GPIO_C3 GPIO_ACTIVE_LOW>, <&gpio7 GPIO_C4 GPIO_ACTIVE_LOW>;
//clocks = <&clk_gates8 8>;
rockchip,check-idle = <1>;
status = "disabled";
};
edp: edp@ff970000 {
@@ -205,17 +204,17 @@
status = "disabled";
};
adc: adc@ff100000 {
compatible = "rockchip,saradc";
reg = <0xff100000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
io-channel-ranges;
rockchip,adc-vref = <1800>;
clock-frequency = <1000000>;
clock-names = "saradc", "pclk_saradc";
status = "disabled";
};
adc: adc@ff100000 {
compatible = "rockchip,saradc";
reg = <0xff100000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
io-channel-ranges;
rockchip,adc-vref = <1800>;
clock-frequency = <1000000>;
clock-names = "saradc", "pclk_saradc";
status = "disabled";
};
rga@ff920000 {
compatible = "rockchip,rga";