shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-05 18:41:58 +09:00
Code Issues Packages Projects Releases Wiki Activity

Revert "FROMLIST: scsi: ufs: Add dev ref clock gating wait time support"

Browse Source 
This reverts commit 1ddc9771d5.

In order to merge with the scsi code upstream, this needs to be
reverted.  Hopefully we can merge it back later...

Bug: 143632303
Link: https://lore.kernel.org/patchwork/patch/1149892/
Cc: Can Guo <cang@codeaurora.org>
Cc: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I18af522146462e8212e8ffba437fbb23bca3318a
This commit is contained in:
Greg Kroah-Hartman
2020-02-03 11:48:46 +00:00
parent 2fa0ed8af5
commit 8326ceb4bc
2 changed files with 0 additions and 49 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/scsi/ufs/ufs.h
View File

@@ -168,7 +168,6 @@ enum attr_idn {
QUERY_ATTR_IDN_FFU_STATUS = 0x14,
QUERY_ATTR_IDN_PSA_STATE = 0x15,
QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16,
QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
};
/* Descriptor idn for Query requests */
@@ -531,8 +530,6 @@ struct ufs_dev_info {
bool f_power_on_wp_en;
/* Keeps information if any of the LU is power on write protected */
bool is_lu_power_on_wp;
u16 spec_version;
u32 clk_gating_wait_us;
};
#define MAX_MODEL_LEN 16

46
drivers/scsi/ufs/ufshcd.c
View File

@@ -92,9 +92,6 @@
/* default delay of autosuspend: 2000 ms */
#define RPM_AUTOSUSPEND_DELAY_MS 2000
/* Default value of wait time before gating device ref clock */
#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
({ \
int _ret; \
@@ -3410,37 +3407,6 @@ static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
param_offset, param_read_buf, param_size);
}
static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
{
int err = 0;
u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
if (hba->dev_info.spec_version >= 0x300) {
err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
&gating_wait);
if (err)
dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
err, gating_wait);
if (gating_wait == 0) {
gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
gating_wait);
}
/*
* bRefClkGatingWaitTime defines the minimum time for which the
* reference clock is required by device during transition from
* HS-MODE to LS-MODE or HIBERN8 state. Give it more time to be
* on the safe side.
*/
hba->dev_info.clk_gating_wait_us = gating_wait + 50;
}
return err;
}
/**
* ufshcd_memory_alloc - allocate memory for host memory space data structures
* @hba: per adapter instance
@@ -6746,10 +6712,6 @@ static int ufs_get_device_desc(struct ufs_hba *hba,
dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
/* getting Specification Version in big endian format */
hba->dev_info.spec_version = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
err = ufshcd_read_string_desc(hba, model_index,
&dev_desc->model, SD_ASCII_STD);
@@ -7166,9 +7128,6 @@ static int ufshcd_probe_hba(struct ufs_hba *hba)
/* clear any previous UFS device information */
memset(&hba->dev_info, 0, sizeof(hba->dev_info));
ufshcd_get_ref_clk_gating_wait(hba);
if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
hba->dev_info.f_power_on_wp_en = flag;
@@ -7495,17 +7454,12 @@ static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
struct ufs_clk_info *clki;
struct list_head *head = &hba->clk_list_head;
unsigned long flags;
unsigned long gating_wait;
ktime_t start = ktime_get();
bool clk_state_changed = false;
if (list_empty(head))
goto out;
gating_wait = (unsigned long)hba->dev_info.clk_gating_wait_us;
if (!on && !skip_ref_clk && !!gating_wait)
usleep_range(gating_wait, gating_wait + 10);
ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
if (ret)
return ret;