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ARM64: dts: rockchip: fix errors of i2c1 and i2c2

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The regs and clocks of i2c1 and i2c2 are uncorrect,
fix it by swapping their address and clock id.

Change-Id: I3df9fa8e82703204a8ca7c485d63197eaa62e85e
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
This commit is contained in:
Xu Jianqun
2015-12-28 15:30:04 +08:00
committed by Gerrit Code Review
parent dee022b47f
commit 83eee8537b
1 changed files with 6 additions and 6 deletions
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12
arch/arm64/boot/dts/rockchip/rk3368.dtsi
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@@ -333,16 +333,16 @@
status = "disabled";
};
i2c1: i2c@ff140000 {
i2c2: i2c@ff140000 {
compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
reg = <0x0 0xff140000 0x0 0x1000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "i2c";
clocks = <&cru PCLK_I2C1>;
clocks = <&cru PCLK_I2C2>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_xfer>;
pinctrl-0 = <&i2c2_xfer>;
status = "disabled";
};
@@ -492,16 +492,16 @@
status = "disabled";
};
i2c2: i2c@ff660000 {
i2c1: i2c@ff660000 {
compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
reg = <0x0 0xff660000 0x0 0x1000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "i2c";
clocks = <&cru PCLK_I2C2>;
clocks = <&cru PCLK_I2C1>;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_xfer>;
pinctrl-0 = <&i2c1_xfer>;
status = "disabled";
};