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rk2928:sdk: setup arm clk 1GHz

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chenxing
2012-08-08 17:01:58 +08:00
parent 8e978b14e9
commit 845f7cc0bd
1 changed files with 1 additions and 1 deletions
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arch/arm/mach-rk2928/clock_data.c
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@@ -2409,7 +2409,7 @@ static void __init rk2928_clock_common_init(unsigned long gpll_rate,unsigned lon
{
CLKDATA_DBG("ENTER %s\n", __func__);
clk_set_rate_nolock(&clk_core_pre, 650 * MHZ);//816
clk_set_rate_nolock(&clk_core_pre, 1000 * MHZ);//816
//general
clk_set_rate_nolock(&general_pll_clk, gpll_rate);
//code pll