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clk: rockchip: rv1126b: Mark clk timer5 as critical

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Change-Id: I9cdb9dfae6f9004101a128198c105aabde25fc54
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This commit is contained in:
Finley Xiao
2025-06-13 14:31:59 +08:00
committed by Tao Huang
parent 5fe15ec28a
commit 84cd2182e7
1 changed files with 1 additions and 1 deletions
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drivers/clk/rockchip/clk-rv1126b.c
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@@ -866,7 +866,7 @@ static struct rockchip_clk_branch rv1126b_clk_branches[] __initdata = {
RV1126B_BUSCLKGATE_CON(2), 14, GFLAGS),
GATE(HCLK_RKRNG_NS, "hclk_rkrng_ns", "hclk_rkrng_s_ns", 0,
RV1126B_BUSCLKGATE_CON(2), 15, GFLAGS),
GATE(CLK_TIMER5, "clk_timer5", "clk_timer_root", 0,
GATE(CLK_TIMER5, "clk_timer5", "clk_timer_root", CLK_IS_CRITICAL,
RV1126B_BUSCLKGATE_CON(2), 11, GFLAGS),
GATE(PCLK_I2C0, "pclk_i2c0", "pclk_bus_root", 0,
RV1126B_BUSCLKGATE_CON(3), 0, GFLAGS),