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dv: fix black screen when connecting dv TV [1/1]

Browse Source 
PD#SWPL-7778

Problem:
black sreen when connecting dv TV

Solution:
close post matrix
open tm2 dv flag

Verify:
T962E2

Change-Id: I828b32d7bf2ef35c3f236ad9bf15964272d06dd2
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
This commit is contained in:
Yi Zhou
2019-04-17 10:48:00 +08:00
committed by Chris KIM
parent 75cd568078
commit 860530781e
2 changed files with 32 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
drivers/amlogic/media/enhancement/amdolby_vision/amdolby_vision.c
View File

@@ -1139,14 +1139,14 @@ bool is_meson_tvmode(void)
return false;
}
static u32 addr_map(u32 adr)
{
u32 CORE1_BASE = 0;
u32 CORE1_1_BASE = 0;
u32 CORE2A_BASE = 0;
u32 CORE3_BASE = 0;
u32 CORETV_BASE = 0;
static u32 CORE1_BASE;
static u32 CORE1_1_BASE;
static u32 CORE2A_BASE;
static u32 CORE3_BASE;
static u32 CORETV_BASE;
static void dolby_vision_addr(void)
{
if (is_meson_gxm() || is_meson_g12()) {
CORE1_BASE = 0x3300;
CORE2A_BASE = 0x3400;
@@ -1162,6 +1162,9 @@ static u32 addr_map(u32 adr)
CORE3_BASE = 0x3600;
CORETV_BASE = 0x4300;
}
}
static u32 addr_map(u32 adr)
{
if (adr & CORE1_OFFSET)
adr = (adr & 0xffff) + CORE1_BASE;
@@ -2374,7 +2377,6 @@ static int dolby_core3_set(
VSYNC_WR_DV_REG(DOLBY_CORE3_REG_START + 1, cur_dv_mode);
VSYNC_WR_DV_REG(DOLBY_CORE3_REG_START + 1, cur_dv_mode);
/* for delay */
if (dm_count == 0)
count = 26;
else
@@ -2411,7 +2413,7 @@ static int dolby_core3_set(
if ((dolby_vision_flags & FLAG_CERTIFICAION)
&& !(dolby_vision_flags & FLAG_DISABLE_CRC))
VSYNC_WR_DV_REG(0x36fb, 1);
VSYNC_WR_DV_REG(DOLBY_CORE3_CRC_CTRL, 1);
/* enable core3 */
VSYNC_WR_DV_REG(DOLBY_CORE3_SWAP_CTRL0, (dolby_enable << 0));
return 0;
@@ -6045,10 +6047,8 @@ int dolby_vision_process(struct vframe_s *vf, u32 display_size,
if (!is_meson_box() && !is_meson_txlx() && !is_meson_tm2())
return -1;
if ((dolby_vision_enable == 1) && (tv_mode == 1)) {
if ((dolby_vision_enable == 1) && (tv_mode == 1))
amdolby_vision_wakeup_queue();
pr_dolby_dbg("wake up dv status queue\n");
}
if (dolby_vision_flags & FLAG_CERTIFICAION) {
if (vf) {
@@ -6082,13 +6082,13 @@ int dolby_vision_process(struct vframe_s *vf, u32 display_size,
ott_mode =
(tv_dovi_setting->input_mode !=
INPUT_MODE_HDMI);
if ((is_meson_txlx_stbmode()
|| is_meson_box()
|| force_stb_mode)
if ((is_meson_txlx_stbmode() ||
is_meson_tm2_stbmode() ||
is_meson_box() || force_stb_mode)
&& (setting_update_count == 1)
&& (crc_read_delay == 1)) {
/* work around to enable crc for frame 0 */
VSYNC_WR_DV_REG(0x36fb, 1);
VSYNC_WR_DV_REG(DOLBY_CORE3_CRC_CTRL, 1);
crc_read_delay++;
} else {
crc_read_delay++;
@@ -6968,7 +6968,7 @@ static int amdolby_vision_probe(struct platform_device *pdev)
ret = PTR_ERR(devp->dev);
goto fail_create_device;
}
dolby_vision_addr();
dolby_vision_init_receiver(pdev);
init_waitqueue_head(&devp->dv_queue);
pr_info("%s: ok\n", __func__);

15
drivers/amlogic/media/osd/osd_fb.c
View File

@@ -3990,6 +3990,21 @@ static struct osd_device_data_s osd_sm1 = {
.has_viu2 = 1,
};
static struct osd_device_data_s osd_tm2 = {
.cpu_id = __MESON_CPU_MAJOR_ID_TM2,
.osd_ver = OSD_HIGH_ONE,
.afbc_type = MALI_AFBC,
.osd_count = 4,
.has_deband = 1,
.has_lut = 1,
.has_rdma = 1,
.has_dolby_vision = 1,
.osd_fifo_len = 64, /* fifo len 64*8 = 512 */
.vpp_fifo_len = 0xfff,/* 2048 */
.dummy_data = 0x00808000,
.has_viu2 = 1,
};
static const struct of_device_id meson_fb_dt_match[] = {
{
.compatible = "amlogic, meson-gxbb",