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ARM64: dts: rk3399: assign VOP parent and rate for ACLK/HCLK

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Change-Id: Ifcce7764eb709386e40140c58299468ea835fd8c
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
This commit is contained in:
Xing Zheng
2016-04-07 17:29:44 +08:00
committed by Tao Huang
parent 24eae037d6
commit 861969884f
1 changed files with 4 additions and 0 deletions
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4
arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -1291,6 +1291,8 @@
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
<&cru ACLK_VOP0>, <&cru HCLK_VOP0>,
<&cru ACLK_VOP1>, <&cru HCLK_VOP1>,
<&cru ARMCLKL>, <&cru ARMCLKB>,
<&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru PLL_NPLL>,
@@ -1303,6 +1305,8 @@
<&cru ACLK_GIC_PRE>,
<&cru PCLK_DDR>;
assigned-clock-rates =
<400000000>, <200000000>,
<400000000>, <200000000>,
<816000000>, <1008000000>,
<594000000>, <800000000>,
<1000000000>,