shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 20:07:46 +09:00
Code Issues Packages Projects Releases Wiki Activity

clk: rockchip: px30: Fix i2s out mclk

Browse Source 
Fixes: f6128506aa ("clk: rockchip: px30: Fix i2s out mclk")
Change-Id: I90dd4d1cdb1f3a2e9009dcb574115a5e7504fc32
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
Wyon Bi
2018-03-26 16:57:14 +08:00
committed by Tao Huang
parent 158d412110
commit 868a2dedf0
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/clk/rockchip/clk-px30.c
View File

@@ -609,7 +609,7 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
&px30_i2s1_fracmux, PX30_I2S_FRAC_MAX_PRATE),
GATE(SCLK_I2S1, "clk_i2s1", "clk_i2s1_mux", CLK_SET_RATE_PARENT,
PX30_CLKGATE_CON(10), 2, GFLAGS),
COMPOSITE_NODIV(SCLK_I2S1_OUT, "clk_i2s1_out_pre", mux_i2s1_out_p, 0,
COMPOSITE_NODIV(0, "clk_i2s1_out_pre", mux_i2s1_out_p, 0,
PX30_CLKSEL_CON(30), 15, 1, MFLAGS,
PX30_CLKGATE_CON(10), 3, GFLAGS),
GATE(SCLK_I2S1_OUT, "clk_i2s1_out", "clk_i2s1_out_pre", CLK_SET_RATE_PARENT,