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ODROID-COMMON:HDMI HPLL clk accuracy Improvements (1280x800p60hz)

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Signed-off-by: ckkim <changkon12@gmail.com>
Change-Id: I906a330c0c590f7e39e7eaaae60418cf6f0aa656
This commit is contained in:
ckkim
2022-02-28 15:04:32 +09:00
parent 6bc17f7c93
commit 868cd56a97
2 changed files with 6 additions and 6 deletions
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10
drivers/amlogic/media/vout/hdmitx/hdmi_common/hdmi_parameters.c
View File

@@ -2218,11 +2218,11 @@ static struct hdmi_format_para fmt_para_vesa_1280x800p60_8x5 = {
.progress_mode = 1,
.scrambler_en = 0,
.tmds_clk_div40 = 0,
.tmds_clk = 83500,
.tmds_clk = 71366,
.timing = {
.pixel_freq = 83500,
.h_freq = 49380,
.v_freq = 59910,
.pixel_freq = 71366,
.h_freq = 49560,
.v_freq = 60000,
.vsync = 60,
.vsync_polarity = 1,
.hsync_polarity = 1,
@@ -2250,7 +2250,7 @@ static struct hdmi_format_para fmt_para_vesa_1280x800p60_8x5 = {
.aspect_ratio_den = 5,
.sync_duration_num = 60,
.sync_duration_den = 1,
.video_clk = 83500000,
.video_clk = 71366000,
.htotal = 1440,
.vtotal = 823,
.fr_adj_type = VOUT_FR_ADJ_HDMI,

2
drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
View File

@@ -889,7 +889,7 @@ static struct hw_enc_clk_val_group setting_enc_clk_val_24[] = {
{{HDMIV_1280x800p60hz,
HDMI_VIC_END},
#if defined(CONFIG_ARCH_MESON64_ODROID_COMMON)
1422000, 2, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1},
2854640, 4, 1, 1, VID_PLL_DIV_5, 2, 1, 1, -1},
#else
5680000, 4, 2, 1, VID_PLL_DIV_5, 2, 1, 1, -1},
#endif