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arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro
Add Nodes to Bananapi-R2-Pro board to support PCIe v3 and set PCIe related regulators to always on. Suggested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220825193836.54262-6-linux@fw-web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
committed by
Heiko Stuebner
parent
faedfa5b40
commit
86973ae035
@@ -86,6 +86,66 @@
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vin-supply = <&dc_12v>;
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};
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pcie30_avdd0v9: pcie30-avdd0v9-regulator {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd0v9";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <&vcc3v3_sys>;
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};
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pcie30_avdd1v8: pcie30-avdd1v8-regulator {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc3v3_sys>;
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};
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/* pi6c pcie clock generator feeds both ports */
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vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <200000>;
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vin-supply = <&vcc5v0_sys>;
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};
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/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
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vcc3v3_minipcie: vcc3v3-minipcie-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_minipcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&minipcie_enable_h>;
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startup-delay-us = <50000>;
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vin-supply = <&vcc3v3_pi6c_05>;
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};
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/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
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vcc3v3_ngff: vcc3v3-ngff-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_ngff";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&ngffpcie_enable_h>;
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startup-delay-us = <50000>;
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vin-supply = <&vcc3v3_pi6c_05>;
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};
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vcc5v0_usb: vcc5v0_usb {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb";
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@@ -513,6 +573,32 @@
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};
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};
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&pcie30phy {
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data-lanes = <1 2>;
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phy-supply = <&vcc3v3_pi6c_05>;
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status = "okay";
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};
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&pcie3x1 {
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/* M.2 slot */
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num-lanes = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&ngffpcie_reset_h>;
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reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_ngff>;
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status = "okay";
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};
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&pcie3x2 {
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/* mPCIe slot */
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num-lanes = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&minipcie_reset_h>;
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reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_minipcie>;
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status = "okay";
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};
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&pinctrl {
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leds {
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blue_led_pin: blue-led-pin {
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@@ -529,6 +615,24 @@
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};
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};
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pcie {
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minipcie_enable_h: minipcie-enable-h {
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rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
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};
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ngffpcie_enable_h: ngffpcie-enable-h {
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rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
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};
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minipcie_reset_h: minipcie-reset-h {
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rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
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};
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ngffpcie_reset_h: ngffpcie-reset-h {
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rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
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};
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};
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pmic {
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pmic_int: pmic_int {
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rockchip,pins =
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@@ -708,6 +812,19 @@
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status = "okay";
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};
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&usb2phy1 {
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/* USB for PCIe/M2 */
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status = "okay";
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};
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&usb2phy1_host {
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status = "okay";
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};
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&usb2phy1_otg {
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status = "okay";
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};
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&vop {
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assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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