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arm64: dts: rockchip: px30: add nodes of USB controllers

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Add DWC2 controller, EHCI controller, OHCI controller and USB
PHY nodes to support USB.

Change-Id: If5dfb7c18cdc369d92eff5c8ddcc2f0dde01cc36
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
This commit is contained in:
Meng Dongyang
2018-01-08 18:03:08 +08:00
committed by Tao Huang
parent 0a4de3c3e0
commit 86c51b0eac
1 changed files with 79 additions and 0 deletions
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79
arch/arm64/boot/dts/rockchip/px30.dtsi
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@@ -605,6 +605,44 @@
<150000000>, <75000000>;
};
usb2phy_grf: syscon@ff2c0000 {
compatible = "rockchip,px30-usb2phy-grf", "syscon",
"simple-mfd";
reg = <0x0 0xff2c0000 0x0 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
u2phy: usb2-phy@100 {
compatible = "rockchip,px30-usb2phy",
"rockchip,rk3328-usb2phy";
reg = <0x100 0x10>;
clocks = <&cru SCLK_USBPHY_REF>;
clock-names = "phyclk";
#clock-cells = <0>;
assigned-clocks = <&cru USB480M>;
assigned-clock-parents = <&u2phy>;
clock-output-names = "usb480m_phy";
status = "disabled";
u2phy_host: host-port {
#phy-cells = <0>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "linestate";
status = "disabled";
};
u2phy_otg: otg-port {
#phy-cells = <0>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "otg-bvalid", "otg-id",
"linestate";
status = "disabled";
};
};
};
mipi_dphy: mipi-dphy@ff2e0000 {
compatible = "rockchip,px30-mipi-dphy";
reg = <0x0 0xff2e0000 0x0 0x10000>;
@@ -651,6 +689,47 @@
};
};
usb20_otg: usb@ff300000 {
compatible = "rockchip,px30-usb", "rockchip,rk3066-usb",
"snps,dwc2";
reg = <0x0 0xff300000 0x0 0x40000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_OTG>;
clock-names = "otg";
dr_mode = "otg";
g-np-tx-fifo-size = <16>;
g-rx-fifo-size = <275>;
g-tx-fifo-size = <256 128 128 64 64 32>;
g-use-dma;
phys = <&u2phy_otg>;
phy-names = "usb2-phy";
status = "disabled";
};
usb_host0_ehci: usb@ff340000 {
compatible = "generic-ehci";
reg = <0x0 0xff340000 0x0 0x10000>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
<&u2phy>;
clock-names = "usbhost", "arbiter", "utmi";
phys = <&u2phy_host>;
phy-names = "usb";
status = "disabled";
};
usb_host0_ohci: usb@ff350000 {
compatible = "generic-ohci";
reg = <0x0 0xff350000 0x0 0x10000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
<&u2phy>;
clock-names = "usbhost", "arbiter", "utmi";
phys = <&u2phy_host>;
phy-names = "usb";
status = "disabled";
};
sdmmc: dwmmc@ff370000 {
compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff370000 0x0 0x4000>;