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dts: t309: change tuner to r842 [2/2]

Browse Source 
PD#SWPL-4482

Problem:
used wrong tuner

Solution:
set tuner to r842

Verify:
verify by t309

Change-Id: I22fb3b6800e9f8cdeb03a307067d07d3e2190be1
Signed-off-by: Lei Qian <lei.qian@amlogic.com>
This commit is contained in:
Lei Qian
2019-01-21 19:52:19 +08:00
parent 5c5d26cfbc
commit 875989f1d7
4 changed files with 52 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
arch/arm/boot/dts/amlogic/mesontl1.dtsi
View File

@@ -2062,12 +2062,27 @@
};
};
atvdemod_agc_pins: atvdemod_agc_pins {
mux {
groups = "atv_if_agc_dv";
function = "atv";
};
};
dtvdemod_agc_pins: dtvdemod_agc_pins {
mux {
groups = "dtv_if_agc_dv2";
function = "dtv";
};
};
lcd_vbyone_pins: lcd_vbyone_pin {
mux {
groups = "vx1_lockn","vx1_htpdn";
function = "vx1";
};
};
lcd_vbyone_off_pins: lcd_vbyone_off_pin {
mux {
groups = "GPIOH_15","GPIOH_16";

21
arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts
View File

@@ -272,8 +272,8 @@
dev_name = "aml_dtv_demod";
status = "okay";
//pinctrl-names="dtvdemod_agc";
//pinctrl-0=<&dtvdemod_agc>;
pinctrl-names="dtvdemod_agc_pins";
pinctrl-0=<&dtvdemod_agc_pins>;
clocks = <&clkc CLKID_DAC_CLK>;
clock-names = "vdac_clk_gate";
@@ -1104,16 +1104,19 @@
};
tuner: tuner {
compatible = "amlogic, tuner";
status = "okay";
tuner_name = "mxl661_tuner";
tuner_name = "r842_tuner";
tuner_i2c_adap = <&i2c0>;
tuner_i2c_addr = <0x60>;
tuner_i2c_addr = <0xf6>;
tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */
tuner_xtal_mode = <3>;
tuner_xtal_mode = <0>;
/* NO_SHARE_XTAL(0)
* SLAVE_XTAL_SHARE(3)
* MASTER_TO_SLAVE_XTAL_IN(1)
* MASTER_TO_SLAVE_XTAL_OUT(2)
* SLAVE_XTAL_OUT(3)
*/
tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */
tuner_xtal_cap = <38>; /* when tuner_xtal_mode = 3, set 25 */
};
atv-demod {
@@ -1121,8 +1124,8 @@
status = "okay";
tuner = <&tuner>;
btsc_sap_mode = <1>;
/* pinctrl-names="atvdemod_agc_pins"; */
/* pinctrl-0=<&atvdemod_agc_pins>; */
pinctrl-names="atvdemod_agc_pins";
pinctrl-0=<&atvdemod_agc_pins>;
reg = <0xff656000 0x2000 /* demod reg */
0xff63c000 0x2000 /* hiu reg */
0xff634000 0x2000 /* periphs reg */

14
arch/arm64/boot/dts/amlogic/mesontl1.dtsi
View File

@@ -2043,6 +2043,20 @@
};
};
atvdemod_agc_pins: atvdemod_agc_pins {
mux {
groups = "atv_if_agc_dv";
function = "atv";
};
};
dtvdemod_agc_pins: dtvdemod_agc_pins {
mux {
groups = "dtv_if_agc_dv2";
function = "dtv";
};
};
lcd_vbyone_pins: lcd_vbyone_pin {
mux {
groups = "vx1_lockn","vx1_htpdn";

20
arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts
View File

@@ -269,8 +269,8 @@
dev_name = "aml_dtv_demod";
status = "okay";
//pinctrl-names="dtvdemod_agc";
//pinctrl-0=<&dtvdemod_agc>;
pinctrl-names="dtvdemod_agc_pins";
pinctrl-0=<&dtvdemod_agc_pins>;
clocks = <&clkc CLKID_DAC_CLK>;
clock-names = "vdac_clk_gate";
@@ -1103,15 +1103,17 @@
tuner: tuner {
compatible = "amlogic, tuner";
status = "okay";
tuner_name = "mxl661_tuner";
tuner_name = "r842_tuner";
tuner_i2c_adap = <&i2c0>;
tuner_i2c_addr = <0x60>;
tuner_i2c_addr = <0xf6>;
tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */
tuner_xtal_mode = <3>;
tuner_xtal_mode = <0>;
/* NO_SHARE_XTAL(0)
* SLAVE_XTAL_SHARE(3)
* MASTER_TO_SLAVE_XTAL_IN(1)
* MASTER_TO_SLAVE_XTAL_OUT(2)
* SLAVE_XTAL_OUT(3)
*/
tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */
tuner_xtal_cap = <38>; /* when tuner_xtal_mode = 3, set 25 */
};
atv-demod {
@@ -1119,8 +1121,8 @@
status = "okay";
tuner = <&tuner>;
btsc_sap_mode = <1>;
/* pinctrl-names="atvdemod_agc_pins"; */
/* pinctrl-0=<&atvdemod_agc_pins>; */
pinctrl-names="atvdemod_agc_pins";
pinctrl-0=<&atvdemod_agc_pins>;
reg = <0x0 0xff656000 0x0 0x2000 /* demod reg */
0x0 0xff63c000 0x0 0x2000 /* hiu reg */
0x0 0xff634000 0x0 0x2000 /* periphs reg */