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audio: fix pdm Asynchronous FIFO for channel shift issue
PD#152798: audio: fix pdm channel shift issue Change-Id: I1ed76602041625eba2bd6f9691b3d0b8138eac31 Signed-off-by: Xing Wang <xing.wang@amlogic.com>
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@@ -539,9 +539,12 @@ static int aml_pdm_dai_trigger(
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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pdm_fifo_reset();
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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dev_info(substream->pcm->card->dev, "pdm capture enable\n");
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aml_toddr_enable(p_pdm->tddr, 1);
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pdm_enable(1);
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}
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break;
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@@ -550,6 +553,7 @@ static int aml_pdm_dai_trigger(
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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dev_info(substream->pcm->card->dev, "pdm capture enable\n");
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pdm_enable(0);
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aml_toddr_enable(p_pdm->tddr, 0);
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}
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@@ -19,6 +19,7 @@
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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/*#include <linux/delay.h>*/
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#include "pdm_hw.h"
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#include "regs.h"
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@@ -26,6 +27,39 @@
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#include "pdm_hw_coeff.c"
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extern int pdm_hcic_shift_gain;
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void pdm_enable(int is_enable)
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{
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if (is_enable) {
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aml_pdm_update_bits(
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PDM_CTRL,
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0x1 << 31,
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is_enable << 31);
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} else {
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aml_pdm_update_bits(
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PDM_CTRL,
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0x1 << 31 | 0x1 << 16,
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0 << 31 | 0 << 16);
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/*udelay(1000);*/
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}
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}
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void pdm_fifo_reset(void)
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{
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/* PDM Asynchronous FIFO soft reset.
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* write 1 to soft reset AFIFO
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*/
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aml_pdm_update_bits(
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PDM_CTRL,
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0x1 << 16,
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0 << 16);
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aml_pdm_update_bits(
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PDM_CTRL,
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0x1 << 16,
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0x1 << 16);
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}
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void aml_pdm_ctrl(
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struct aml_audio_controller *actrl,
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@@ -43,11 +77,12 @@ void aml_pdm_ctrl(
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pr_info("%s, channels mask:%x\n", __func__, ch_mask);
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aml_pdm_write(PDM_CTRL, 0);
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aml_pdm_write(PDM_CLKG_CTRL, 1);
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/* must be sure that clk and pdm is enable */
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aml_pdm_write(PDM_CTRL,
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(1 << 31) |
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aml_pdm_update_bits(PDM_CTRL,
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(0x7 << 28 | 0xff << 8 | 0xff << 0),
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/*(1 << 31) |*/
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/* invert the PDM_DCLK or not */
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(0 << 30) |
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/* output mode: 1: 24bits. 0: 32 bits */
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@@ -56,10 +91,6 @@ void aml_pdm_ctrl(
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* 1: bypass all filter. 0: normal mode.
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*/
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(0 << 28) |
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/* PDM Asynchronous FIFO soft reset.
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* write 1 to soft reset AFIFO
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*/
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(1 << 16) |
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/* PDM channel reset. */
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(ch_mask << 8) |
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/* PDM channel enable */
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@@ -384,5 +415,4 @@ void aml_pdm_filter_ctrl(int osr, int mode)
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lpf3_len, lpf3_coeff
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);
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aml_pdm_update_bits(PDM_CTRL, 1 << 31, 1 << 31);
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}
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@@ -29,4 +29,7 @@ extern int aml_pmd_set_HPF_filter_parameters(void *array);
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extern void aml_pdm_filter_ctrl(int osr, int set);
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extern void pdm_enable(int is_enable);
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extern void pdm_fifo_reset(void);
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#endif /*__AML_PDM_HW_H__*/
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