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rk3188: fix uart0 init 49.5MHz error, set uart0 = 48MHz

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chenxing
2013-06-20 18:03:11 +08:00
parent 314bfb2db7
commit 88db180a61
1 changed files with 1 additions and 1 deletions
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2
arch/arm/mach-rk3188/clock_data.c
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@@ -3553,7 +3553,7 @@ static void __init rk30_clock_common_init(unsigned long gpll_rate, unsigned long
clk_set_parent_nolock(&aclk_gpu, &general_pll_clk);
clk_set_rate_nolock(&aclk_gpu, 200 * MHZ);
clk_set_rate_nolock(&clk_uart0, 49500000);
clk_set_rate_nolock(&clk_uart0, 48000000);
clk_set_rate_nolock(&clk_sdmmc, 24750000);
clk_set_rate_nolock(&clk_sdio, 24750000);
}