dts: rockchip: add cru regmap refnode for mmc

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This commit is contained in:
Shawn Lin
2015-07-10 14:01:59 +08:00
parent 7479f23c2a
commit 8a8e0eb8b8
3 changed files with 23 additions and 0 deletions

View File

@@ -539,6 +539,8 @@
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <8>;
cru_regsbase = <0x124>;
cru_reset_offset = <3>;
};
@@ -559,6 +561,8 @@
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <4>;
cru_regsbase = <0x124>;
cru_reset_offset = <1>;
};
sdio: rksdmmc@10218000 {
@@ -577,6 +581,8 @@
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <4>;
cru_regsbase = <0x124>;
cru_reset_offset = <2>;
};
spi0: spi@20074000 {

8
arch/arm/boot/dts/rk3288.dtsi Normal file → Executable file
View File

@@ -288,6 +288,8 @@
fifo-depth = <0x100>;
bus-width = <8>;
tune_regsbase = <0x218>;
cru_regsbase = <0x1d8>;
cru_reset_offset = <3>;
};
sdmmc: rksdmmc@ff0c0000 {
@@ -306,6 +308,8 @@
fifo-depth = <0x100>;
bus-width = <4>;
tune_regsbase = <0x200>;
cru_regsbase = <0x1d8>;
cru_reset_offset = <0>;
};
sdio: rksdmmc@ff0d0000 {
@@ -324,6 +328,8 @@
fifo-depth = <0x100>;
bus-width = <4>;
tune_regsbase = <0x208>;
cru_regsbase = <0x1d8>;
cru_reset_offset = <1>;
};
sdio1: rksdmmc@ff0e0000 {
@@ -340,6 +346,8 @@
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <4>;
cru_regsbase = <0x1d8>;
cru_reset_offset = <2>;
status = "disabled";
};

9
arch/arm64/boot/dts/rk3368.dtsi Normal file → Executable file
View File

@@ -394,10 +394,13 @@
clocks = <&clk_emmc>, <&clk_gates21 2>, <&clk_gates20 10>;
clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc";
rockchip,grf = <&grf>;
rockchip,cru = <&cru>;
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <8>;
tune_regsbase = <0x418>;
cru_regsbase = <0x320>;
cru_reset_offset = <3>;
};
sdmmc: rksdmmc@ff0c0000 {
@@ -414,10 +417,13 @@
clocks = <&clk_sdmmc0>, <&clk_gates21 0>, <&clk_gates20 10>;
clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc";
rockchip,grf = <&grf>;
rockchip,cru = <&cru>;
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <4>;
tune_regsbase = <0x400>;
cru_regsbase = <0x320>;
cru_reset_offset = <0>;
};
sdio: rksdmmc@ff0d0000 {
@@ -432,10 +438,13 @@
clocks = <&clk_sdio0>, <&clk_gates21 1>, <&clk_gates20 10>;
clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc";
rockchip,grf = <&grf>;
rockchip,cru = <&cru>;
num-slots = <1>;
fifo-depth = <0x100>;
bus-width = <4>;
tune_regsbase = <0x408>;
cru_regsbase = <0x320>;
cru_reset_offset = <1>;
};
spi0: spi@ff110000 {