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https://github.com/hardkernel/linux.git
synced 2026-06-10 12:57:06 +09:00
rk29: vpu: move vpu_service from user to kernel
This commit is contained in:
@@ -158,14 +158,22 @@ config WIFI_CONTROL_FUNC
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menu "RK29 VPU (Video Processing Unit) support"
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config RK29_VPU
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tristate "Support for RK29 VPU (Video Processing Unit)"
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bool
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depends on ARCH_RK29
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default y
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config RK29_VPU_SERVICE
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bool "VPU service driver in kernel"
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depends on ARCH_RK29
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default y
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config RK29_VPU_OLD
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bool "Old version for RK29 VPU (Video Processing Unit)"
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depends on ARCH_RK29 && !RK29_VPU_SERVICE
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config RK29_VPU_DEBUG
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bool "RK29 VPU debugging"
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depends on RK29_VPU != n
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default n
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help
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This is an option for the developers; most people should
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say N here. This enables RK29 VPU driver debugging.
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@@ -8,8 +8,10 @@ obj-$(CONFIG_RK29_LAST_LOG) += last_log.o
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obj-$(CONFIG_USB_GADGET) += usb_detect.o
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obj-$(CONFIG_PM) += pm.o
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obj-$(CONFIG_CPU_FREQ) += cpufreq.o
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obj-$(CONFIG_RK29_VPU) += vpu.o vpu_mem.o
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obj-$(CONFIG_RK29_VPU) += vpu_mem.o
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obj-y += spi_sram.o
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obj-$(CONFIG_RK29_VPU_SERVICE) += vpu_service.o
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obj-$(CONFIG_RK29_VPU_OLD) += vpu.o
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obj-$(CONFIG_RK29_PWM_INSRAM) += pwm_sram.o
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obj-$(CONFIG_MACH_RK29SDK) += board-rk29sdk.o board-rk29sdk-key.o board-rk29sdk-rfkill.o board-rk29sdk-power.o
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obj-$(CONFIG_MACH_RK29SDK_DDR3) += board-rk29-ddr3sdk.o board-rk29sdk-key.o board-rk29sdk-rfkill.o board-rk29sdk-power.o
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268
arch/arm/mach-rk29/include/mach/vpu_service.h
Normal file
268
arch/arm/mach-rk29/include/mach/vpu_service.h
Normal file
@@ -0,0 +1,268 @@
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/* arch/arm/mach-rk29/include/mach/vpu_service.h
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*
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* Copyright (C) 2010 ROCKCHIP, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ARCH_ARM_MACH_RK29_VPU_SERVICE_H
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#define __ARCH_ARM_MACH_RK29_VPU_SERVICE_H
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#include <linux/ioctl.h> /* needed for the _IOW etc stuff used later */
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/*
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* Ioctl definitions
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*/
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/* Use 'k' as magic number */
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#define VPU_IOC_MAGIC 'l'
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#define VPU_IOC_SET_CLIENT_TYPE _IOW(VPU_IOC_MAGIC, 1, unsigned long)
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#define VPU_IOC_GET_HW_FUSE_STATUS _IOW(VPU_IOC_MAGIC, 2, unsigned long)
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#define VPU_IOC_SET_REG _IOW(VPU_IOC_MAGIC, 3, unsigned long)
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#define VPU_IOC_GET_REG _IOW(VPU_IOC_MAGIC, 4, unsigned long)
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// client type: decoder only<6C><79>60 registers, size 240B
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#define VPU_REG_NUM_DEC (60)
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// client type: post-process only<6C><79>41 registers, size 164B
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#define VPU_REG_NUM_PP (41)
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// client type: decoder plus post-process<73><73>101 registers, size 404B
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#define VPU_REG_NUM_DEC_PP (VPU_REG_NUM_DEC+VPU_REG_NUM_PP)
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// client type: encoder only<6C><79>96 registers, size 384B
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#define VPU_REG_NUM_ENC (96)
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typedef enum VPU_CLIENT_TYPE {
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VPU_ENC = 0x0,
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VPU_DEC = 0x1,
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VPU_PP = 0x2,
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VPU_DEC_PP = 0x3,
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VPU_TYPE_BUTT ,
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} VPU_CLIENT_TYPE;
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/* Hardware decoder configuration description */
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typedef struct VPUHwDecConfig {
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unsigned long maxDecPicWidth; /* Maximum video decoding width supported */
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unsigned long maxPpOutPicWidth; /* Maximum output width of Post-Processor */
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unsigned long h264Support; /* HW supports h.264 */
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unsigned long jpegSupport; /* HW supports JPEG */
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unsigned long mpeg4Support; /* HW supports MPEG-4 */
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unsigned long customMpeg4Support; /* HW supports custom MPEG-4 features */
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unsigned long vc1Support; /* HW supports VC-1 Simple */
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unsigned long mpeg2Support; /* HW supports MPEG-2 */
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unsigned long ppSupport; /* HW supports post-processor */
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unsigned long ppConfig; /* HW post-processor functions bitmask */
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unsigned long sorensonSparkSupport; /* HW supports Sorenson Spark */
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unsigned long refBufSupport; /* HW supports reference picture buffering */
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unsigned long vp6Support; /* HW supports VP6 */
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unsigned long vp7Support; /* HW supports VP7 */
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unsigned long vp8Support; /* HW supports VP8 */
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unsigned long avsSupport; /* HW supports AVS */
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unsigned long jpegESupport; /* HW supports JPEG extensions */
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unsigned long rvSupport; /* HW supports REAL */
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unsigned long mvcSupport; /* HW supports H264 MVC extension */
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} VPUHwDecConfig_t;
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/* Hardware encoder configuration description */
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typedef struct VPUHwEndConfig
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{
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unsigned long maxEncodedWidth; /* Maximum supported width for video encoding (not JPEG) */
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unsigned long h264Enabled; /* HW supports H.264 */
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unsigned long jpegEnabled; /* HW supports JPEG */
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unsigned long mpeg4Enabled; /* HW supports MPEG-4 */
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unsigned long vsEnabled; /* HW supports video stabilization */
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unsigned long rgbEnabled; /* HW supports RGB input */
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unsigned long busType; /* HW bus type in use */
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unsigned long busWidth;
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unsigned long synthesisLanguage;
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} VPUHwEncConfig_t;
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typedef struct VPUHwCfgReq
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{
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unsigned long *cfg;
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unsigned long size;
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} VPUHwCfgReq_t;
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#define DWL_MPEG2_E 31 /* 1 bit */
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#define DWL_VC1_E 29 /* 2 bits */
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#define DWL_JPEG_E 28 /* 1 bit */
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#define DWL_MPEG4_E 26 /* 2 bits */
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#define DWL_H264_E 24 /* 2 bits */
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#define DWL_VP6_E 23 /* 1 bit */
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#define DWL_PJPEG_E 22 /* 1 bit */
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#define DWL_REF_BUFF_E 20 /* 1 bit */
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#define DWL_JPEG_EXT_E 31 /* 1 bit */
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#define DWL_REF_BUFF_ILACE_E 30 /* 1 bit */
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#define DWL_MPEG4_CUSTOM_E 29 /* 1 bit */
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#define DWL_REF_BUFF_DOUBLE_E 28 /* 1 bit */
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#define DWL_RV_E 26 /* 2 bits */
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#define DWL_VP7_E 24 /* 1 bit */
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#define DWL_VP8_E 23 /* 1 bit */
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#define DWL_AVS_E 22 /* 1 bit */
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#define DWL_MVC_E 20 /* 2 bits */
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#define DWL_CFG_E 24 /* 4 bits */
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#define DWL_PP_E 16 /* 1 bit */
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#define DWL_SORENSONSPARK_E 11 /* 1 bit */
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#define DWL_H264_FUSE_E 31 /* 1 bit */
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#define DWL_MPEG4_FUSE_E 30 /* 1 bit */
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#define DWL_MPEG2_FUSE_E 29 /* 1 bit */
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#define DWL_SORENSONSPARK_FUSE_E 28 /* 1 bit */
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#define DWL_JPEG_FUSE_E 27 /* 1 bit */
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#define DWL_VP6_FUSE_E 26 /* 1 bit */
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#define DWL_VC1_FUSE_E 25 /* 1 bit */
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#define DWL_PJPEG_FUSE_E 24 /* 1 bit */
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#define DWL_CUSTOM_MPEG4_FUSE_E 23 /* 1 bit */
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#define DWL_RV_FUSE_E 22 /* 1 bit */
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#define DWL_VP7_FUSE_E 21 /* 1 bit */
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#define DWL_VP8_FUSE_E 20 /* 1 bit */
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#define DWL_AVS_FUSE_E 19 /* 1 bit */
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#define DWL_MVC_FUSE_E 18 /* 1 bit */
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#define DWL_DEC_MAX_1920_FUSE_E 15 /* 1 bit */
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#define DWL_DEC_MAX_1280_FUSE_E 14 /* 1 bit */
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#define DWL_DEC_MAX_720_FUSE_E 13 /* 1 bit */
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#define DWL_DEC_MAX_352_FUSE_E 12 /* 1 bit */
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#define DWL_REF_BUFF_FUSE_E 7 /* 1 bit */
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#define DWL_PP_FUSE_E 31 /* 1 bit */
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#define DWL_PP_DEINTERLACE_FUSE_E 30 /* 1 bit */
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#define DWL_PP_ALPHA_BLEND_FUSE_E 29 /* 1 bit */
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#define DWL_PP_MAX_1920_FUSE_E 15 /* 1 bit */
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#define DWL_PP_MAX_1280_FUSE_E 14 /* 1 bit */
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#define DWL_PP_MAX_720_FUSE_E 13 /* 1 bit */
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#define DWL_PP_MAX_352_FUSE_E 12 /* 1 bit */
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#define MPEG4_NOT_SUPPORTED (u32)(0x00)
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#define MPEG4_SIMPLE_PROFILE (u32)(0x01)
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#define MPEG4_ADVANCED_SIMPLE_PROFILE (u32)(0x02)
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#define MPEG4_CUSTOM_NOT_SUPPORTED (u32)(0x00)
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#define MPEG4_CUSTOM_FEATURE_1 (u32)(0x01)
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#define H264_NOT_SUPPORTED (u32)(0x00)
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#define H264_BASELINE_PROFILE (u32)(0x01)
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#define H264_MAIN_PROFILE (u32)(0x02)
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#define H264_HIGH_PROFILE (u32)(0x03)
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#define VC1_NOT_SUPPORTED (u32)(0x00)
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#define VC1_SIMPLE_PROFILE (u32)(0x01)
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#define VC1_MAIN_PROFILE (u32)(0x02)
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#define VC1_ADVANCED_PROFILE (u32)(0x03)
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#define MPEG2_NOT_SUPPORTED (u32)(0x00)
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#define MPEG2_MAIN_PROFILE (u32)(0x01)
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#define JPEG_NOT_SUPPORTED (u32)(0x00)
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#define JPEG_BASELINE (u32)(0x01)
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#define JPEG_PROGRESSIVE (u32)(0x02)
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#define PP_NOT_SUPPORTED (u32)(0x00)
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#define PP_SUPPORTED (u32)(0x01)
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#define PP_DITHERING (u32)(0x10000000)
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#define PP_SCALING (u32)(0x0C000000)
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#define PP_DEINTERLACING (u32)(0x02000000)
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#define PP_ALPHA_BLENDING (u32)(0x01000000)
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#define SORENSON_SPARK_NOT_SUPPORTED (u32)(0x00)
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#define SORENSON_SPARK_SUPPORTED (u32)(0x01)
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#define VP6_NOT_SUPPORTED (u32)(0x00)
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#define VP6_SUPPORTED (u32)(0x01)
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#define VP7_NOT_SUPPORTED (u32)(0x00)
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#define VP7_SUPPORTED (u32)(0x01)
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#define VP8_NOT_SUPPORTED (u32)(0x00)
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#define VP8_SUPPORTED (u32)(0x01)
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#define REF_BUF_NOT_SUPPORTED (u32)(0x00)
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#define REF_BUF_SUPPORTED (u32)(0x01)
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#define REF_BUF_INTERLACED (u32)(0x02)
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#define REF_BUF_DOUBLE (u32)(0x04)
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#define AVS_NOT_SUPPORTED (u32)(0x00)
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#define AVS_SUPPORTED (u32)(0x01)
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#define JPEG_EXT_NOT_SUPPORTED (u32)(0x00)
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#define JPEG_EXT_SUPPORTED (u32)(0x01)
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#define RV_NOT_SUPPORTED (u32)(0x00)
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#define RV_SUPPORTED (u32)(0x01)
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#define MVC_NOT_SUPPORTED (u32)(0x00)
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#define MVC_SUPPORTED (u32)(0x01)
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#define H264_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define H264_FUSE_ENABLED (u32)(0x01)
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#define MPEG4_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define MPEG4_FUSE_ENABLED (u32)(0x01)
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#define MPEG2_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define MPEG2_FUSE_ENABLED (u32)(0x01)
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#define SORENSON_SPARK_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define SORENSON_SPARK_ENABLED (u32)(0x01)
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#define JPEG_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define JPEG_FUSE_ENABLED (u32)(0x01)
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#define VP6_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define VP6_FUSE_ENABLED (u32)(0x01)
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#define VP7_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define VP7_FUSE_ENABLED (u32)(0x01)
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#define VP8_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define VP8_FUSE_ENABLED (u32)(0x01)
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#define VC1_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define VC1_FUSE_ENABLED (u32)(0x01)
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#define JPEG_PROGRESSIVE_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define JPEG_PROGRESSIVE_FUSE_ENABLED (u32)(0x01)
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#define REF_BUF_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define REF_BUF_FUSE_ENABLED (u32)(0x01)
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#define AVS_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define AVS_FUSE_ENABLED (u32)(0x01)
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#define RV_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define RV_FUSE_ENABLED (u32)(0x01)
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#define MVC_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define MVC_FUSE_ENABLED (u32)(0x01)
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#define PP_NOT_SUPPORTED_FUSE (u32)(0x00)
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#define PP_FUSE_ENABLED (u32)(0x01)
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#define PP_FUSE_DEINTERLACING_ENABLED (u32)(0x40000000)
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#define PP_FUSE_ALPHA_BLENDING_ENABLED (u32)(0x20000000)
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#define MAX_PP_OUT_WIDHT_1920_FUSE_ENABLED (u32)(0x00008000)
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#define MAX_PP_OUT_WIDHT_1280_FUSE_ENABLED (u32)(0x00004000)
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#define MAX_PP_OUT_WIDHT_720_FUSE_ENABLED (u32)(0x00002000)
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#define MAX_PP_OUT_WIDHT_352_FUSE_ENABLED (u32)(0x00001000)
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#define VPU_DEC_HWCFG0 50
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#define VPU_DEC_HWCFG1 51
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#define VPU_DEC_HW_FUSE_CFG 57
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#define VPU_PP_HW_SYNTH_CFG 40
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#define VPU_PP_HW_FUSE_CFG 41
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typedef struct VPUHwFuseStatus
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{
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u32 h264SupportFuse; /* HW supports h.264 */
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u32 mpeg4SupportFuse; /* HW supports MPEG-4 */
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u32 mpeg2SupportFuse; /* HW supports MPEG-2 */
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u32 sorensonSparkSupportFuse; /* HW supports Sorenson Spark */
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u32 jpegSupportFuse; /* HW supports JPEG */
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u32 vp6SupportFuse; /* HW supports VP6 */
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u32 vp7SupportFuse; /* HW supports VP6 */
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u32 vp8SupportFuse; /* HW supports VP6 */
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u32 vc1SupportFuse; /* HW supports VC-1 Simple */
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u32 jpegProgSupportFuse; /* HW supports Progressive JPEG */
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u32 ppSupportFuse; /* HW supports post-processor */
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u32 ppConfigFuse; /* HW post-processor functions bitmask */
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u32 maxDecPicWidthFuse; /* Maximum video decoding width supported */
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u32 maxPpOutPicWidthFuse; /* Maximum output width of Post-Processor */
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u32 refBufSupportFuse; /* HW supports reference picture buffering */
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u32 avsSupportFuse; /* one of the AVS values defined above */
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u32 rvSupportFuse; /* one of the REAL values defined above */
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u32 mvcSupportFuse;
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u32 customMpeg4SupportFuse; /* Fuse for custom MPEG-4 */
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} VPUHwFuseStatus_t;
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#endif
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1147
arch/arm/mach-rk29/vpu_service.c
Normal file
1147
arch/arm/mach-rk29/vpu_service.c
Normal file
File diff suppressed because it is too large
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