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ASoC: rockchip: i2s-tdm: Optimize WL for TDM mode

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TDM mode use all FIFOs, the max burst is 16 word of DMAC,
so we used the max FIFO to cover DDR dmc windows.

4 FIFOs controller:

TDL:

16 word: WL = ((32 * 4) - 16) / 4 = 28

RDL:

16 word: WL = 16 / 4 = 4

Change-Id: Idd88e0615d7fd4ec8c36c72af1c0b1b2d716b43e
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
This commit is contained in:
Sugar Zhang
2024-07-06 17:40:02 +08:00
committed by Tao Huang
parent 730ca484ba
commit 8b3a1e4cee
1 changed files with 21 additions and 0 deletions
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21
sound/soc/rockchip/rockchip_i2s_tdm.c
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@@ -1024,6 +1024,9 @@ static void rockchip_i2s_tdm_xfer_stop(struct rk_i2s_tdm_dev *i2s_tdm,
udelay(150);
rockchip_i2s_tdm_clear(i2s_tdm, clr);
dev_dbg(i2s_tdm->dev, "%s: stream: %d force: %d\n",
__func__, stream, force);
}
static void rockchip_i2s_tdm_xfer_trcm_start(struct rk_i2s_tdm_dev *i2s_tdm,
@@ -2261,6 +2264,24 @@ static int rockchip_dai_tdm_slot(struct snd_soc_dai *dai,
regmap_update_bits(i2s_tdm->regmap, I2S_TXCR, mask, val);
regmap_update_bits(i2s_tdm->regmap, I2S_RXCR, mask, val);
/*
* TDM mode use all FIFOs, the max burst is 16 word of DMAC,
* so we used the max FIFO to cover DDR dmc windows.
*
* 4 FIFOs controller:
*
* TDL:
*
* 16 word: WL = ((32 * 4) - 16) / 4 = 28
*
* RDL:
*
* 16 word: WL = 16 / 4 = 4
*/
regmap_update_bits(i2s_tdm->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK,
I2S_DMACR_TDL(28));
regmap_update_bits(i2s_tdm->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
I2S_DMACR_RDL(4));
pm_runtime_put(dai->dev);