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media: rockchip: isp: fix isp39 resume

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Change-Id: I8a6b60e4171563065d4efaf1ed444399a9ea94b7
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
This commit is contained in:
Cai YiWei
2024-07-05 16:21:38 +08:00
committed by Tao Huang
parent 749d4847fd
commit 8bc8558994
2 changed files with 34 additions and 26 deletions
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56
drivers/media/platform/rockchip/isp/hw.c
View File

@@ -417,21 +417,6 @@ void rkisp_hw_reg_restore(struct rkisp_hw_dev *dev)
}, {
.base = MI_WR_CTRL,
.shd = MI_WR_CTRL_SHD,
}, {
.base = ISP39_W3A_AEBIG_ADDR,
.shd = ISP39_W3A_AEBIG_ADDR_SHD,
}, {
.base = ISP39_W3A_AE0_ADDR,
.shd = ISP39_W3A_AE0_ADDR_SHD,
}, {
.base = ISP39_W3A_AF_ADDR,
.shd = ISP39_W3A_AF_ADDR_SHD,
}, {
.base = ISP39_W3A_AWB_ADDR,
.shd = ISP39_W3A_AWB_ADDR_SHD,
}, {
.base = ISP39_W3A_PDAF_ADDR,
.shd = ISP39_W3A_PDAF_ADDR_SHD,
}
};
@@ -546,14 +531,6 @@ void rkisp_hw_reg_restore(struct rkisp_hw_dev *dev)
reg = reg_buf + ISP32_BP_RESIZE_CTRL;
if (*reg & 0xf)
writel(*reg | CIF_RSZ_CTRL_CFG_UPD, base + ISP32_BP_RESIZE_CTRL);
if (dev->isp_ver == ISP_V39) {
reg = reg_buf + ISP39_W3A_CTRL0;
if (*reg)
writel(*reg | ISP39_W3A_FORCE_UPD, base + ISP39_W3A_CTRL0);
reg = reg_buf + ISP39_VI3A_CTRL0;
if (*reg)
writel(*reg | ISP39_W3A_FORCE_UPD, base + ISP39_VI3A_CTRL0);
}
/* update mi and isp, base_reg will update to shd_reg */
writel(CIF_MI_INIT_SOFT_UPD, base + MI_WR_INIT);
@@ -583,6 +560,26 @@ void rkisp_hw_reg_restore(struct rkisp_hw_dev *dev)
if (dev->is_single) {
rkisp_params_cfgsram(&isp->params_vdev, false, true);
if (dev->isp_ver == ISP_V39) {
reg = reg_buf + ISP3X_ISP_CTRL1;
*reg |= ISP3X_DHAZ_FST_FRAME;
writel(*reg, dev->base_addr + ISP3X_ISP_CTRL1);
reg = reg_buf + ISP3X_BAY3D_CTRL;
if (*reg & 1)
writel(*reg | BIT(31), dev->base_addr + ISP3X_BAY3D_CTRL);
/* w3a addr will update by ISP_CFG_UPD */
reg = reg_buf + ISP39_W3A_AEBIG_ADDR_SHD;
writel(*reg, dev->base_addr + ISP39_W3A_AEBIG_ADDR);
reg = reg_buf + ISP39_W3A_AE0_ADDR_SHD;
writel(*reg, dev->base_addr + ISP39_W3A_AE0_ADDR);
reg = reg_buf + ISP39_W3A_AF_ADDR_SHD;
writel(*reg, dev->base_addr + ISP39_W3A_AF_ADDR);
reg = reg_buf + ISP39_W3A_AWB_ADDR_SHD;
writel(*reg, dev->base_addr + ISP39_W3A_AWB_ADDR);
reg = reg_buf + ISP39_W3A_PDAF_ADDR_SHD;
writel(*reg, dev->base_addr + ISP39_W3A_PDAF_ADDR);
}
reg = reg_buf + ISP_CTRL;
*reg |= CIF_ISP_CTRL_ISP_ENABLE |
CIF_ISP_CTRL_ISP_CFG_UPD |
@@ -590,6 +587,19 @@ void rkisp_hw_reg_restore(struct rkisp_hw_dev *dev)
writel(*reg, dev->base_addr + ISP_CTRL);
if (dev->unite == ISP_UNITE_TWO)
writel(*reg, dev->base_next_addr + ISP_CTRL);
if (dev->isp_ver == ISP_V39) {
reg = reg_buf + ISP39_W3A_AEBIG_ADDR;
writel(*reg, dev->base_addr + ISP39_W3A_AEBIG_ADDR);
reg = reg_buf + ISP39_W3A_AE0_ADDR;
writel(*reg, dev->base_addr + ISP39_W3A_AE0_ADDR);
reg = reg_buf + ISP39_W3A_AF_ADDR;
writel(*reg, dev->base_addr + ISP39_W3A_AF_ADDR);
reg = reg_buf + ISP39_W3A_AWB_ADDR;
writel(*reg, dev->base_addr + ISP39_W3A_AWB_ADDR);
reg = reg_buf + ISP39_W3A_PDAF_ADDR;
writel(*reg, dev->base_addr + ISP39_W3A_PDAF_ADDR);
}
}
}

4
drivers/media/platform/rockchip/isp/isp_params_v39.c
View File

@@ -2367,9 +2367,7 @@ isp_dhaz_cfg_sram(struct rkisp_isp_params_vdev *params_vdev,
if (arg->hist_iir_wr) {
for (i = 0; i < priv_val->dhaz_blk_num; i++) {
val = ISP39_DHAZ_IIR_WR_ID(i);
if (!i)
val |= ISP39_DHAZ_IIR_WR_CLEAR;
val = ISP39_DHAZ_IIR_WR_ID(i) | ISP39_DHAZ_IIR_WR_CLEAR;
isp3_param_write_direct(params_vdev, val, ISP39_DHAZ_HIST_RW);
for (j = 0; j < ISP39_DHAZ_HIST_IIR_NUM / 2; j++) {
val = ISP_PACK_2SHORT(arg->hist_iir[i][2 * j], arg->hist_iir[i][2 * j + 1]);